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| 1 | +/* |
| 2 | + * The MIT License (MIT) |
| 3 | + * |
| 4 | + * Copyright(c) N Conrad |
| 5 | + * Copyright(c) 2024, hathach (tinyusb.org) |
| 6 | + * |
| 7 | + * Permission is hereby granted, free of charge, to any person obtaining a copy |
| 8 | + * of this software and associated documentation files (the "Software"), to deal |
| 9 | + * in the Software without restriction, including without limitation the rights |
| 10 | + * to use, copy, modify, merge, publish, distribute, sublicense, and/or sell |
| 11 | + * copies of the Software, and to permit persons to whom the Software is |
| 12 | + * furnished to do so, subject to the following conditions: |
| 13 | + * |
| 14 | + * The above copyright notice and this permission notice shall be included in |
| 15 | + * all copies or substantial portions of the Software. |
| 16 | + * |
| 17 | + * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR |
| 18 | + * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, |
| 19 | + * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE |
| 20 | + * AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER |
| 21 | + * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, |
| 22 | + * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN |
| 23 | + * THE SOFTWARE. |
| 24 | + * |
| 25 | + * This file is part of the TinyUSB stack. |
| 26 | + */ |
| 27 | + |
| 28 | +#ifndef TUSB_FSDEV_TYPE_H |
| 29 | +#define TUSB_FSDEV_TYPE_H |
| 30 | + |
| 31 | +#ifdef __cplusplus |
| 32 | + extern "C" { |
| 33 | +#endif |
| 34 | + |
| 35 | +#include "stdint.h" |
| 36 | + |
| 37 | +// If sharing with CAN, one can set this to be non-zero to give CAN space where it wants it |
| 38 | +// Both of these MUST be a multiple of 2, and are in byte units. |
| 39 | +#ifndef FSDEV_BTABLE_BASE |
| 40 | +#define FSDEV_BTABLE_BASE 0U |
| 41 | +#endif |
| 42 | + |
| 43 | +TU_VERIFY_STATIC(FSDEV_BTABLE_BASE % 8 == 0, "BTABLE base must be aligned to 8 bytes"); |
| 44 | + |
| 45 | +// FSDEV_PMA_SIZE is PMA buffer size in bytes. |
| 46 | +// - 512-byte devices, access with a stride of two words (use every other 16-bit address) |
| 47 | +// - 1024-byte devices, access with a stride of one word (use every 16-bit address) |
| 48 | +// - 2048-byte devices, access with 32-bit address |
| 49 | + |
| 50 | +// For purposes of accessing the packet |
| 51 | +#if FSDEV_PMA_SIZE == 512 |
| 52 | + // 1x16 bit / word access scheme |
| 53 | + #define FSDEV_PMA_STRIDE 2 |
| 54 | + #define pma_access_scheme TU_ATTR_ALIGNED(4) |
| 55 | +#elif FSDEV_PMA_SIZE == 1024 |
| 56 | + // 2x16 bit / word access scheme |
| 57 | + #define FSDEV_PMA_STRIDE 1 |
| 58 | + #define pma_access_scheme |
| 59 | +#elif FSDEV_PMA_SIZE == 2048 |
| 60 | + // 32 bit access scheme |
| 61 | + #define FSDEV_BUS_32BIT |
| 62 | + #define FSDEV_PMA_STRIDE 1 |
| 63 | + #define pma_access_scheme |
| 64 | +#endif |
| 65 | + |
| 66 | +// The fsdev_bus_t type can be used for both register and PMA access necessities |
| 67 | +#ifdef FSDEV_BUS_32BIT |
| 68 | + typedef uint32_t fsdev_bus_t; |
| 69 | + #define fsdevbus_unaligned_read(_addr) tu_unaligned_read32(_addr) |
| 70 | + #define fsdevbus_unaligned_write(_addr, _value) tu_unaligned_write32(_addr, _value) |
| 71 | +#else |
| 72 | + typedef uint16_t fsdev_bus_t; |
| 73 | + #define fsdevbus_unaligned_read(_addr) tu_unaligned_read16(_addr) |
| 74 | + #define fsdevbus_unaligned_write(_addr, _value) tu_unaligned_write16(_addr, _value) |
| 75 | +#endif |
| 76 | + |
| 77 | +enum { |
| 78 | + FSDEV_BUS_SIZE = sizeof(fsdev_bus_t), |
| 79 | +}; |
| 80 | + |
| 81 | +//--------------------------------------------------------------------+ |
| 82 | +// BTable Typedef |
| 83 | +//--------------------------------------------------------------------+ |
| 84 | +enum { |
| 85 | + BTABLE_BUF_TX = 0, |
| 86 | + BTABLE_BUF_RX = 1 |
| 87 | +}; |
| 88 | + |
| 89 | +// hardware limit endpoint |
| 90 | +#define FSDEV_EP_COUNT 8 |
| 91 | + |
| 92 | +// Buffer Table is located in Packet Memory Area (PMA) and therefore its address access is forced to either |
| 93 | +// 16-bit or 32-bit depending on FSDEV_BUS_32BIT. |
| 94 | +// 0: TX (IN), 1: RX (OUT) |
| 95 | +typedef union { |
| 96 | + // data is strictly 16-bit access (address could be 32-bit aligned) |
| 97 | + struct { |
| 98 | + volatile pma_access_scheme uint16_t addr; |
| 99 | + volatile pma_access_scheme uint16_t count; |
| 100 | + } ep16[FSDEV_EP_COUNT][2]; |
| 101 | + |
| 102 | + // strictly 32-bit access |
| 103 | + struct { |
| 104 | + volatile uint32_t count_addr; |
| 105 | + } ep32[FSDEV_EP_COUNT][2]; |
| 106 | +} fsdev_btable_t; |
| 107 | + |
| 108 | +TU_VERIFY_STATIC(sizeof(fsdev_btable_t) == FSDEV_EP_COUNT*8*FSDEV_PMA_STRIDE, "size is not correct"); |
| 109 | +TU_VERIFY_STATIC(FSDEV_BTABLE_BASE + FSDEV_EP_COUNT*8 <= FSDEV_PMA_SIZE, "BTABLE does not fit in PMA RAM"); |
| 110 | + |
| 111 | +#define FSDEV_BTABLE ((volatile fsdev_btable_t*) (FSDEV_PMA_BASE + FSDEV_PMA_STRIDE*(FSDEV_BTABLE_BASE))) |
| 112 | + |
| 113 | +typedef struct { |
| 114 | + volatile pma_access_scheme fsdev_bus_t value; |
| 115 | +} fsdev_pma_buf_t; |
| 116 | + |
| 117 | +#define PMA_BUF_AT(_addr) ((fsdev_pma_buf_t*) (FSDEV_PMA_BASE + FSDEV_PMA_STRIDE*(_addr))) |
| 118 | + |
| 119 | +//--------------------------------------------------------------------+ |
| 120 | +// Registers Typedef |
| 121 | +//--------------------------------------------------------------------+ |
| 122 | + |
| 123 | +// volatile 32-bit aligned |
| 124 | +#define _va32 volatile TU_ATTR_ALIGNED(4) |
| 125 | + |
| 126 | +typedef struct { |
| 127 | + struct { |
| 128 | + _va32 fsdev_bus_t reg; |
| 129 | + }ep[FSDEV_EP_COUNT]; |
| 130 | + |
| 131 | + _va32 uint32_t RESERVED7[8]; // Reserved |
| 132 | + _va32 fsdev_bus_t CNTR; // 40: Control register |
| 133 | + _va32 fsdev_bus_t ISTR; // 44: Interrupt status register |
| 134 | + _va32 fsdev_bus_t FNR; // 48: Frame number register |
| 135 | + _va32 fsdev_bus_t DADDR; // 4C: Device address register |
| 136 | + _va32 fsdev_bus_t BTABLE; // 50: Buffer Table address register (16-bit only) |
| 137 | + _va32 fsdev_bus_t LPMCSR; // 54: LPM Control and Status Register (32-bit only) |
| 138 | + _va32 fsdev_bus_t BCDR; // 58: Battery Charging Detector Register (32-bit only) |
| 139 | +} fsdev_regs_t; |
| 140 | + |
| 141 | +TU_VERIFY_STATIC(offsetof(fsdev_regs_t, CNTR) == 0x40, "Wrong offset"); |
| 142 | +TU_VERIFY_STATIC(sizeof(fsdev_regs_t) == 0x5C, "Size is not correct"); |
| 143 | + |
| 144 | +#define FSDEV_REG ((fsdev_regs_t*) FSDEV_REG_BASE) |
| 145 | + |
| 146 | + |
| 147 | +#ifndef USB_EPTX_STAT |
| 148 | +#define USB_EPTX_STAT 0x0030U |
| 149 | +#endif |
| 150 | + |
| 151 | +#ifndef USB_EPRX_STAT |
| 152 | +#define USB_EPRX_STAT 0x3000U |
| 153 | +#endif |
| 154 | + |
| 155 | +#ifndef USB_EPTX_STAT_Pos |
| 156 | +#define USB_EPTX_STAT_Pos 4u |
| 157 | +#endif |
| 158 | + |
| 159 | +#ifndef USB_EP_DTOG_TX_Pos |
| 160 | +#define USB_EP_DTOG_TX_Pos 6u |
| 161 | +#endif |
| 162 | + |
| 163 | +#ifndef USB_EP_CTR_TX_Pos |
| 164 | +#define USB_EP_CTR_TX_Pos 7u |
| 165 | +#endif |
| 166 | + |
| 167 | +typedef enum { |
| 168 | + EP_STAT_DISABLED = 0, |
| 169 | + EP_STAT_STALL = 1, |
| 170 | + EP_STAT_NAK = 2, |
| 171 | + EP_STAT_VALID = 3 |
| 172 | +}ep_stat_t; |
| 173 | + |
| 174 | +#define EP_STAT_MASK(_dir) (3u << (USB_EPTX_STAT_Pos + ((_dir) == TUSB_DIR_IN ? 0 : 8))) |
| 175 | +#define EP_DTOG_MASK(_dir) (1u << (USB_EP_DTOG_TX_Pos + ((_dir) == TUSB_DIR_IN ? 0 : 8))) |
| 176 | + |
| 177 | +//--------------------------------------------------------------------+ |
| 178 | +// Endpoint Helper |
| 179 | +// - CTR is write 0 to clear |
| 180 | +// - DTOG and STAT are write 1 to toggle |
| 181 | +//--------------------------------------------------------------------+ |
| 182 | + |
| 183 | +TU_ATTR_ALWAYS_INLINE static inline uint32_t ep_read(uint32_t ep_id) { |
| 184 | + return FSDEV_REG->ep[ep_id].reg; |
| 185 | +} |
| 186 | + |
| 187 | +TU_ATTR_ALWAYS_INLINE static inline void ep_write(uint32_t ep_id, uint32_t value, bool need_exclusive) { |
| 188 | + if (need_exclusive) { |
| 189 | + dcd_int_disable(0); |
| 190 | + } |
| 191 | + |
| 192 | + FSDEV_REG->ep[ep_id].reg = (fsdev_bus_t) value; |
| 193 | + |
| 194 | + if (need_exclusive) { |
| 195 | + dcd_int_enable(0); |
| 196 | + } |
| 197 | +} |
| 198 | + |
| 199 | +TU_ATTR_ALWAYS_INLINE static inline void ep_write_clear_ctr(uint32_t ep_id, tusb_dir_t dir) { |
| 200 | + uint32_t reg = FSDEV_REG->ep[ep_id].reg; |
| 201 | + reg |= USB_EP_CTR_TX | USB_EP_CTR_RX; |
| 202 | + reg &= USB_EPREG_MASK; |
| 203 | + reg &= ~(1 << (USB_EP_CTR_TX_Pos + (dir == TUSB_DIR_IN ? 0 : 8))); |
| 204 | + ep_write(ep_id, reg, false); |
| 205 | +} |
| 206 | + |
| 207 | +TU_ATTR_ALWAYS_INLINE static inline void ep_change_status(uint32_t* reg, tusb_dir_t dir, ep_stat_t state) { |
| 208 | + *reg ^= (state << (USB_EPTX_STAT_Pos + (dir == TUSB_DIR_IN ? 0 : 8))); |
| 209 | +} |
| 210 | + |
| 211 | +TU_ATTR_ALWAYS_INLINE static inline void ep_change_dtog(uint32_t* reg, tusb_dir_t dir, uint8_t state) { |
| 212 | + *reg ^= (state << (USB_EP_DTOG_TX_Pos + (dir == TUSB_DIR_IN ? 0 : 8))); |
| 213 | +} |
| 214 | + |
| 215 | +TU_ATTR_ALWAYS_INLINE static inline bool ep_is_iso(uint32_t reg) { |
| 216 | + return (reg & USB_EP_TYPE_MASK) == USB_EP_ISOCHRONOUS; |
| 217 | +} |
| 218 | + |
| 219 | +//--------------------------------------------------------------------+ |
| 220 | +// BTable Helper |
| 221 | +//--------------------------------------------------------------------+ |
| 222 | + |
| 223 | +TU_ATTR_ALWAYS_INLINE static inline uint32_t btable_get_addr(uint32_t ep_id, uint8_t buf_id) { |
| 224 | +#ifdef FSDEV_BUS_32BIT |
| 225 | + return FSDEV_BTABLE->ep32[ep_id][buf_id].count_addr & 0x0000FFFFu; |
| 226 | +#else |
| 227 | + return FSDEV_BTABLE->ep16[ep_id][buf_id].addr; |
| 228 | +#endif |
| 229 | +} |
| 230 | + |
| 231 | +TU_ATTR_ALWAYS_INLINE static inline void btable_set_addr(uint32_t ep_id, uint8_t buf_id, uint16_t addr) { |
| 232 | +#ifdef FSDEV_BUS_32BIT |
| 233 | + uint32_t count_addr = FSDEV_BTABLE->ep32[ep_id][buf_id].count_addr; |
| 234 | + count_addr = (count_addr & 0xFFFF0000u) | (addr & 0x0000FFFCu); |
| 235 | + FSDEV_BTABLE->ep32[ep_id][buf_id].count_addr = count_addr; |
| 236 | +#else |
| 237 | + FSDEV_BTABLE->ep16[ep_id][buf_id].addr = addr; |
| 238 | +#endif |
| 239 | +} |
| 240 | + |
| 241 | +TU_ATTR_ALWAYS_INLINE static inline uint16_t btable_get_count(uint32_t ep_id, uint8_t buf_id) { |
| 242 | + uint16_t count; |
| 243 | +#ifdef FSDEV_BUS_32BIT |
| 244 | + count = (FSDEV_BTABLE->ep32[ep_id][buf_id].count_addr >> 16); |
| 245 | +#else |
| 246 | + count = FSDEV_BTABLE->ep16[ep_id][buf_id].count; |
| 247 | +#endif |
| 248 | + return count & 0x3FFU; |
| 249 | +} |
| 250 | + |
| 251 | +TU_ATTR_ALWAYS_INLINE static inline void btable_set_count(uint32_t ep_id, uint8_t buf_id, uint16_t byte_count) { |
| 252 | +#ifdef FSDEV_BUS_32BIT |
| 253 | + uint32_t count_addr = FSDEV_BTABLE->ep32[ep_id][buf_id].count_addr; |
| 254 | + count_addr = (count_addr & ~0x03FF0000u) | ((byte_count & 0x3FFu) << 16); |
| 255 | + FSDEV_BTABLE->ep32[ep_id][buf_id].count_addr = count_addr; |
| 256 | +#else |
| 257 | + uint16_t cnt = FSDEV_BTABLE->ep16[ep_id][buf_id].count; |
| 258 | + cnt = (cnt & ~0x3FFU) | (byte_count & 0x3FFU); |
| 259 | + FSDEV_BTABLE->ep16[ep_id][buf_id].count = cnt; |
| 260 | +#endif |
| 261 | +} |
| 262 | + |
| 263 | +/* Aligned buffer size according to hardware */ |
| 264 | +TU_ATTR_ALWAYS_INLINE static inline uint16_t pma_align_buffer_size(uint16_t size, uint8_t* blsize, uint8_t* num_block) { |
| 265 | + /* The STM32 full speed USB peripheral supports only a limited set of |
| 266 | + * buffer sizes given by the RX buffer entry format in the USB_BTABLE. */ |
| 267 | + uint16_t block_in_bytes; |
| 268 | + if (size > 62) { |
| 269 | + block_in_bytes = 32; |
| 270 | + *blsize = 1; |
| 271 | + *num_block = tu_div_ceil(size, 32); |
| 272 | + } else { |
| 273 | + block_in_bytes = 2; |
| 274 | + *blsize = 0; |
| 275 | + *num_block = tu_div_ceil(size, 2); |
| 276 | + } |
| 277 | + |
| 278 | + return (*num_block) * block_in_bytes; |
| 279 | +} |
| 280 | + |
| 281 | +TU_ATTR_ALWAYS_INLINE static inline void btable_set_rx_bufsize(uint32_t ep_id, uint8_t buf_id, uint16_t wCount) { |
| 282 | + uint8_t blsize, num_block; |
| 283 | + (void) pma_align_buffer_size(wCount, &blsize, &num_block); |
| 284 | + |
| 285 | + /* Encode into register. When BLSIZE==1, we need to subtract 1 block count */ |
| 286 | + uint16_t bl_nb = (blsize << 15) | ((num_block - blsize) << 10); |
| 287 | + if (bl_nb == 0) { |
| 288 | + // zlp but 0 is invalid value, set num_block to 1 (2 bytes) |
| 289 | + bl_nb = 1 << 10; |
| 290 | + } |
| 291 | + |
| 292 | +#ifdef FSDEV_BUS_32BIT |
| 293 | + uint32_t count_addr = FSDEV_BTABLE->ep32[ep_id][buf_id].count_addr; |
| 294 | + count_addr = (bl_nb << 16) | (count_addr & 0x0000FFFFu); |
| 295 | + FSDEV_BTABLE->ep32[ep_id][buf_id].count_addr = count_addr; |
| 296 | +#else |
| 297 | + FSDEV_BTABLE->ep16[ep_id][buf_id].count = bl_nb; |
| 298 | +#endif |
| 299 | + |
| 300 | +} |
| 301 | + |
| 302 | +#ifdef __cplusplus |
| 303 | + } |
| 304 | +#endif |
| 305 | + |
| 306 | +#endif |
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