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Merge pull request #5403 from blues/add-strm32l4t5-swan-support
 stm32l4r5 Swan support
2 parents 3c993e5 + f936989 commit 14ec6b7

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‎ports/stm/Makefile

Lines changed: 9 additions & 1 deletion
Original file line numberDiff line numberDiff line change
@@ -111,6 +111,7 @@ CFLAGS += -Wno-undef -Wno-shadow -Wno-cast-align $(ADD_CFLAGS)
111111
CFLAGS += -mthumb -mabi=aapcs-linux
112112

113113
# Arm core selection
114+
MCU_FLAGS_L4 = -mcpu=cortex-m4
114115
MCU_FLAGS_F4 = -mcpu=cortex-m4
115116
MCU_FLAGS_F7 = -mcpu=cortex-m7
116117
MCU_FLAGS_H7 = -mcpu=cortex-m7
@@ -161,6 +162,13 @@ CFLAGS += \
161162
-DCFG_TUD_MIDI_RX_BUFSIZE=128 \
162163
-DCFG_TUD_MIDI_TX_BUFSIZE=128
163164

165+
ifdef CIRCUITPY_USB_VENDOR
166+
CFLAGS += \
167+
-DCFG_TUD_VENDOR_RX_BUFSIZE=1024 \
168+
-DCFG_TUD_VENDOR_TX_BUFSIZE=1024
169+
endif
170+
171+
164172
SRC_STM32 = $(addprefix $(HAL_DIR)/Src/stm32$(MCU_SERIES_LOWER)xx_,\
165173
hal.c \
166174
hal_adc.c \
@@ -207,7 +215,7 @@ endif
207215

208216
# Need this to avoid UART linker problems. TODO: rewrite to use registered callbacks.
209217
# Does not exist for F4 and lower
210-
ifeq ($(MCU_VARIANT),$(filter $(MCU_VARIANT),STM32F765xx STM32F767xx STM32F769xx STM32H743xx))
218+
ifeq ($(MCU_VARIANT),$(filter $(MCU_VARIANT),STM32F765xx STM32F767xx STM32F769xx STM32H743xx STM32L4R5xx))
211219
SRC_STM32 += $(HAL_DIR)/Src/stm32$(MCU_SERIES_LOWER)xx_hal_uart_ex.c
212220
endif
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‎ports/stm/boards/STM32L4R5_boot.ld

Lines changed: 26 additions & 0 deletions
Original file line numberDiff line numberDiff line change
@@ -0,0 +1,26 @@
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/*
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GNU linker script for STM32L4R5 with bootloader
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*/
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/* Specify the memory areas */
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MEMORY
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{
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FLASH (rx) : ORIGIN = 0x08000000, LENGTH = 2048K /* entire flash */
9+
FLASH_ISR (rx) : ORIGIN = 0x08010000, LENGTH = 4K /* ISR vector. Kind of wasteful. */
10+
FLASH_FIRMWARE (rx) : ORIGIN = 0x08011000, LENGTH = 1024K-128K-64K-4K /* For now, limit to 1MB so that bank switching is still possible. */
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FLASH_FS (rw) : ORIGIN = 0x080e0000, LENGTH = 128K
12+
RAM (xrw) : ORIGIN = 0x20000000, LENGTH = 640K
13+
}
14+
15+
/* produce a link error if there is not this amount of RAM for these sections */
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_minimum_stack_size = 24K;
17+
_minimum_heap_size = 16K;
18+
19+
/* Define the top end of the stack. The stack is full descending so begins just
20+
above last byte of RAM. Note that EABI requires the stack to be 8-byte
21+
aligned for a call. */
22+
_estack = ORIGIN(RAM) + LENGTH(RAM);
23+
24+
/* RAM extents for the garbage collector */
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_ram_start = ORIGIN(RAM);
26+
_ram_end = ORIGIN(RAM) + LENGTH(RAM);

‎ports/stm/boards/STM32L4R5_default.ld

Lines changed: 29 additions & 0 deletions
Original file line numberDiff line numberDiff line change
@@ -0,0 +1,29 @@
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/*
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GNU linker script for STM32L4R5 with filesystem
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*/
4+
5+
/* Specify the memory areas */
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MEMORY
7+
{
8+
FLASH (rx) : ORIGIN = 0x08000000, LENGTH = 2048K /* entire flash */
9+
FLASH_ISR (rx) : ORIGIN = 0x08000000, LENGTH = 4K /* ISR vector. Kind of wasteful. */
10+
FLASH_FIRMWARE (rx) : ORIGIN = 0x08001000, LENGTH = 1024K-128K-4K /* For now, limit to 1MB so that bank switching is still possible. */
11+
FLASH_FS (rw) : ORIGIN = 0x080e0000, LENGTH = 128K
12+
RAM (xrw) : ORIGIN = 0x20000000, LENGTH = 640K
13+
}
14+
15+
/* produce a link error if there is not this amount of RAM for these sections */
16+
_minimum_stack_size = 24K;
17+
_minimum_heap_size = 16K;
18+
19+
/* Define tho top end of the stack. The stack is full descending so begins just
20+
above last byte of RAM. Note that EABI requires the stack to be 8-byte
21+
aligned for a call. */
22+
_estack = ORIGIN(RAM) + LENGTH(RAM);
23+
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/* RAM extents for the garbage collector */
25+
_ram_start = ORIGIN(RAM);
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_ram_end = ORIGIN(RAM) + LENGTH(RAM);
27+
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/* ensure the firmware is within bounds */
29+
ASSERT ( (ORIGIN(FLASH_FIRMWARE) + LENGTH(FLASH_FIRMWARE)) <= (ORIGIN(FLASH)+LENGTH(FLASH)), "FLASH_FIRMWARE out of bounds" );

‎ports/stm/boards/swan_r5/board.c

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/*
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* This file is part of the MicroPython project, http://micropython.org/
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*
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* The MIT License (MIT)
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*
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* Copyright (c) 2017 Scott Shawcroft for Adafruit Industries
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*
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* Permission is hereby granted, free of charge, to any person obtaining a copy
9+
* of this software and associated documentation files (the "Software"), to deal
10+
* in the Software without restriction, including without limitation the rights
11+
* to use, copy, modify, merge, publish, distribute, sublicense, and/or sell
12+
* copies of the Software, and to permit persons to whom the Software is
13+
* furnished to do so, subject to the following conditions:
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*
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* The above copyright notice and this permission notice shall be included in
16+
* all copies or substantial portions of the Software.
17+
*
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* THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
19+
* IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
20+
* FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE
21+
* AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
22+
* LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM,
23+
* OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN
24+
* THE SOFTWARE.
25+
*/
26+
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#include "supervisor/board.h"
28+
#include "mpconfigboard.h"
29+
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#include "stm32l4xx.h"
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#include "stm32l4r5xx.h"
32+
33+
void initialize_discharge_pin(void) {
34+
/* Initialize the 3V3 discharge to be OFF and the output power to be ON */
35+
__HAL_RCC_GPIOE_CLK_ENABLE();
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GPIO_InitTypeDef GPIO_InitStruct;
37+
GPIO_InitStruct.Mode = GPIO_MODE_OUTPUT_OD;
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GPIO_InitStruct.Pull = GPIO_NOPULL;
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GPIO_InitStruct.Speed = GPIO_SPEED_LOW;
40+
GPIO_InitStruct.Pin = GPIO_PIN_6;
41+
HAL_GPIO_Init(GPIOE, &GPIO_InitStruct);
42+
HAL_GPIO_WritePin(GPIOE, GPIO_PIN_6, GPIO_PIN_SET);
43+
GPIO_InitStruct.Mode = GPIO_MODE_OUTPUT_PP;
44+
GPIO_InitStruct.Pin = GPIO_PIN_4;
45+
HAL_GPIO_Init(GPIOE, &GPIO_InitStruct);
46+
HAL_GPIO_WritePin(GPIOE, GPIO_PIN_4, GPIO_PIN_SET);
47+
}
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void board_init(void) {
50+
// enable the debugger while sleeping. Todo move somewhere more central (kind of generally useful in a debug build)
51+
SET_BIT(DBGMCU->CR, DBGMCU_CR_DBG_SLEEP);
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// Set tick interrupt priority, default HAL value is intentionally invalid
54+
// Without this, USB does not function.
55+
HAL_InitTick((1UL << __NVIC_PRIO_BITS) - 1UL);
56+
}
57+
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bool board_requests_safe_mode(void) {
59+
return false;
60+
}
61+
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void reset_board(void) {
63+
initialize_discharge_pin();
64+
}

‎ports/stm/boards/swan_r5/mpconfigboard.h

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/*
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* This file is part of the MicroPython project, http://micropython.org/
3+
*
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* The MIT License (MIT)
5+
*
6+
* Copyright (c) 2021 Blues Wireless Contributors.
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*
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* Permission is hereby granted, free of charge, to any person obtaining a copy
9+
* of this software and associated documentation files (the "Software"), to deal
10+
* in the Software without restriction, including without limitation the rights
11+
* to use, copy, modify, merge, publish, distribute, sublicense, and/or sell
12+
* copies of the Software, and to permit persons to whom the Software is
13+
* furnished to do so, subject to the following conditions:
14+
*
15+
* The above copyright notice and this permission notice shall be included in
16+
* all copies or substantial portions of the Software.
17+
*
18+
* THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
19+
* IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
20+
* FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE
21+
* AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
22+
* LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM,
23+
* OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN
24+
* THE SOFTWARE.
25+
*/
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// Micropython setup
28+
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#define MICROPY_HW_BOARD_NAME "Swan R5"
30+
#define MICROPY_HW_MCU_NAME "STM32L4R5ZIY6"
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// todo - not sure why this isn't the default for this port
33+
#define MICROPY_PY_SYS_PLATFORM MICROPY_HW_BOARD_NAME
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#define STM32L4R5XX
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#define BOARD_SWAN_R5
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// The flash size is defined in the STM32L4xx HAL (but not for the F4)
41+
// #define FLASH_SIZE (0x200000)
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// #define FLASH_PAGE_SIZE (0x1000)
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#define LSE_VALUE ((uint32_t)32768)
45+
#define BOARD_HAS_LOW_SPEED_CRYSTAL (1)
46+
#define BOARD_HAS_HIGH_SPEED_CRYSTAL (0)
47+
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// Bootloader only
50+
#ifdef UF2_BOOTLOADER_ENABLED
51+
#define BOARD_VTOR_DEFER (1) // Leave VTOR relocation to bootloader
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#endif
53+
54+
#define BOARD_NO_VBUS_SENSE (1)
55+
#define BOARD_NO_USB_OTG_ID_SENSE (1)
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#define DEFAULT_I2C_BUS_SCL (&pin_PB06)
58+
#define DEFAULT_I2C_BUS_SDA (&pin_PB07)
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60+
#define DEFAULT_SPI_BUS_SS (&pin_PD00)
61+
#define DEFAULT_SPI_BUS_SCK (&pin_PD01)
62+
#define DEFAULT_SPI_BUS_MOSI (&pin_PB15)
63+
#define DEFAULT_SPI_BUS_MISO (&pin_PB14)
64+
65+
#define DEFAULT_UART_BUS_RX (&pin_PA10)
66+
#define DEFAULT_UART_BUS_TX (&pin_PA09)

‎ports/stm/boards/swan_r5/mpconfigboard.mk

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USB_VID = 0x30A4
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USB_PID = 0x02
3+
USB_PRODUCT = "Swan R5"
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USB_MANUFACTURER = "Blues Inc."
5+
6+
INTERNAL_FLASH_FILESYSTEM = 1
7+
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MCU_SERIES = L4
9+
MCU_VARIANT = STM32L4R5xx
10+
MCU_PACKAGE = WLCSP144
11+
12+
LD_COMMON = boards/common_default.ld
13+
LD_DEFAULT = boards/STM32L4R5_default.ld
14+
# UF2 boot option
15+
LD_BOOT = boards/STM32L4R5_boot.ld
16+
UF2_OFFSET = 0x8010000
17+
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# Turn all of the below off while trying to get the thing to run
19+
# These modules are implemented in ports/<port>/common-hal:
20+
21+
# Typically the first module to create
22+
CIRCUITPY_MICROCONTROLLER = 1
23+
CIRCUITPY_ALARM = 1
24+
25+
# Typically the second module to create
26+
CIRCUITPY_DIGITALIO = 1
27+
# Other modules:
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CIRCUITPY_OS = 1
30+
CIRCUITPY_STORAGE = 1
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CIRCUITPY_USB_MSC = 1
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CIRCUITPY_UDB_CDC = 1
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CIRCUITPY_USB_VENDOR = 1
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CIRCUITPY_NVM = 0
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CIRCUITPY_ANALOGIO = 1
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CIRCUITPY_BUSIO = 1
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CIRCUITPY_NEOPIXEL_WRITE = 0
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CIRCUITPY_PULSEIO = 1
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CIRCUITPY_PWMIO = 1
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CIRCUITPY_AUDIOPWMIO = 1
42+
CIRCUITPY_CANIO = 0
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CIRCUITPY_AUDIOBUSIO = 0
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CIRCUITPY_I2CPERIPHERAL = 0
45+
# Requires SPI, PulseIO (stub ok):
46+
CIRCUITPY_DISPLAYIO = 0
47+
48+
# These modules are implemented in shared-module/ - they can be included in
49+
# any port once their prerequisites in common-hal are complete.
50+
# Requires DigitalIO:
51+
CIRCUITPY_BITBANGIO = 1
52+
# Requires DigitalIO
53+
CIRCUITPY_GAMEPADSHIFT = 1
54+
# Requires neopixel_write or SPI (dotstar)
55+
CIRCUITPY_PIXELBUF = 0
56+
# Requires OS
57+
CIRCUITPY_RANDOM = 1
58+
# Requires Microcontroller
59+
CIRCUITPY_TOUCHIO = 1
60+
# Requires USB
61+
CIRCUITPY_USB_HID = 0
62+
CIRCUITPY_USB_MIDI = 0
63+
# Does nothing without I2C
64+
CIRCUITPY_REQUIRE_I2C_PULLUPS = 0
65+
# No requirements, but takes extra flash
66+
CIRCUITPY_ULAB = 1
67+
# requires SPI
68+
CIRCUITPY_SDCARDIO = 0
69+
CIRCUITPY_BLEIO_HCI = 0
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CIRCUITPY_BLEIO = 0
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CIRCUITPY_BUSDEVICE = 0
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CIRCUITPY_KEYPAD = 1
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CIRCUITPY_RGBMATRIX = 0

‎ports/stm/boards/swan_r5/pins.c

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1+
#include "py/objtuple.h"
2+
#include "shared-bindings/board/__init__.h"
3+
4+
// Core Feather Pins
5+
STATIC const mp_rom_map_elem_t board_module_globals_table[] = {
6+
{ MP_ROM_QSTR(MP_QSTR_ENABLE_3V3), MP_ROM_PTR(&pin_PE04) },
7+
{ MP_ROM_QSTR(MP_QSTR_DISCHARGE_3V3), MP_ROM_PTR(&pin_PE06) },
8+
{ MP_ROM_QSTR(MP_QSTR_DISABLE_DISCHARGING), MP_ROM_TRUE },
9+
{ MP_ROM_QSTR(MP_QSTR_ENABLE_DISCHARGING), MP_ROM_FALSE },
10+
11+
{ MP_ROM_QSTR(MP_QSTR_A0), MP_ROM_PTR(&pin_PA03) },
12+
{ MP_ROM_QSTR(MP_QSTR_A1), MP_ROM_PTR(&pin_PA01) },
13+
{ MP_ROM_QSTR(MP_QSTR_A2), MP_ROM_PTR(&pin_PC03) },
14+
{ MP_ROM_QSTR(MP_QSTR_A3), MP_ROM_PTR(&pin_PC01) },
15+
{ MP_ROM_QSTR(MP_QSTR_A4), MP_ROM_PTR(&pin_PC04) },
16+
{ MP_ROM_QSTR(MP_QSTR_A5), MP_ROM_PTR(&pin_PC05) },
17+
{ MP_ROM_QSTR(MP_QSTR_VOLTAGE_MONITOR), MP_ROM_PTR(&pin_PA00) },
18+
{ MP_ROM_QSTR(MP_QSTR_BUTTON_USR), MP_ROM_PTR(&pin_PC13) },
19+
{ MP_ROM_QSTR(MP_QSTR_SWITCH), MP_ROM_PTR(&pin_PE04) },
20+
{ MP_ROM_QSTR(MP_QSTR_BUTTON), MP_ROM_PTR(&pin_PB02) }, // boot button, but looks like it's wired to GND on the schematic
21+
22+
{ MP_ROM_QSTR(MP_QSTR_D5), MP_ROM_PTR(&pin_PE11) },
23+
{ MP_ROM_QSTR(MP_QSTR_D6), MP_ROM_PTR(&pin_PE09) },
24+
{ MP_ROM_QSTR(MP_QSTR_D9), MP_ROM_PTR(&pin_PD15) },
25+
{ MP_ROM_QSTR(MP_QSTR_D10), MP_ROM_PTR(&pin_PA04) }, // DAC1 output also
26+
{ MP_ROM_QSTR(MP_QSTR_D11), MP_ROM_PTR(&pin_PA07) },
27+
{ MP_ROM_QSTR(MP_QSTR_D12), MP_ROM_PTR(&pin_PA06) },
28+
29+
{ MP_ROM_QSTR(MP_QSTR_LED), MP_ROM_PTR(&pin_PE02) },
30+
{ MP_ROM_QSTR(MP_QSTR_D13), MP_ROM_PTR(&pin_PA05) }, // DAC1 output also
31+
32+
{ MP_ROM_QSTR(MP_QSTR_SDA), MP_ROM_PTR(&pin_PB07) },
33+
{ MP_ROM_QSTR(MP_QSTR_SCL), MP_ROM_PTR(&pin_PB06) },
34+
35+
{ MP_ROM_QSTR(MP_QSTR_DAC1), MP_ROM_PTR(&pin_PA04) }, // D10
36+
{ MP_ROM_QSTR(MP_QSTR_DAC2), MP_ROM_PTR(&pin_PA05) }, // D13
37+
38+
{ MP_ROM_QSTR(MP_QSTR_SS), MP_ROM_PTR(&pin_PD00) },
39+
{ MP_ROM_QSTR(MP_QSTR_SCK), MP_ROM_PTR(&pin_PD01) },
40+
{ MP_ROM_QSTR(MP_QSTR_MISO), MP_ROM_PTR(&pin_PB14) },
41+
{ MP_ROM_QSTR(MP_QSTR_MOSI), MP_ROM_PTR(&pin_PB15) },
42+
43+
{ MP_ROM_QSTR(MP_QSTR_TX), MP_ROM_PTR(&pin_PA09) },
44+
{ MP_ROM_QSTR(MP_QSTR_RX), MP_ROM_PTR(&pin_PA10) },
45+
46+
{ MP_ROM_QSTR(MP_QSTR_I2C), MP_ROM_PTR(&board_i2c_obj) },
47+
{ MP_ROM_QSTR(MP_QSTR_SPI), MP_ROM_PTR(&board_spi_obj) },
48+
{ MP_ROM_QSTR(MP_QSTR_UART), MP_ROM_PTR(&board_uart_obj) },
49+
};
50+
MP_DEFINE_CONST_DICT(board_module_globals, board_module_globals_table);

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