34
34
#include "py/runtime.h"
35
35
#include "py/stream.h"
36
36
#include "supervisor/shared/translate.h"
37
+ #include "supervisor/debug.h"
37
38
38
39
#define ALL_UARTS 0xFFFF
39
40
@@ -68,6 +69,24 @@ void uart_reset(void) {
68
69
uart_clock_disable (ALL_UARTS );
69
70
}
70
71
72
+ void uart_rxcpltcallback (UART_HandleTypeDef * handle )
73
+ {
74
+ for (int i = 0 ; i < 7 ; i ++ ) {
75
+ //get context pointer and cast it as struct pointer
76
+ busio_uart_obj_t * context = (busio_uart_obj_t * )MP_STATE_PORT (cpy_uart_obj_all )[i ];
77
+ if (handle == & context -> handle ) {
78
+ //check if transaction is ongoing
79
+ if ((HAL_UART_GetState (handle ) & HAL_UART_STATE_BUSY_RX ) == HAL_UART_STATE_BUSY_RX ) {
80
+ return ;
81
+ }
82
+ ringbuf_put_n (& context -> rbuf , & context -> rx_char , 1 );
83
+ errflag = HAL_UART_Receive_IT (handle , & context -> rx_char , 1 );
84
+
85
+ return ;
86
+ }
87
+ }
88
+ }
89
+
71
90
void common_hal_busio_uart_construct (busio_uart_obj_t * self ,
72
91
const mcu_pin_obj_t * tx , const mcu_pin_obj_t * rx ,
73
92
const mcu_pin_obj_t * rts , const mcu_pin_obj_t * cts ,
@@ -232,6 +251,10 @@ void common_hal_busio_uart_construct(busio_uart_obj_t *self,
232
251
HAL_NVIC_SetPriority (self -> irq , UART_IRQPRI , UART_IRQSUB_PRI );
233
252
HAL_NVIC_EnableIRQ (self -> irq );
234
253
254
+ HAL_UART_RegisterCallback (& self -> handle ,
255
+ HAL_UART_RX_COMPLETE_CB_ID , uart_rxcpltcallback );
256
+
257
+
235
258
errflag = HAL_OK ;
236
259
}
237
260
@@ -309,24 +332,6 @@ size_t common_hal_busio_uart_write(busio_uart_obj_t *self, const uint8_t *data,
309
332
return len ;
310
333
}
311
334
312
- void HAL_UART_RxCpltCallback (UART_HandleTypeDef * handle )
313
- {
314
- for (int i = 0 ; i < 7 ; i ++ ) {
315
- //get context pointer and cast it as struct pointer
316
- busio_uart_obj_t * context = (busio_uart_obj_t * )MP_STATE_PORT (cpy_uart_obj_all )[i ];
317
- if (handle == & context -> handle ) {
318
- //check if transaction is ongoing
319
- if ((HAL_UART_GetState (handle ) & HAL_UART_STATE_BUSY_RX ) == HAL_UART_STATE_BUSY_RX ) {
320
- return ;
321
- }
322
- ringbuf_put_n (& context -> rbuf , & context -> rx_char , 1 );
323
- errflag = HAL_UART_Receive_IT (handle , & context -> rx_char , 1 );
324
-
325
- return ;
326
- }
327
- }
328
- }
329
-
330
335
void HAL_UART_ErrorCallback (UART_HandleTypeDef * UartHandle )
331
336
{
332
337
if (__HAL_UART_GET_FLAG (UartHandle , UART_FLAG_PE ) != RESET ) {
@@ -403,94 +408,118 @@ STATIC void call_hal_irq(int uart_num) {
403
408
404
409
// UART/USART IRQ handlers
405
410
void USART1_IRQHandler (void ) {
411
+ #ifdef USART1_UNAVAILABLE
412
+ debug_irq_handler ();
413
+ #else
406
414
call_hal_irq (1 );
415
+ #endif
407
416
}
408
417
409
418
void USART2_IRQHandler (void ) {
419
+ #ifdef USART2_UNAVAILABLE
420
+ debug_irq_handler ();
421
+ #else
410
422
call_hal_irq (2 );
423
+ #endif
411
424
}
412
425
413
426
void USART3_IRQHandler (void ) {
427
+ #ifdef USART3_UNAVAILABLE
428
+ debug_irq_handler ();
429
+ #else
414
430
call_hal_irq (3 );
431
+ #endif
415
432
}
416
433
417
434
void UART4_IRQHandler (void ) {
435
+ #ifdef USART4_UNAVAILABLE
436
+ debug_irq_handler ();
437
+ #else
418
438
call_hal_irq (4 );
439
+ #endif
419
440
}
420
441
421
442
void UART5_IRQHandler (void ) {
443
+ #ifdef USART5_UNAVAILABLE
444
+ debug_irq_handler ();
445
+ #else
422
446
call_hal_irq (5 );
447
+ #endif
423
448
}
424
449
425
450
void USART6_IRQHandler (void ) {
451
+ #ifdef USART6_UNAVAILABLE
452
+ debug_irq_handler ();
453
+ #else
426
454
call_hal_irq (6 );
455
+ #endif
427
456
}
428
457
429
458
STATIC void uart_clock_enable (uint16_t mask ) {
430
- #ifdef USART1
459
+ #if defined( USART1 ) && !defined( USART1_UNAVAILABLE )
431
460
if (mask & (1 << 0 )) {
432
461
__HAL_RCC_USART1_FORCE_RESET ();
433
462
__HAL_RCC_USART1_RELEASE_RESET ();
434
463
__HAL_RCC_USART1_CLK_ENABLE ();
435
464
}
436
465
#endif
437
- #ifdef USART2
466
+ #if defined( USART2 ) && !defined( USART2_UNAVAILABLE )
438
467
if (mask & (1 << 1 )) {
439
468
__HAL_RCC_USART2_FORCE_RESET ();
440
469
__HAL_RCC_USART2_RELEASE_RESET ();
441
470
__HAL_RCC_USART2_CLK_ENABLE ();
442
471
}
443
472
#endif
444
- #ifdef USART3
473
+ #if defined( USART3 ) && !defined( USART3_UNAVAILABLE )
445
474
if (mask & (1 << 2 )) {
446
475
__HAL_RCC_USART3_FORCE_RESET ();
447
476
__HAL_RCC_USART3_RELEASE_RESET ();
448
477
__HAL_RCC_USART3_CLK_ENABLE ();
449
478
}
450
479
#endif
451
- #ifdef UART4
480
+ #if defined( UART4 ) && !defined( USART4_UNAVAILABLE )
452
481
if (mask & (1 << 3 )) {
453
482
__HAL_RCC_UART4_FORCE_RESET ();
454
483
__HAL_RCC_UART4_RELEASE_RESET ();
455
484
__HAL_RCC_UART4_CLK_ENABLE ();
456
485
}
457
486
#endif
458
- #ifdef UART5
487
+ #if defined( UART5 ) && !defined( USART5_UNAVAILABLE )
459
488
if (mask & (1 << 4 )) {
460
489
__HAL_RCC_UART5_FORCE_RESET ();
461
490
__HAL_RCC_UART5_RELEASE_RESET ();
462
491
__HAL_RCC_UART5_CLK_ENABLE ();
463
492
}
464
493
#endif
465
- #ifdef USART6
494
+ #if defined( USART6 ) && !defined( USART6_UNAVAILABLE )
466
495
if (mask & (1 << 5 )) {
467
496
__HAL_RCC_USART6_FORCE_RESET ();
468
497
__HAL_RCC_USART6_RELEASE_RESET ();
469
498
__HAL_RCC_USART6_CLK_ENABLE ();
470
499
}
471
500
#endif
472
- #ifdef UART7
501
+ #if defined( UART7 ) && !defined( USART7_UNAVAILABLE )
473
502
if (mask & (1 << 6 )) {
474
503
__HAL_RCC_UART7_FORCE_RESET ();
475
504
__HAL_RCC_UART7_RELEASE_RESET ();
476
505
__HAL_RCC_UART7_CLK_ENABLE ();
477
506
}
478
507
#endif
479
- #ifdef UART8
508
+ #if defined( UART8 ) && !defined( USART8_UNAVAILABLE )
480
509
if (mask & (1 << 7 )) {
481
510
__HAL_RCC_UART8_FORCE_RESET ();
482
511
__HAL_RCC_UART8_RELEASE_RESET ();
483
512
__HAL_RCC_UART8_CLK_ENABLE ();
484
513
}
485
514
#endif
486
- #ifdef UART9
515
+ #if defined( UART9 ) && !defined( USART9_UNAVAILABLE )
487
516
if (mask & (1 << 8 )) {
488
517
__HAL_RCC_UART9_FORCE_RESET ();
489
518
__HAL_RCC_UART9_RELEASE_RESET ();
490
519
__HAL_RCC_UART9_CLK_ENABLE ();
491
520
}
492
521
#endif
493
- #ifdef UART10
522
+ #if defined( UART10 ) && !defined( USART10_UNAVAILABLE )
494
523
if (mask & (1 << 9 )) {
495
524
__HAL_RCC_UART10_FORCE_RESET ();
496
525
__HAL_RCC_UART10_RELEASE_RESET ();
@@ -500,70 +529,70 @@ STATIC void uart_clock_enable(uint16_t mask) {
500
529
}
501
530
502
531
STATIC void uart_clock_disable (uint16_t mask ) {
503
- #ifdef USART1
532
+ #if defined( USART1 ) && !defined( USART1_UNAVAILABLE )
504
533
if (mask & (1 << 0 )) {
505
534
__HAL_RCC_USART1_FORCE_RESET ();
506
535
__HAL_RCC_USART1_RELEASE_RESET ();
507
536
__HAL_RCC_USART1_CLK_DISABLE ();
508
537
}
509
538
#endif
510
- #ifdef USART2
539
+ #if defined( USART2 ) && !defined( USART2_UNAVAILABLE )
511
540
if (mask & (1 << 1 )) {
512
541
__HAL_RCC_USART2_FORCE_RESET ();
513
542
__HAL_RCC_USART2_RELEASE_RESET ();
514
543
__HAL_RCC_USART2_CLK_DISABLE ();
515
544
}
516
545
#endif
517
- #ifdef USART3
546
+ #if defined( USART3 ) && !defined( USART3_UNAVAILABLE )
518
547
if (mask & (1 << 2 )) {
519
548
__HAL_RCC_USART3_FORCE_RESET ();
520
549
__HAL_RCC_USART3_RELEASE_RESET ();
521
550
__HAL_RCC_USART3_CLK_DISABLE ();
522
551
}
523
552
#endif
524
- #ifdef UART4
553
+ #if defined( UART4 ) && !defined( USART4_UNAVAILABLE )
525
554
if (mask & (1 << 3 )) {
526
555
__HAL_RCC_UART4_FORCE_RESET ();
527
556
__HAL_RCC_UART4_RELEASE_RESET ();
528
557
__HAL_RCC_UART4_CLK_DISABLE ();
529
558
}
530
559
#endif
531
- #ifdef UART5
560
+ #if defined( UART5 ) && !defined( USART5_UNAVAILABLE )
532
561
if (mask & (1 << 4 )) {
533
562
__HAL_RCC_UART5_FORCE_RESET ();
534
563
__HAL_RCC_UART5_RELEASE_RESET ();
535
564
__HAL_RCC_UART5_CLK_DISABLE ();
536
565
}
537
566
#endif
538
- #ifdef USART6
567
+ #if defined( USART6 ) && !defined( USART6_UNAVAILABLE )
539
568
if (mask & (1 << 5 )) {
540
569
__HAL_RCC_USART6_FORCE_RESET ();
541
570
__HAL_RCC_USART6_RELEASE_RESET ();
542
571
__HAL_RCC_USART6_CLK_DISABLE ();
543
572
}
544
573
#endif
545
- #ifdef UART7
574
+ #if defined( UART7 ) && !defined( USART7_UNAVAILABLE )
546
575
if (mask & (1 << 6 )) {
547
576
__HAL_RCC_UART7_FORCE_RESET ();
548
577
__HAL_RCC_UART7_RELEASE_RESET ();
549
578
__HAL_RCC_UART7_CLK_DISABLE ();
550
579
}
551
580
#endif
552
- #ifdef UART8
581
+ #if defined( UART8 ) && !defined( USART8_UNAVAILABLE )
553
582
if (mask & (1 << 7 )) {
554
583
__HAL_RCC_UART8_FORCE_RESET ();
555
584
__HAL_RCC_UART8_RELEASE_RESET ();
556
585
__HAL_RCC_UART8_CLK_DISABLE ();
557
586
}
558
587
#endif
559
- #ifdef UART9
588
+ #if defined( UART9 ) && !defined( USART9_UNAVAILABLE )
560
589
if (mask & (1 << 8 )) {
561
590
__HAL_RCC_UART9_FORCE_RESET ();
562
591
__HAL_RCC_UART9_RELEASE_RESET ();
563
592
__HAL_RCC_UART9_CLK_DISABLE ();
564
593
}
565
594
#endif
566
- #ifdef UART10
595
+ #if defined( UART10 ) && !defined( USART10_UNAVAILABLE )
567
596
if (mask & (1 << 9 )) {
568
597
__HAL_RCC_UART10_FORCE_RESET ();
569
598
__HAL_RCC_UART10_RELEASE_RESET ();
0 commit comments