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Merge pull request #6961 from flom84/stm32f4-dfu-mode-fixes
Update STM DFU mode software implementation.
2 parents 03f02c7 + 7af8a23 commit 6637260

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ports/stm/supervisor/port.c

Lines changed: 13 additions & 4 deletions
Original file line numberDiff line numberDiff line change
@@ -290,13 +290,22 @@ condition and generating hardware reset or using Go command to execute user code
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HAL_RCC_DeInit();
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HAL_DeInit();
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293-
// disable all interupts
294-
__disable_irq();
293+
// Disable all pending interrupts using NVIC
294+
for (uint8_t i = 0; i < MP_ARRAY_SIZE(NVIC->ICER); ++i) {
295+
NVIC->ICER[i] = 0xFFFFFFFF;
296+
}
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296-
// Clear all pending interrupts
297-
for (uint8_t i = 0; i < (sizeof(NVIC->ICPR) / NVIC->ICPR[0]); ++i) {
298+
// if it is necessary to ensure an interrupt will not be triggered after disabling it in the NVIC,
299+
// add a DSB instruction and then an ISB instruction. (ARM Cortex™-M Programming Guide to
300+
// Memory Barrier Instructions, 4.6 Disabling Interrupts using NVIC)
301+
__DSB();
302+
__ISB();
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304+
// Clear all pending interrupts using NVIC
305+
for (uint8_t i = 0; i < MP_ARRAY_SIZE(NVIC->ICPR); ++i) {
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NVIC->ICPR[i] = 0xFFFFFFFF;
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}
308+
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// information about jump addresses has been taken from STM AN2606.
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#if defined(STM32F4)
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__set_MSP(*((uint32_t *)0x1FFF0000));

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