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Update makefile
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ports/silabs/Makefile

Lines changed: 3 additions & 1 deletion
Original file line numberDiff line numberDiff line change
@@ -51,7 +51,9 @@ PY_GEN_PINS_SRC ?= tools/make_pins.py
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FLASH_TOML_DIR = ../../data/nvm.toml/flash/macronix/
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# Default goal
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all:
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all: $(OUTPUT_DIR)/firmware.bin
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$(OUTPUT_DIR)/firmware.bin:
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ifeq (,$(wildcard $(SILABS_BUILD)/$(PROJECTNAME).Makefile))
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+@$(MAKE) --no-print-directory slc-generate
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-@echo 'Project is generated. Run make again'

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