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tannewttannewt
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Add additional iMX RT support
This adds a script to generate the peripherals files (except clock). It adds support for the 1015, 1020, 1040, and 1050 EVKs. Some work was started on 1176 but it isn't working. So, the board def is in a separate branch. Fixes #3521. Fixes #2477.
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lines changed

‎lib/tinyusb

Submodule tinyusb updated 151 files

‎ports/mimxrt10xx/Makefile

Lines changed: 34 additions & 8 deletions
Original file line numberDiff line numberDiff line change
@@ -34,10 +34,11 @@ INC += \
3434
-I../../lib/tinyusb/src \
3535
-I../../supervisor/shared/usb \
3636
-I$(BUILD) \
37-
-Iboards/ \
37+
-Iboards \
3838
-Iboards/$(BOARD) \
3939
-Iperipherals/ \
4040
-Iperipherals/mimxrt10xx/ \
41+
-Isdk/CMSIS/Include/ \
4142
-Isdk/devices/$(CHIP_FAMILY) \
4243
-Isdk/devices/$(CHIP_FAMILY)/drivers \
4344
-Isdk/drivers/common
@@ -48,7 +49,7 @@ CFLAGS += -ftree-vrp -DNDEBUG
4849

4950
# TinyUSB defines
5051
CFLAGS += -DCFG_TUSB_MCU=OPT_MCU_MIMXRT10XX -DCFG_TUD_CDC_RX_BUFSIZE=512 -DCFG_TUD_CDC_TX_BUFSIZE=512
51-
ifeq ($(CHIP_FAMILY), MIMXRT1011)
52+
ifeq ($(CHIP_FAMILY),$(filter $(CHIP_FAMILY),MIMXRT1011 MIMXRT1015))
5253
CFLAGS += -DCFG_TUD_MIDI_RX_BUFSIZE=64 -DCFG_TUD_MIDI_TX_BUFSIZE=64 -DCFG_TUD_MSC_BUFSIZE=512
5354
else
5455
CFLAGS += -DCFG_TUD_MIDI_RX_BUFSIZE=512 -DCFG_TUD_MIDI_TX_BUFSIZE=512 -DCFG_TUD_MSC_BUFSIZE=1024
@@ -75,7 +76,7 @@ CFLAGS += \
7576
-mfloat-abi=hard \
7677
-mfpu=fpv5-sp-d16 \
7778
-DCPU_$(CHIP_VARIANT) \
78-
-DIMXRT10XX \
79+
-DIMXRT1XXX \
7980
-g3 -Wno-unused-parameter \
8081
-ffunction-sections -fdata-sections -fstack-usage
8182

@@ -100,14 +101,27 @@ ifndef INTERNAL_LIBM
100101
LIBS += -lm
101102
endif
102103

103-
LDFLAGS += -mcpu=cortex-m7 -mfloat-abi=hard -mfpu=fpv5-sp-d16 -mthumb -mapcs
104+
ifndef CHIP_CORE
105+
CHIP_CORE = $(CHIP_FAMILY)
106+
endif
107+
108+
# If not empty, then it is 10xx.
109+
ifneq ($(findstring MIMXRT10, $(CHIP_FAMILY)),)
110+
CFLAGS += -DIMXRT10XX=1 -DIMXRT11XX=0
111+
MIMXRT10xx = $(CHIP_FAMILY)
104112
BOOTLOADER_SIZE := 0x6000C000
113+
else
114+
CFLAGS += -DIMXRT11XX=1 -DIMXRT10XX=0
115+
MIMXRT11xx = $(CHIP_FAMILY)
116+
BOOTLOADER_SIZE := 0x3000C000
117+
endif
118+
119+
LDFLAGS += -mcpu=cortex-m7 -mfloat-abi=hard -mfpu=fpv5-sp-d16 -mthumb -mapcs
105120

106121
SRC_SDK := \
107122
devices/$(CHIP_FAMILY)/drivers/fsl_clock.c \
108-
devices/$(CHIP_FAMILY)/system_$(CHIP_FAMILY).c \
123+
devices/$(CHIP_FAMILY)/system_$(CHIP_CORE).c \
109124
devices/$(CHIP_FAMILY)/xip/fsl_flexspi_nor_boot.c \
110-
drivers/adc_12b1msps_sar/fsl_adc.c \
111125
drivers/cache/armv7-m7/fsl_cache.c \
112126
drivers/common/fsl_common_arm.c \
113127
drivers/common/fsl_common.c \
@@ -121,11 +135,23 @@ SRC_SDK := \
121135
drivers/sai/fsl_sai.c \
122136
drivers/snvs_hp/fsl_snvs_hp.c \
123137
drivers/snvs_lp/fsl_snvs_lp.c \
124-
drivers/tempmon/fsl_tempmon.c \
125138
drivers/trng/fsl_trng.c \
126139

140+
ifeq ($(CIRCUITPY_ANALOGIO), 1)
141+
SRC_SDK += drivers/adc_12b1msps_sar/fsl_adc.c \
142+
drivers/tempmon/fsl_tempmon.c
143+
endif
144+
145+
ifeq ($(CHIP_FAMILY), MIMXRT1176)
146+
SRC_SDK += devices/$(CHIP_FAMILY)/drivers/fsl_anatop_ai.c \
147+
devices/$(CHIP_FAMILY)/drivers/fsl_dcdc.c \
148+
devices/$(CHIP_FAMILY)/drivers/fsl_pmu.c
149+
endif
150+
127151
SRC_SDK := $(addprefix sdk/, $(SRC_SDK))
128152

153+
$(addprefix $(BUILD)/, $(SRC_SDK:.c=.o)): CFLAGS += -Wno-array-bounds
154+
129155
SRC_C += \
130156
background.c \
131157
boards/$(BOARD)/board.c \
@@ -156,7 +182,7 @@ SRC_SHARED_MODULE_EXPANDED = $(addprefix shared-bindings/, $(SRC_SHARED_MODULE))
156182
$(addprefix shared-module/, $(SRC_SHARED_MODULE_INTERNAL))
157183

158184
SRC_S = \
159-
sdk/devices/$(CHIP_FAMILY)/gcc/startup_$(CHIP_FAMILY).S \
185+
sdk/devices/$(CHIP_FAMILY)/gcc/startup_$(CHIP_CORE).S \
160186
supervisor/cpu.S
161187

162188
OBJ = $(PY_O) $(SUPERVISOR_O) $(addprefix $(BUILD)/, $(SRC_C:.c=.o))

‎ports/mimxrt10xx/boards/board.h

Lines changed: 1 addition & 0 deletions
Original file line numberDiff line numberDiff line change
@@ -27,3 +27,4 @@
2727
#include "mpconfigboard.h"
2828

2929
#define XIP_BOOT_HEADER_ENABLE (1)
30+
#define XIP_EXTERNAL_FLASH (1)

‎ports/mimxrt10xx/boards/imxrt1010_evk/board.c

Lines changed: 2 additions & 2 deletions
Original file line numberDiff line numberDiff line change
@@ -42,8 +42,8 @@ const mcu_pin_obj_t *mimxrt10xx_reset_forbidden_pins[] = {
4242
&pin_GPIO_SD_07,
4343
&pin_GPIO_SD_06,
4444
// USB Pins
45-
&pin_GPIO_12,
46-
&pin_GPIO_13,
45+
&pin_USB_OTG1_DN,
46+
&pin_USB_OTG1_DP,
4747
NULL, // Must end in NULL.
4848
};
4949

‎ports/mimxrt10xx/boards/imxrt1010_evk/flash_config.c

Lines changed: 1 addition & 1 deletion
Original file line numberDiff line numberDiff line change
@@ -37,7 +37,7 @@ const flexspi_nor_config_t qspiflash_config = {
3737
.deviceModeArg = 0x02,
3838
.deviceType = kFLEXSPIDeviceType_SerialNOR,
3939
.sflashPadType = kSerialFlash_4Pads,
40-
.serialClkFreq = kFLEXSPISerialClk_60MHz,
40+
.serialClkFreq = kFLEXSPISerialClk_133MHz,
4141
.sflashA1Size = FLASH_SIZE,
4242
.lookupTable =
4343
{

‎ports/mimxrt10xx/boards/imxrt1010_evk/mpconfigboard.h

Lines changed: 2 additions & 2 deletions
Original file line numberDiff line numberDiff line change
@@ -17,7 +17,7 @@
1717
#define DEFAULT_UART_BUS_RX (&pin_GPIO_09)
1818
#define DEFAULT_UART_BUS_TX (&pin_GPIO_10)
1919

20-
#define CIRCUITPY_CONSOLE_UART_RX (&pin_GPIO_09)
21-
#define CIRCUITPY_CONSOLE_UART_TX (&pin_GPIO_10)
20+
// #define CIRCUITPY_CONSOLE_UART_RX (&pin_GPIO_09)
21+
// #define CIRCUITPY_CONSOLE_UART_TX (&pin_GPIO_10)
2222

2323
#define MICROPY_HW_LED_STATUS (&pin_GPIO_11)

‎ports/mimxrt10xx/boards/imxrt1015_evk/board.c

Lines changed: 49 additions & 0 deletions
Original file line numberDiff line numberDiff line change
@@ -0,0 +1,49 @@
1+
/*
2+
* This file is part of the MicroPython project, http://micropython.org/
3+
*
4+
* The MIT License (MIT)
5+
*
6+
* Copyright (c) 2019 Scott Shawcroft for Adafruit Industries
7+
* Copyright (c) 2019 Artur Pacholec
8+
*
9+
* Permission is hereby granted, free of charge, to any person obtaining a copy
10+
* of this software and associated documentation files (the "Software"), to deal
11+
* in the Software without restriction, including without limitation the rights
12+
* to use, copy, modify, merge, publish, distribute, sublicense, and/or sell
13+
* copies of the Software, and to permit persons to whom the Software is
14+
* furnished to do so, subject to the following conditions:
15+
*
16+
* The above copyright notice and this permission notice shall be included in
17+
* all copies or substantial portions of the Software.
18+
*
19+
* THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
20+
* IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
21+
* FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE
22+
* AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
23+
* LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM,
24+
* OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN
25+
* THE SOFTWARE.
26+
*/
27+
28+
#include "supervisor/board.h"
29+
#include "shared-bindings/microcontroller/Pin.h"
30+
31+
// These pins should never ever be reset; doing so could interfere with basic operation.
32+
// Used in common-hal/microcontroller/Pin.c
33+
const mcu_pin_obj_t *mimxrt10xx_reset_forbidden_pins[] = {
34+
&pin_GPIO_AD_B0_00, // SWDIO
35+
&pin_GPIO_AD_B0_01, // SWCLK
36+
// FLEX flash
37+
&pin_GPIO_SD_B1_06,
38+
&pin_GPIO_SD_B1_07,
39+
&pin_GPIO_SD_B1_08,
40+
&pin_GPIO_SD_B1_09,
41+
&pin_GPIO_SD_B1_10,
42+
&pin_GPIO_SD_B1_11,
43+
// USB Pins
44+
&pin_USB_OTG1_DN,
45+
&pin_USB_OTG1_DP,
46+
NULL, // Must end in NULL.
47+
};
48+
49+
// Use the MP_WEAK supervisor/shared/board.c versions of routines not defined here.

‎ports/mimxrt10xx/boards/imxrt1015_evk/flash_config.c

Lines changed: 143 additions & 0 deletions
Original file line numberDiff line numberDiff line change
@@ -0,0 +1,143 @@
1+
/*
2+
* Copyright 2017 NXP
3+
* All rights reserved.
4+
*
5+
* SPDX-License-Identifier: BSD-3-Clause
6+
*/
7+
8+
#include "boards/flash_config.h"
9+
10+
#include "xip/fsl_flexspi_nor_boot.h"
11+
12+
// Config for AT25SF128A with QSPI routed.
13+
__attribute__((section(".boot_hdr.conf")))
14+
const flexspi_nor_config_t qspiflash_config = {
15+
.pageSize = 256u,
16+
.sectorSize = 4u * 1024u,
17+
.ipcmdSerialClkFreq = kFLEXSPISerialClk_30MHz,
18+
.blockSize = 0x00010000,
19+
.isUniformBlockSize = false,
20+
.memConfig =
21+
{
22+
.tag = FLEXSPI_CFG_BLK_TAG,
23+
.version = FLEXSPI_CFG_BLK_VERSION,
24+
.readSampleClkSrc = kFLEXSPIReadSampleClk_LoopbackFromDqsPad,
25+
.csHoldTime = 3u,
26+
.csSetupTime = 3u,
27+
28+
.busyOffset = 0u, // Status bit 0 indicates busy.
29+
.busyBitPolarity = 0u, // Busy when the bit is 1.
30+
31+
.deviceModeCfgEnable = 1u,
32+
.deviceModeType = kDeviceConfigCmdType_QuadEnable,
33+
.deviceModeSeq = {
34+
.seqId = 4u,
35+
.seqNum = 1u,
36+
},
37+
.deviceModeArg = 0x02,
38+
.deviceType = kFLEXSPIDeviceType_SerialNOR,
39+
.sflashPadType = kSerialFlash_4Pads,
40+
.serialClkFreq = kFLEXSPISerialClk_60MHz,
41+
.sflashA1Size = FLASH_SIZE,
42+
.lookupTable =
43+
{
44+
// FSL_ROM_FLEXSPI_LUT_SEQ(cmd0, pad0, op0, cmd1, pad1, op1)
45+
// The high 16 bits is command 1 and the low are command 0.
46+
// Within a command, the top 6 bits are the opcode, the next two are the number
47+
// of pads and then last byte is the operand. The operand's meaning changes
48+
// per opcode.
49+
50+
// Indices with ROM should always have the same function because the ROM
51+
// bootloader uses it.
52+
53+
// 0: ROM: Read LUTs
54+
// Quad version
55+
SEQUENCE(FSL_ROM_FLEXSPI_LUT_SEQ(CMD_SDR, FLEXSPI_1PAD, 0xEB /* the command to send */,
56+
RADDR_SDR, FLEXSPI_4PAD, 24 /* bits to transmit */),
57+
FSL_ROM_FLEXSPI_LUT_SEQ(DUMMY_SDR, FLEXSPI_4PAD, 6 /* 6 dummy cycles, 2 for M7-0 and 4 dummy */,
58+
READ_SDR, FLEXSPI_4PAD, 0x04),
59+
// Single fast read version, good for debugging.
60+
// FSL_ROM_FLEXSPI_LUT_SEQ(CMD_SDR, FLEXSPI_1PAD, 0x0B /* the command to send */,
61+
// RADDR_SDR, FLEXSPI_1PAD, 24 /* bits to transmit */),
62+
// FSL_ROM_FLEXSPI_LUT_SEQ(DUMMY_SDR, FLEXSPI_1PAD, 8 /* 8 dummy clocks */,
63+
// READ_SDR, FLEXSPI_1PAD, 0x04),
64+
TWO_EMPTY_STEPS,
65+
TWO_EMPTY_STEPS),
66+
67+
// 1: ROM: Read status
68+
SEQUENCE(FSL_ROM_FLEXSPI_LUT_SEQ(CMD_SDR, FLEXSPI_1PAD, 0x05 /* the command to send */,
69+
READ_SDR, FLEXSPI_1PAD, 0x02),
70+
TWO_EMPTY_STEPS,
71+
TWO_EMPTY_STEPS,
72+
TWO_EMPTY_STEPS),
73+
74+
// 2: Empty
75+
EMPTY_SEQUENCE,
76+
77+
// 3: ROM: Write Enable
78+
SEQUENCE(FSL_ROM_FLEXSPI_LUT_SEQ(CMD_SDR, FLEXSPI_1PAD, 0x06 /* the command to send */,
79+
STOP, FLEXSPI_1PAD, 0x00),
80+
TWO_EMPTY_STEPS,
81+
TWO_EMPTY_STEPS,
82+
TWO_EMPTY_STEPS),
83+
84+
// 4: Config: Write Status
85+
SEQUENCE(FSL_ROM_FLEXSPI_LUT_SEQ(CMD_SDR, FLEXSPI_1PAD, 0x31 /* the command to send */,
86+
WRITE_SDR, FLEXSPI_1PAD, 0x01),
87+
TWO_EMPTY_STEPS,
88+
TWO_EMPTY_STEPS,
89+
TWO_EMPTY_STEPS),
90+
91+
// 5: ROM: Erase Sector
92+
SEQUENCE(FSL_ROM_FLEXSPI_LUT_SEQ(CMD_SDR, FLEXSPI_1PAD, 0x20 /* the command to send */,
93+
RADDR_SDR, FLEXSPI_1PAD, 24 /* bits to transmit */),
94+
TWO_EMPTY_STEPS,
95+
TWO_EMPTY_STEPS,
96+
TWO_EMPTY_STEPS),
97+
98+
// 6: Empty
99+
EMPTY_SEQUENCE,
100+
101+
// 7: Empty
102+
EMPTY_SEQUENCE,
103+
104+
// 8: Block Erase
105+
SEQUENCE(FSL_ROM_FLEXSPI_LUT_SEQ(CMD_SDR, FLEXSPI_1PAD, 0xD8 /* the command to send */,
106+
RADDR_SDR, FLEXSPI_1PAD, 24 /* bits to transmit */),
107+
TWO_EMPTY_STEPS,
108+
TWO_EMPTY_STEPS,
109+
TWO_EMPTY_STEPS),
110+
111+
// 9: ROM: Page program
112+
SEQUENCE(FSL_ROM_FLEXSPI_LUT_SEQ(CMD_SDR, FLEXSPI_1PAD, 0x02 /* the command to send */,
113+
RADDR_SDR, FLEXSPI_1PAD, 24 /* bits to transmit */),
114+
115+
FSL_ROM_FLEXSPI_LUT_SEQ(WRITE_SDR, FLEXSPI_1PAD, 0x04 /* data out */,
116+
STOP, FLEXSPI_1PAD, 0),
117+
TWO_EMPTY_STEPS,
118+
TWO_EMPTY_STEPS),
119+
120+
// 10: Empty
121+
EMPTY_SEQUENCE,
122+
123+
// 11: ROM: Chip erase
124+
SEQUENCE(FSL_ROM_FLEXSPI_LUT_SEQ(CMD_SDR, FLEXSPI_1PAD, 0x60 /* the command to send */,
125+
STOP, FLEXSPI_1PAD, 0),
126+
TWO_EMPTY_STEPS,
127+
TWO_EMPTY_STEPS,
128+
TWO_EMPTY_STEPS),
129+
130+
// 12: Empty
131+
EMPTY_SEQUENCE,
132+
133+
// 13: ROM: Read SFDP
134+
EMPTY_SEQUENCE,
135+
136+
// 14: ROM: Restore no cmd
137+
EMPTY_SEQUENCE,
138+
139+
// 15: ROM: Dummy
140+
EMPTY_SEQUENCE
141+
},
142+
},
143+
};

‎ports/mimxrt10xx/boards/imxrt1015_evk/mpconfigboard.h

Lines changed: 24 additions & 0 deletions
Original file line numberDiff line numberDiff line change
@@ -0,0 +1,24 @@
1+
#define MICROPY_HW_BOARD_NAME "IMXRT1015-EVK"
2+
#define MICROPY_HW_MCU_NAME "IMXRT1015DAF5A"
3+
4+
// If you change this, then make sure to update the linker scripts as well to
5+
// make sure you don't overwrite code
6+
#define CIRCUITPY_INTERNAL_NVM_SIZE 0
7+
8+
#define BOARD_FLASH_SIZE (16 * 1024 * 1024)
9+
10+
#define DEFAULT_SPI_BUS_SCK (&pin_GPIO_AD_B0_10)
11+
#define DEFAULT_SPI_BUS_MOSI (&pin_GPIO_AD_B0_12)
12+
#define DEFAULT_SPI_BUS_MISO (&pin_GPIO_AD_B0_13)
13+
14+
#define DEFAULT_I2C_BUS_SCL (&pin_GPIO_AD_B1_15)
15+
#define DEFAULT_I2C_BUS_SDA (&pin_GPIO_AD_B1_14)
16+
17+
#define DEFAULT_UART_BUS_RX (&pin_GPIO_EMC_33)
18+
#define DEFAULT_UART_BUS_TX (&pin_GPIO_EMC_32)
19+
20+
// #define CIRCUITPY_CONSOLE_UART_RX (&pin_GPIO_AD_B0_07)
21+
// #define CIRCUITPY_CONSOLE_UART_TX (&pin_GPIO_AD_B0_06)
22+
23+
#define MICROPY_HW_LED_STATUS (&pin_GPIO_SD_B1_00)
24+
#define MICROPY_HW_LED_STATUS_INVERTED (1)

‎ports/mimxrt10xx/boards/imxrt1015_evk/mpconfigboard.mk

Lines changed: 8 additions & 0 deletions
Original file line numberDiff line numberDiff line change
@@ -0,0 +1,8 @@
1+
USB_VID = 0x239A
2+
USB_PID = 0x8078
3+
USB_PRODUCT = "IMXRT1015-EVK"
4+
USB_MANUFACTURER = "NXP"
5+
6+
CHIP_VARIANT = MIMXRT1015DAF5A
7+
CHIP_FAMILY = MIMXRT1015
8+
FLASH = AT25SF128A

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