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Override HAL_Delay and HAL_GetTick
1 parent a0977ca commit ad0971f

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5 files changed

+33
-7
lines changed

5 files changed

+33
-7
lines changed

ports/stm/peripherals/stm32f4/stm32f401xe/clocks.h

Lines changed: 1 addition & 1 deletion
Original file line numberDiff line numberDiff line change
@@ -37,7 +37,7 @@
3737
#ifndef CPY_CLK_PLLN
3838
#define CPY_CLK_PLLN (336)
3939
#endif
40-
#ifndef (CPY_CLK_PLLP
40+
#ifndef CPY_CLK_PLLP
4141
#define CPY_CLK_PLLP (RCC_PLLP_DIV4)
4242
#endif
4343
#ifndef CPY_CLK_PLLQ

ports/stm/peripherals/stm32f4/stm32f411xe/clocks.h

Lines changed: 1 addition & 1 deletion
Original file line numberDiff line numberDiff line change
@@ -32,7 +32,7 @@
3232

3333
// Note - the actual maximum frequency is 100MHz, but this requires divisors
3434
// which are incompatible with USB, and there is no additional PLL such as on
35-
// the F412.
35+
// the F412.
3636

3737
// Defaults:
3838
#ifndef CPY_CLK_VSCALE

ports/stm/peripherals/stm32f4/stm32f412zx/clocks.h

Lines changed: 1 addition & 1 deletion
Original file line numberDiff line numberDiff line change
@@ -30,7 +30,7 @@
3030
// Line Type: Access Line
3131
// Speed: 200MHz (MAX)
3232

33-
// Note - uses the I2S PLL for SUSB to enable full 100MHz operation, since USB
33+
// Note - uses the I2S PLL for SUSB to enable full 100MHz operation, since USB
3434
// can't get the right divisors from 100MHz PLL settings.
3535

3636
// Defaults:

ports/stm/peripherals/stm32h7/clocks.c

Lines changed: 1 addition & 1 deletion
Original file line numberDiff line numberDiff line change
@@ -120,4 +120,4 @@ void stm32_peripherals_clocks_init(void) {
120120
if (lse_failure) {
121121
reset_into_safe_mode(HARD_CRASH); //TODO: make safe mode category CLOCK_FAULT?
122122
}
123-
}
123+
}

ports/stm/supervisor/port.c

Lines changed: 29 additions & 3 deletions
Original file line numberDiff line numberDiff line change
@@ -147,9 +147,10 @@ __attribute__((used, naked)) void Reset_Handler(void) {
147147
__enable_irq();
148148
main();
149149
}
150-
151150
#endif //end H7 specific code
152151

152+
// Low power clock variables
153+
static volatile uint32_t systick_ms;
153154
static RTC_HandleTypeDef _hrtc;
154155

155156
#if BOARD_HAS_LOW_SPEED_CRYSTAL
@@ -159,7 +160,7 @@ static uint32_t rtc_clock_frequency = LSI_VALUE;
159160
#endif
160161

161162
safe_mode_t port_init(void) {
162-
HAL_Init();
163+
HAL_Init(); // Turns on SysTick
163164
__HAL_RCC_SYSCFG_CLK_ENABLE();
164165

165166
#if (CPY_STM32F4)
@@ -182,13 +183,38 @@ safe_mode_t port_init(void) {
182183
HAL_RTC_Init(&_hrtc);
183184
HAL_NVIC_EnableIRQ(RTC_Alarm_IRQn);
184185

186+
// Turn off SysTick
187+
SysTick->CTRL = 0;
188+
185189
return NO_SAFE_MODE;
186190
}
187191

192+
void HAL_Delay(uint32_t delay_ms) {
193+
if (SysTick->CTRL != 0) {
194+
// SysTick is on, so use it
195+
uint32_t tickstart = systick_ms;
196+
while (systick_ms - tickstart < delay_ms) {
197+
}
198+
} else {
199+
mp_hal_delay_ms(delay_ms);
200+
}
201+
}
202+
203+
uint32_t HAL_GetTick() {
204+
if (SysTick->CTRL != 0) {
205+
return systick_ms;
206+
} else {
207+
uint8_t subticks;
208+
uint32_t result = (uint32_t)port_get_raw_ticks(&subticks);
209+
return result;
210+
}
211+
}
212+
213+
188214
void SysTick_Handler(void) {
215+
systick_ms += 1;
189216
// Read the CTRL register to clear the SysTick interrupt.
190217
SysTick->CTRL;
191-
HAL_IncTick();
192218
}
193219

194220
void reset_port(void) {

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