Skip to content

Commit c6dee52

Browse files
authored
Merge pull request #4870 from jepler/kaluga-1.3
Add kaluga version 1.3
2 parents c1c101c + 124c7b7 commit c6dee52

File tree

7 files changed

+314
-0
lines changed

7 files changed

+314
-0
lines changed

.github/workflows/build.yml

Lines changed: 1 addition & 0 deletions
Original file line numberDiff line numberDiff line change
@@ -485,6 +485,7 @@ jobs:
485485
- "atmegazero_esp32s2"
486486
- "electroniccats_bastwifi"
487487
- "espressif_kaluga_1"
488+
- "espressif_kaluga_1.3"
488489
- "espressif_saola_1_wroom"
489490
- "espressif_saola_1_wrover"
490491
- "franzininho_wifi_wroom"
Lines changed: 52 additions & 0 deletions
Original file line numberDiff line numberDiff line change
@@ -0,0 +1,52 @@
1+
/*
2+
* This file is part of the MicroPython project, http://micropython.org/
3+
*
4+
* The MIT License (MIT)
5+
*
6+
* Copyright (c) 2020 Scott Shawcroft for Adafruit Industries
7+
*
8+
* Permission is hereby granted, free of charge, to any person obtaining a copy
9+
* of this software and associated documentation files (the "Software"), to deal
10+
* in the Software without restriction, including without limitation the rights
11+
* to use, copy, modify, merge, publish, distribute, sublicense, and/or sell
12+
* copies of the Software, and to permit persons to whom the Software is
13+
* furnished to do so, subject to the following conditions:
14+
*
15+
* The above copyright notice and this permission notice shall be included in
16+
* all copies or substantial portions of the Software.
17+
*
18+
* THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
19+
* IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
20+
* FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE
21+
* AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
22+
* LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM,
23+
* OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN
24+
* THE SOFTWARE.
25+
*/
26+
27+
#include "supervisor/board.h"
28+
#include "mpconfigboard.h"
29+
#include "shared-bindings/microcontroller/Pin.h"
30+
31+
void board_init(void) {
32+
// USB
33+
common_hal_never_reset_pin(&pin_GPIO19);
34+
common_hal_never_reset_pin(&pin_GPIO20);
35+
36+
// Debug UART
37+
#ifdef DEBUG
38+
common_hal_never_reset_pin(&pin_GPIO43);
39+
common_hal_never_reset_pin(&pin_GPIO44);
40+
#endif /* DEBUG */
41+
}
42+
43+
bool board_requests_safe_mode(void) {
44+
return false;
45+
}
46+
47+
void reset_board(void) {
48+
49+
}
50+
51+
void board_deinit(void) {
52+
}
Lines changed: 38 additions & 0 deletions
Original file line numberDiff line numberDiff line change
@@ -0,0 +1,38 @@
1+
/*
2+
* This file is part of the MicroPython project, http://micropython.org/
3+
*
4+
* The MIT License (MIT)
5+
*
6+
* Copyright (c) 2019 Scott Shawcroft for Adafruit Industries
7+
*
8+
* Permission is hereby granted, free of charge, to any person obtaining a copy
9+
* of this software and associated documentation files (the "Software"), to deal
10+
* in the Software without restriction, including without limitation the rights
11+
* to use, copy, modify, merge, publish, distribute, sublicense, and/or sell
12+
* copies of the Software, and to permit persons to whom the Software is
13+
* furnished to do so, subject to the following conditions:
14+
*
15+
* The above copyright notice and this permission notice shall be included in
16+
* all copies or substantial portions of the Software.
17+
*
18+
* THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
19+
* IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
20+
* FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE
21+
* AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
22+
* LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM,
23+
* OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN
24+
* THE SOFTWARE.
25+
*/
26+
27+
// Micropython setup
28+
29+
#define MICROPY_HW_BOARD_NAME "Kaluga 1"
30+
#define MICROPY_HW_MCU_NAME "ESP32S2"
31+
32+
#define MICROPY_HW_NEOPIXEL (&pin_GPIO45)
33+
34+
#define CIRCUITPY_BOOT_BUTTON (&pin_GPIO0)
35+
36+
#define BOARD_USER_SAFE_MODE_ACTION translate("pressing boot button at start up.\n")
37+
38+
#define AUTORESET_DELAY_MS 500
Lines changed: 23 additions & 0 deletions
Original file line numberDiff line numberDiff line change
@@ -0,0 +1,23 @@
1+
USB_VID = 0x239A
2+
USB_PID = 0x80C8
3+
USB_PRODUCT = "Kaluga 1"
4+
USB_MANUFACTURER = "Espressif"
5+
6+
INTERNAL_FLASH_FILESYSTEM = 1
7+
LONGINT_IMPL = MPZ
8+
9+
# The default queue depth of 16 overflows on release builds,
10+
# so increase it to 32.
11+
CFLAGS += -DCFG_TUD_TASK_QUEUE_SZ=32
12+
13+
CIRCUITPY_ESP_FLASH_MODE=dio
14+
CIRCUITPY_ESP_FLASH_FREQ=80m
15+
CIRCUITPY_ESP_FLASH_SIZE=4MB
16+
17+
# We only have enough endpoints available in hardware to
18+
# enable ONE of these at a time.
19+
CIRCUITPY_USB_MIDI = 1
20+
CIRCUITPY_USB_HID = 0
21+
CIRCUITPY_USB_VENDOR = 0
22+
23+
CIRCUITPY_MODULE=wrover
Lines changed: 142 additions & 0 deletions
Original file line numberDiff line numberDiff line change
@@ -0,0 +1,142 @@
1+
#include "py/objtuple.h"
2+
#include "shared-bindings/board/__init__.h"
3+
4+
STATIC const mp_rom_obj_tuple_t camera_data_tuple = {
5+
{&mp_type_tuple},
6+
8,
7+
{
8+
MP_ROM_PTR(&pin_GPIO36),
9+
MP_ROM_PTR(&pin_GPIO37),
10+
MP_ROM_PTR(&pin_GPIO41),
11+
MP_ROM_PTR(&pin_GPIO42),
12+
MP_ROM_PTR(&pin_GPIO39),
13+
MP_ROM_PTR(&pin_GPIO40),
14+
MP_ROM_PTR(&pin_GPIO21),
15+
MP_ROM_PTR(&pin_GPIO38),
16+
}
17+
};
18+
19+
STATIC const mp_rom_map_elem_t board_global_dict_table[] = {
20+
{ MP_ROM_QSTR(MP_QSTR_IO0), MP_ROM_PTR(&pin_GPIO0) },
21+
{ MP_ROM_QSTR(MP_QSTR_IO1), MP_ROM_PTR(&pin_GPIO1) },
22+
{ MP_ROM_QSTR(MP_QSTR_IO2), MP_ROM_PTR(&pin_GPIO2) },
23+
{ MP_ROM_QSTR(MP_QSTR_IO3), MP_ROM_PTR(&pin_GPIO3) },
24+
{ MP_ROM_QSTR(MP_QSTR_IO4), MP_ROM_PTR(&pin_GPIO4) },
25+
{ MP_ROM_QSTR(MP_QSTR_IO5), MP_ROM_PTR(&pin_GPIO5) },
26+
{ MP_ROM_QSTR(MP_QSTR_IO6), MP_ROM_PTR(&pin_GPIO6) },
27+
{ MP_ROM_QSTR(MP_QSTR_IO7), MP_ROM_PTR(&pin_GPIO7) },
28+
{ MP_ROM_QSTR(MP_QSTR_IO8), MP_ROM_PTR(&pin_GPIO8) },
29+
{ MP_ROM_QSTR(MP_QSTR_IO9), MP_ROM_PTR(&pin_GPIO9) },
30+
{ MP_ROM_QSTR(MP_QSTR_IO10), MP_ROM_PTR(&pin_GPIO10) },
31+
{ MP_ROM_QSTR(MP_QSTR_IO11), MP_ROM_PTR(&pin_GPIO11) },
32+
{ MP_ROM_QSTR(MP_QSTR_IO12), MP_ROM_PTR(&pin_GPIO12) },
33+
{ MP_ROM_QSTR(MP_QSTR_IO13), MP_ROM_PTR(&pin_GPIO13) },
34+
{ MP_ROM_QSTR(MP_QSTR_IO14), MP_ROM_PTR(&pin_GPIO14) },
35+
{ MP_ROM_QSTR(MP_QSTR_IO15), MP_ROM_PTR(&pin_GPIO15) },
36+
{ MP_ROM_QSTR(MP_QSTR_IO16), MP_ROM_PTR(&pin_GPIO16) },
37+
{ MP_ROM_QSTR(MP_QSTR_IO17), MP_ROM_PTR(&pin_GPIO17) },
38+
39+
40+
{ MP_ROM_QSTR(MP_QSTR_IO18), MP_ROM_PTR(&pin_GPIO18) },
41+
{ MP_ROM_QSTR(MP_QSTR_IO19), MP_ROM_PTR(&pin_GPIO19) },
42+
{ MP_ROM_QSTR(MP_QSTR_IO20), MP_ROM_PTR(&pin_GPIO20) },
43+
{ MP_ROM_QSTR(MP_QSTR_IO21), MP_ROM_PTR(&pin_GPIO21) },
44+
{ MP_ROM_QSTR(MP_QSTR_IO26), MP_ROM_PTR(&pin_GPIO26) },
45+
{ MP_ROM_QSTR(MP_QSTR_IO33), MP_ROM_PTR(&pin_GPIO33) },
46+
{ MP_ROM_QSTR(MP_QSTR_IO34), MP_ROM_PTR(&pin_GPIO34) },
47+
{ MP_ROM_QSTR(MP_QSTR_IO35), MP_ROM_PTR(&pin_GPIO35) },
48+
{ MP_ROM_QSTR(MP_QSTR_IO36), MP_ROM_PTR(&pin_GPIO36) },
49+
{ MP_ROM_QSTR(MP_QSTR_IO37), MP_ROM_PTR(&pin_GPIO37) },
50+
{ MP_ROM_QSTR(MP_QSTR_IO38), MP_ROM_PTR(&pin_GPIO38) },
51+
{ MP_ROM_QSTR(MP_QSTR_IO39), MP_ROM_PTR(&pin_GPIO39) },
52+
{ MP_ROM_QSTR(MP_QSTR_IO40), MP_ROM_PTR(&pin_GPIO40) },
53+
{ MP_ROM_QSTR(MP_QSTR_IO41), MP_ROM_PTR(&pin_GPIO41) },
54+
{ MP_ROM_QSTR(MP_QSTR_IO42), MP_ROM_PTR(&pin_GPIO42) },
55+
{ MP_ROM_QSTR(MP_QSTR_TX), MP_ROM_PTR(&pin_GPIO43) },
56+
{ MP_ROM_QSTR(MP_QSTR_IO43), MP_ROM_PTR(&pin_GPIO43) },
57+
{ MP_ROM_QSTR(MP_QSTR_RX), MP_ROM_PTR(&pin_GPIO44) },
58+
{ MP_ROM_QSTR(MP_QSTR_IO44), MP_ROM_PTR(&pin_GPIO44) },
59+
{ MP_ROM_QSTR(MP_QSTR_IO45), MP_ROM_PTR(&pin_GPIO45) },
60+
{ MP_ROM_QSTR(MP_QSTR_IO46), MP_ROM_PTR(&pin_GPIO46) },
61+
62+
63+
{ MP_ROM_QSTR(MP_QSTR_NEOPIXEL), MP_ROM_PTR(&pin_GPIO45) },
64+
65+
{ MP_ROM_QSTR(MP_QSTR_CAMERA_XCLK), MP_ROM_PTR(&pin_GPIO1) },
66+
{ MP_ROM_QSTR(MP_QSTR_CAMERA_PCLK), MP_ROM_PTR(&pin_GPIO33) },
67+
{ MP_ROM_QSTR(MP_QSTR_CAMERA_HREF), MP_ROM_PTR(&pin_GPIO3) },
68+
{ MP_ROM_QSTR(MP_QSTR_CAMERA_VSYNC), MP_ROM_PTR(&pin_GPIO2) },
69+
{ MP_ROM_QSTR(MP_QSTR_CAMERA_SIOD), MP_ROM_PTR(&pin_GPIO8) },
70+
{ MP_ROM_QSTR(MP_QSTR_CAMERA_SIOC), MP_ROM_PTR(&pin_GPIO7) },
71+
72+
73+
{ MP_ROM_QSTR(MP_QSTR_CAMERA_DATA), MP_ROM_PTR(&camera_data_tuple) },
74+
{ MP_ROM_QSTR(MP_QSTR_CAMERA_D2), MP_ROM_PTR(&pin_GPIO36) },
75+
{ MP_ROM_QSTR(MP_QSTR_CAMERA_D3), MP_ROM_PTR(&pin_GPIO37) },
76+
{ MP_ROM_QSTR(MP_QSTR_CAMERA_D4), MP_ROM_PTR(&pin_GPIO41) },
77+
{ MP_ROM_QSTR(MP_QSTR_CAMERA_D5), MP_ROM_PTR(&pin_GPIO42) },
78+
{ MP_ROM_QSTR(MP_QSTR_CAMERA_D6), MP_ROM_PTR(&pin_GPIO39) },
79+
{ MP_ROM_QSTR(MP_QSTR_CAMERA_D7), MP_ROM_PTR(&pin_GPIO40) },
80+
{ MP_ROM_QSTR(MP_QSTR_CAMERA_D8), MP_ROM_PTR(&pin_GPIO21) },
81+
{ MP_ROM_QSTR(MP_QSTR_CAMERA_D9), MP_ROM_PTR(&pin_GPIO38) },
82+
83+
84+
{ MP_ROM_QSTR(MP_QSTR_TOUCH1), MP_ROM_PTR(&pin_GPIO1) },
85+
{ MP_ROM_QSTR(MP_QSTR_TOUCH2), MP_ROM_PTR(&pin_GPIO2) },
86+
{ MP_ROM_QSTR(MP_QSTR_TOUCH3), MP_ROM_PTR(&pin_GPIO3) },
87+
{ MP_ROM_QSTR(MP_QSTR_TOUCH4), MP_ROM_PTR(&pin_GPIO4) },
88+
{ MP_ROM_QSTR(MP_QSTR_TOUCH5), MP_ROM_PTR(&pin_GPIO5) },
89+
{ MP_ROM_QSTR(MP_QSTR_TOUCH6), MP_ROM_PTR(&pin_GPIO6) },
90+
{ MP_ROM_QSTR(MP_QSTR_TOUCH7), MP_ROM_PTR(&pin_GPIO7) },
91+
{ MP_ROM_QSTR(MP_QSTR_TOUCH8), MP_ROM_PTR(&pin_GPIO8) },
92+
{ MP_ROM_QSTR(MP_QSTR_TOUCH9), MP_ROM_PTR(&pin_GPIO9) },
93+
{ MP_ROM_QSTR(MP_QSTR_TOUCH10), MP_ROM_PTR(&pin_GPIO10) },
94+
{ MP_ROM_QSTR(MP_QSTR_TOUCH11), MP_ROM_PTR(&pin_GPIO11) },
95+
{ MP_ROM_QSTR(MP_QSTR_TOUCH12), MP_ROM_PTR(&pin_GPIO12) },
96+
{ MP_ROM_QSTR(MP_QSTR_TOUCH13), MP_ROM_PTR(&pin_GPIO13) },
97+
{ MP_ROM_QSTR(MP_QSTR_TOUCH14), MP_ROM_PTR(&pin_GPIO14) },
98+
99+
// LED FPC
100+
{ MP_ROM_QSTR(MP_QSTR_SCL), MP_ROM_PTR(&pin_GPIO7) },
101+
{ MP_ROM_QSTR(MP_QSTR_SDA), MP_ROM_PTR(&pin_GPIO8) },
102+
{ MP_ROM_QSTR(MP_QSTR_BT_ARRAY_ADC), MP_ROM_PTR(&pin_GPIO6) },
103+
104+
// 3.2 inch LCD FPC
105+
{ MP_ROM_QSTR(MP_QSTR_LCD_TP_MISO), MP_ROM_PTR(&pin_GPIO42) },
106+
{ MP_ROM_QSTR(MP_QSTR_LCD_TP_MOSI), MP_ROM_PTR(&pin_GPIO40) },
107+
{ MP_ROM_QSTR(MP_QSTR_LCD_TP_SCK), MP_ROM_PTR(&pin_GPIO38) },
108+
{ MP_ROM_QSTR(MP_QSTR_LCD_TP_CS), MP_ROM_PTR(&pin_GPIO33) },
109+
{ MP_ROM_QSTR(MP_QSTR_LCD_TP_IRQ), MP_ROM_PTR(&pin_GPIO2) },
110+
{ MP_ROM_QSTR(MP_QSTR_LCD_TP_BUSY), MP_ROM_PTR(&pin_GPIO4) },
111+
{ MP_ROM_QSTR(MP_QSTR_LCD_BL_CTR), MP_ROM_PTR(&pin_GPIO6) },
112+
{ MP_ROM_QSTR(MP_QSTR_LCD_MISO), MP_ROM_PTR(&pin_GPIO8) },
113+
{ MP_ROM_QSTR(MP_QSTR_LCD_MOSI), MP_ROM_PTR(&pin_GPIO9) },
114+
{ MP_ROM_QSTR(MP_QSTR_LCD_CS), MP_ROM_PTR(&pin_GPIO11) },
115+
{ MP_ROM_QSTR(MP_QSTR_LCD_D_C), MP_ROM_PTR(&pin_GPIO13) },
116+
{ MP_ROM_QSTR(MP_QSTR_LCD_CLK), MP_ROM_PTR(&pin_GPIO15) },
117+
{ MP_ROM_QSTR(MP_QSTR_LCD_RST), MP_ROM_PTR(&pin_GPIO16) },
118+
119+
// Audio
120+
{ MP_ROM_QSTR(MP_QSTR_AUDIO_SPI_MISO), MP_ROM_PTR(&pin_GPIO42) },
121+
{ MP_ROM_QSTR(MP_QSTR_AUDIO_SPI_MOSI), MP_ROM_PTR(&pin_GPIO40) },
122+
{ MP_ROM_QSTR(MP_QSTR_AUDIO_SPI_SCK), MP_ROM_PTR(&pin_GPIO38) },
123+
{ MP_ROM_QSTR(MP_QSTR_AUDIO_SPI_CS), MP_ROM_PTR(&pin_GPIO33) },
124+
{ MP_ROM_QSTR(MP_QSTR_AUDIO_BT_ADC), MP_ROM_PTR(&pin_GPIO6) },
125+
{ MP_ROM_QSTR(MP_QSTR_AUDIO_SCL), MP_ROM_PTR(&pin_GPIO7) },
126+
{ MP_ROM_QSTR(MP_QSTR_AUDIO_SDA), MP_ROM_PTR(&pin_GPIO8) },
127+
{ MP_ROM_QSTR(MP_QSTR_AUDIO_I2S0_MCLK), MP_ROM_PTR(&pin_GPIO41) },
128+
{ MP_ROM_QSTR(MP_QSTR_AUDIO_I2S0_BCLK), MP_ROM_PTR(&pin_GPIO39) },
129+
{ MP_ROM_QSTR(MP_QSTR_AUDIO_I2S0_LRCK), MP_ROM_PTR(&pin_GPIO21) },
130+
{ MP_ROM_QSTR(MP_QSTR_AUDIO_I2S0_SDI), MP_ROM_PTR(&pin_GPIO1) },
131+
{ MP_ROM_QSTR(MP_QSTR_AUDIO_I2S0_SDO), MP_ROM_PTR(&pin_GPIO3) },
132+
{ MP_ROM_QSTR(MP_QSTR_AUDIO_RST), MP_ROM_PTR(&pin_GPIO5) },
133+
{ MP_ROM_QSTR(MP_QSTR_AUDIO_WAKE_INT), MP_ROM_PTR(&pin_GPIO46) },
134+
{ MP_ROM_QSTR(MP_QSTR_AUDIO_I2S1_MCLK), MP_ROM_PTR(&pin_GPIO35) },
135+
{ MP_ROM_QSTR(MP_QSTR_AUDIO_PA_CTRL), MP_ROM_PTR(&pin_GPIO10) },
136+
{ MP_ROM_QSTR(MP_QSTR_AUDIO_I2S1_SDI), MP_ROM_PTR(&pin_GPIO34) },
137+
{ MP_ROM_QSTR(MP_QSTR_AUDIO_I2S1_SDO), MP_ROM_PTR(&pin_GPIO12) },
138+
{ MP_ROM_QSTR(MP_QSTR_AUDIO_I2S1_LRCK_DAC1), MP_ROM_PTR(&pin_GPIO17) },
139+
{ MP_ROM_QSTR(MP_QSTR_AUDIO_I2S1_BCLK_DAC2), MP_ROM_PTR(&pin_GPIO18) },
140+
141+
};
142+
MP_DEFINE_CONST_DICT(board_module_globals, board_global_dict_table);
Lines changed: 56 additions & 0 deletions
Original file line numberDiff line numberDiff line change
@@ -0,0 +1,56 @@
1+
# CONFIG_BOOTLOADER_COMPILER_OPTIMIZATION_SIZE is not set
2+
# CONFIG_COMPILER_OPTIMIZATION_SIZE is not set
3+
# CONFIG_COMPILER_OPTIMIZATION_ASSERTIONS_SILENT is not set
4+
# TWAI configuration
5+
#
6+
# CONFIG_TWAI_ISR_IN_IRAM is not set
7+
# end of TWAI configuration
8+
9+
#
10+
CONFIG_ESP32S2_SPIRAM_SUPPORT=y
11+
12+
#
13+
# SPI RAM config
14+
#
15+
# CONFIG_SPIRAM_TYPE_AUTO is not set
16+
CONFIG_SPIRAM_TYPE_ESPPSRAM16=y
17+
# CONFIG_SPIRAM_TYPE_ESPPSRAM32 is not set
18+
# CONFIG_SPIRAM_TYPE_ESPPSRAM64 is not set
19+
CONFIG_SPIRAM_SIZE=2097152
20+
21+
#
22+
# PSRAM clock and cs IO for ESP32S2
23+
#
24+
CONFIG_DEFAULT_PSRAM_CLK_IO=30
25+
CONFIG_DEFAULT_PSRAM_CS_IO=26
26+
# end of PSRAM clock and cs IO for ESP32S2
27+
28+
# CONFIG_SPIRAM_FETCH_INSTRUCTIONS is not set
29+
# CONFIG_SPIRAM_RODATA is not set
30+
# CONFIG_SPIRAM_USE_AHB_DBUS3 is not set
31+
# CONFIG_SPIRAM_SPEED_80M is not set
32+
CONFIG_SPIRAM_SPEED_40M=y
33+
# CONFIG_SPIRAM_SPEED_26M is not set
34+
# CONFIG_SPIRAM_SPEED_20M is not set
35+
CONFIG_SPIRAM=y
36+
CONFIG_SPIRAM_BOOT_INIT=y
37+
# CONFIG_SPIRAM_IGNORE_NOTFOUND is not set
38+
CONFIG_SPIRAM_USE_MEMMAP=y
39+
# CONFIG_SPIRAM_USE_CAPS_ALLOC is not set
40+
# CONFIG_SPIRAM_USE_MALLOC is not set
41+
CONFIG_SPIRAM_MEMTEST=y
42+
# CONFIG_SPIRAM_ALLOW_BSS_SEG_EXTERNAL_MEMORY is not set
43+
# end of SPI RAM config
44+
45+
# CONFIG_ESP_CONSOLE_UART_NONE is not set
46+
CONFIG_ESP_CONSOLE_UART_TX_GPIO=43
47+
CONFIG_ESP_CONSOLE_UART_RX_GPIO=44
48+
CONFIG_FREERTOS_TASK_FUNCTION_WRAPPER=y
49+
CONFIG_LWIP_TCP_HIGH_SPEED_RETRANSMISSION=y
50+
CONFIG_COMPILER_OPTIMIZATION_LEVEL_DEBUG=y
51+
# CONFIG_COMPILER_OPTIMIZATION_LEVEL_RELEASE is not set
52+
CONFIG_OPTIMIZATION_ASSERTIONS_ENABLED=y
53+
# CONFIG_OPTIMIZATION_ASSERTIONS_SILENT is not set
54+
# CONFIG_CONSOLE_UART_NONE is not set
55+
CONFIG_CONSOLE_UART_TX_GPIO=43
56+
CONFIG_CONSOLE_UART_RX_GPIO=44

tools/ci_check_duplicate_usb_vid_pid.py

Lines changed: 2 additions & 0 deletions
Original file line numberDiff line numberDiff line change
@@ -47,6 +47,8 @@
4747
"metro_m4_express",
4848
"unexpectedmaker_feathers2",
4949
"unexpectedmaker_feathers2_prerelease",
50+
"espressif_kaluga_1",
51+
"espressif_kaluga_1.3",
5052
]
5153

5254
cli_parser = argparse.ArgumentParser(description="USB VID/PID Duplicate Checker")

0 commit comments

Comments
 (0)