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Merge branch 'feature/ulp_riscv' into 'master'
feature/components: Initial support for ULP-RISC-V Coprocessor on esp32s2 Closes IDF-521 See merge request espressif/esp-idf!8781
2 parents 096ec3e + b6dba84 commit f83a61e

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lines changed

‎components/esp32s2/Kconfig

Lines changed: 8 additions & 1 deletion
Original file line numberDiff line numberDiff line change
@@ -302,7 +302,7 @@ menu "ESP32S2-specific"
302302
config ESP32S2_ULP_COPROC_RESERVE_MEM
303303
int
304304
prompt "RTC slow memory reserved for coprocessor" if ESP32S2_ULP_COPROC_ENABLED
305-
default 512 if ESP32S2_ULP_COPROC_ENABLED
305+
default 2048 if ESP32S2_ULP_COPROC_ENABLED
306306
range 32 8192 if ESP32S2_ULP_COPROC_ENABLED
307307
default 0 if !ESP32S2_ULP_COPROC_ENABLED
308308
range 0 0 if !ESP32S2_ULP_COPROC_ENABLED
@@ -311,6 +311,13 @@ menu "ESP32S2-specific"
311311

312312
Data is reserved at the beginning of RTC slow memory.
313313

314+
config ESP32S2_ULP_COPROC_RISCV
315+
bool "Enable RISC-V as ULP coprocessor"
316+
depends on ESP32S2_ULP_COPROC_ENABLED
317+
default n
318+
help
319+
Set this to y to use the RISC-V coprocessor instead of the FSM-ULP.
320+
314321
config ESP32S2_DEBUG_OCDAWARE
315322
bool "Make exception and panic handlers JTAG/OCD aware"
316323
default y

‎components/esp32s2/include/esp_sleep.h

Lines changed: 13 additions & 16 deletions
Original file line numberDiff line numberDiff line change
@@ -55,16 +55,18 @@ typedef enum {
5555
* @brief Sleep wakeup cause
5656
*/
5757
typedef enum {
58-
ESP_SLEEP_WAKEUP_UNDEFINED, //!< In case of deep sleep, reset was not caused by exit from deep sleep
59-
ESP_SLEEP_WAKEUP_ALL, //!< Not a wakeup cause, used to disable all wakeup sources with esp_sleep_disable_wakeup_source
60-
ESP_SLEEP_WAKEUP_EXT0, //!< Wakeup caused by external signal using RTC_IO
61-
ESP_SLEEP_WAKEUP_EXT1, //!< Wakeup caused by external signal using RTC_CNTL
62-
ESP_SLEEP_WAKEUP_TIMER, //!< Wakeup caused by timer
63-
ESP_SLEEP_WAKEUP_TOUCHPAD, //!< Wakeup caused by touchpad
64-
ESP_SLEEP_WAKEUP_ULP, //!< Wakeup caused by ULP program
65-
ESP_SLEEP_WAKEUP_GPIO, //!< Wakeup caused by GPIO (light sleep only)
66-
ESP_SLEEP_WAKEUP_UART, //!< Wakeup caused by UART (light sleep only)
67-
ESP_SLEEP_WAKEUP_WIFI, //!< Wakeup caused by WIFI (light sleep only)
58+
ESP_SLEEP_WAKEUP_UNDEFINED, //!< In case of deep sleep, reset was not caused by exit from deep sleep
59+
ESP_SLEEP_WAKEUP_ALL, //!< Not a wakeup cause, used to disable all wakeup sources with esp_sleep_disable_wakeup_source
60+
ESP_SLEEP_WAKEUP_EXT0, //!< Wakeup caused by external signal using RTC_IO
61+
ESP_SLEEP_WAKEUP_EXT1, //!< Wakeup caused by external signal using RTC_CNTL
62+
ESP_SLEEP_WAKEUP_TIMER, //!< Wakeup caused by timer
63+
ESP_SLEEP_WAKEUP_TOUCHPAD, //!< Wakeup caused by touchpad
64+
ESP_SLEEP_WAKEUP_ULP, //!< Wakeup caused by ULP program
65+
ESP_SLEEP_WAKEUP_GPIO, //!< Wakeup caused by GPIO (light sleep only)
66+
ESP_SLEEP_WAKEUP_UART, //!< Wakeup caused by UART (light sleep only)
67+
ESP_SLEEP_WAKEUP_WIFI, //!< Wakeup caused by WIFI (light sleep only)
68+
ESP_SLEEP_WAKEUP_COCPU, //!< Wakeup caused by COCPU int
69+
ESP_SLEEP_WAKEUP_COCPU_TRAP_TRIG, //!< Wakeup caused by COCPU crash
6870
} esp_sleep_source_t;
6971

7072
/* Leave this type define for compatibility */
@@ -90,14 +92,9 @@ esp_err_t esp_sleep_disable_wakeup_source(esp_sleep_source_t source);
9092

9193
/**
9294
* @brief Enable wakeup by ULP coprocessor
93-
* @note In revisions 0 and 1 of the ESP32, ULP wakeup source
94-
* can not be used when RTC_PERIPH power domain is forced
95-
* to be powered on (ESP_PD_OPTION_ON) or when ext0 wakeup
96-
* source is used.
95+
*
9796
* @return
9897
* - ESP_OK on success
99-
* - ESP_ERR_NOT_SUPPORTED if additional current by touch (CONFIG_ESP32_RTC_EXT_CRYST_ADDIT_CURRENT) is enabled.
100-
* - ESP_ERR_INVALID_STATE if ULP co-processor is not enabled or if wakeup triggers conflict
10198
*/
10299
esp_err_t esp_sleep_enable_ulp_wakeup(void);
103100

‎components/esp32s2/sleep_modes.c

Lines changed: 7 additions & 2 deletions
Original file line numberDiff line numberDiff line change
@@ -68,7 +68,7 @@
6868
typedef struct {
6969
esp_sleep_pd_option_t pd_options[ESP_PD_DOMAIN_MAX];
7070
uint64_t sleep_duration;
71-
uint32_t wakeup_triggers : 11;
71+
uint32_t wakeup_triggers : 15;
7272
uint32_t ext1_trigger_mode : 1;
7373
uint32_t ext1_rtc_gpio_mask : 18;
7474
uint32_t ext0_trigger_level : 1;
@@ -413,7 +413,8 @@ esp_err_t esp_sleep_disable_wakeup_source(esp_sleep_source_t source)
413413

414414
esp_err_t esp_sleep_enable_ulp_wakeup(void)
415415
{
416-
return ESP_ERR_NOT_SUPPORTED;
416+
s_config.wakeup_triggers |= (RTC_ULP_TRIG_EN | RTC_COCPU_TRIG_EN | RTC_COCPU_TRAP_TRIG_EN);
417+
return ESP_OK;
417418
}
418419

419420
esp_err_t esp_sleep_enable_timer_wakeup(uint64_t time_in_us)
@@ -633,6 +634,10 @@ esp_sleep_wakeup_cause_t esp_sleep_get_wakeup_cause(void)
633634
return ESP_SLEEP_WAKEUP_UART;
634635
} else if (wakeup_cause & RTC_WIFI_TRIG_EN) {
635636
return ESP_SLEEP_WAKEUP_WIFI;
637+
} else if (wakeup_cause & RTC_COCPU_TRIG_EN) {
638+
return ESP_SLEEP_WAKEUP_ULP;
639+
} else if (wakeup_cause & RTC_COCPU_TRAP_TRIG_EN) {
640+
return ESP_SLEEP_WAKEUP_COCPU_TRAP_TRIG;
636641
} else {
637642
return ESP_SLEEP_WAKEUP_UNDEFINED;
638643
}

‎components/soc/soc/esp32/include/soc/soc_caps.h

Lines changed: 2 additions & 2 deletions
Original file line numberDiff line numberDiff line change
@@ -12,5 +12,5 @@
1212
#define SOC_TWAI_SUPPORTED 1
1313
#define SOC_CAN_SUPPORTED SOC_TWAI_SUPPORTED
1414
#define SOC_EMAC_SUPPORTED 1
15-
16-
#define SOC_CPU_CORES_NUM 2
15+
#define SOC_RISCV_COPROC_SUPPORTED 0
16+
#define SOC_CPU_CORES_NUM 2

‎components/soc/soc/esp32s2/include/soc/soc.h

Lines changed: 5 additions & 0 deletions
Original file line numberDiff line numberDiff line change
@@ -93,6 +93,10 @@
9393
#define REG_SPI_MEM_BASE(i) (DR_REG_SPI0_BASE - (i) * 0x1000)
9494
#define REG_I2C_BASE(i) (DR_REG_I2C_EXT_BASE + (i) * 0x14000 )
9595

96+
//Convenient way to replace the register ops when ulp riscv projects
97+
//consume this file
98+
#ifndef ULP_RISCV_REGISTER_OPS
99+
96100
//Registers Operation {{
97101
#define ETS_UNCACHED_ADDR(addr) (addr)
98102
#define ETS_CACHED_ADDR(addr) (addr)
@@ -229,6 +233,7 @@
229233

230234
#endif /* !__ASSEMBLER__ */
231235
//}}
236+
#endif /* !ULP_RISCV_REGISTER_OPS */
232237

233238
//Periheral Clock {{
234239
#define APB_CLK_FREQ_ROM ( 40*1000000 )

‎components/soc/soc/esp32s2/include/soc/soc_caps.h

Lines changed: 1 addition & 0 deletions
Original file line numberDiff line numberDiff line change
@@ -8,3 +8,4 @@
88
#define SOC_TWAI_SUPPORTED 1
99
#define SOC_CPU_CORES_NUM 1
1010
#define SOC_SUPPORTS_SECURE_DL_MODE 1
11+
#define SOC_RISCV_COPROC_SUPPORTED 1

‎components/soc/src/esp32s2/rtc_sleep.c

Lines changed: 3 additions & 0 deletions
Original file line numberDiff line numberDiff line change
@@ -142,6 +142,9 @@ uint32_t rtc_sleep_start(uint32_t wakeup_opt, uint32_t reject_opt, uint32_t lslp
142142
/* Start entry into sleep mode */
143143
SET_PERI_REG_MASK(RTC_CNTL_STATE0_REG, RTC_CNTL_SLEEP_EN);
144144

145+
/* Set wait cycle for touch or COCPU after deep sleep. */
146+
REG_SET_FIELD(RTC_CNTL_TIMER2_REG, RTC_CNTL_ULPCP_TOUCH_START_WAIT, 0xFF);
147+
145148
while (GET_PERI_REG_MASK(RTC_CNTL_INT_RAW_REG,
146149
RTC_CNTL_SLP_REJECT_INT_RAW | RTC_CNTL_SLP_WAKEUP_INT_RAW) == 0) {
147150
;

‎components/ulp/CMakeLists.txt

Lines changed: 8 additions & 2 deletions
Original file line numberDiff line numberDiff line change
@@ -1,3 +1,9 @@
1-
idf_component_register(SRCS "ulp.c"
2-
"ulp_macro.c"
1+
set(srcs "ulp.c"
2+
"ulp_macro.c")
3+
4+
if(CONFIG_ESP32S2_ULP_COPROC_RISCV)
5+
list(APPEND srcs "ulp_riscv.c")
6+
endif()
7+
8+
idf_component_register(SRCS ${srcs}
39
INCLUDE_DIRS include)

‎components/ulp/cmake/CMakeLists.txt

Lines changed: 75 additions & 32 deletions
Original file line numberDiff line numberDiff line change
@@ -3,6 +3,8 @@ cmake_minimum_required(VERSION 3.5)
33
include(${IDF_PATH}/tools/cmake/utilities.cmake)
44
project(${ULP_APP_NAME} ASM C)
55

6+
option(ULP_COCPU_IS_RISCV "Use RISC-V based ULP" OFF)
7+
68
set(version_pattern "[a-z0-9\.-]+")
79

810
# Check assembler version
@@ -14,23 +16,30 @@ execute_process(
1416
string(REGEX MATCH "GNU assembler \\(GNU Binutils\\) (${version_pattern})" as_version ${as_output})
1517
set(as_version ${CMAKE_MATCH_1})
1618

19+
1720
message(STATUS "Building ULP app ${ULP_APP_NAME}")
18-
message(STATUS "ULP assembler version: ${as_version}")
1921

20-
# Check the supported assembler version
21-
file(STRINGS ${IDF_PATH}/components/ulp/toolchain_ulp_version.mk version_file_contents)
22-
string(REGEX MATCH "SUPPORTED_ULP_ASSEMBLER_VERSION = (${version_pattern})" as_supported_version ${version_file_contents})
23-
set(as_supported_version ${CMAKE_MATCH_1})
22+
if(ULP_COCPU_IS_RISCV)
23+
set(ULP_LD_TEMPLATE ${IDF_PATH}/components/ulp/ld/esp32s2.ulp.riscv.ld)
24+
else()
25+
message(STATUS "ULP assembler version: ${as_version}")
26+
27+
# Check the supported assembler version
28+
file(STRINGS ${IDF_PATH}/components/ulp/toolchain_ulp_version.mk version_file_contents)
29+
string(REGEX MATCH "SUPPORTED_ULP_ASSEMBLER_VERSION = (${version_pattern})" as_supported_version ${version_file_contents})
30+
set(as_supported_version ${CMAKE_MATCH_1})
31+
32+
if(NOT as_version STREQUAL as_supported_version)
33+
message(WARNING "WARNING: ULP assembler version ${as_version} is not supported. Expected to see version: \
34+
${as_supported_version}. Please check ESP-IDF ULP setup instructions and update \
35+
the toolchain, or proceed at your own risk.")
36+
endif()
2437

25-
if(NOT as_version STREQUAL as_supported_version)
26-
message(WARNING "WARNING: ULP assembler version ${as_version} is not supported. Expected to see version: \
27-
${as_supported_version}. Please check ESP-IDF ULP setup instructions and update \
28-
the toolchain, or proceed at your own risk.")
38+
set(ULP_LD_TEMPLATE ${IDF_PATH}/components/ulp/ld/esp32.ulp.ld)
2939
endif()
3040

31-
set(ULP_MAP_GEN ${PYTHON} ${IDF_PATH}/components/ulp/esp32ulp_mapgen.py)
32-
set(ULP_LD_TEMPLATE ${IDF_PATH}/components/ulp/ld/esp32.ulp.ld)
3341

42+
set(ULP_MAP_GEN ${PYTHON} ${IDF_PATH}/components/ulp/esp32ulp_mapgen.py)
3443
get_filename_component(sdkconfig_dir ${SDKCONFIG} DIRECTORY)
3544

3645
foreach(include ${COMPONENT_INCLUDES})
@@ -41,7 +50,7 @@ list(APPEND ULP_PREPROCESSOR_ARGS ${component_includes})
4150
list(APPEND ULP_PREPROCESSOR_ARGS -I${COMPONENT_DIR})
4251
list(APPEND ULP_PREPROCESSOR_ARGS -I${sdkconfig_dir})
4352

44-
include_directories(${component_includes})
53+
include_directories(${COMPONENT_INCLUDES})
4554

4655
list(APPEND ULP_PREPROCESSOR_ARGS -D__ASSEMBLER__)
4756

@@ -56,28 +65,62 @@ add_custom_target(${ULP_APP_NAME}_ld_script
5665
DEPENDS ${ULP_LD_SCRIPT}
5766
WORKING_DIRECTORY ${CMAKE_CURRENT_BINARY_DIR})
5867

59-
foreach(ulp_s_source ${ULP_S_SOURCES})
60-
get_filename_component(ulp_ps_source ${ulp_s_source} NAME_WE)
61-
set(ulp_ps_output ${CMAKE_CURRENT_BINARY_DIR}/${ulp_ps_source}.ulp.S)
62-
# Generate preprocessed assembly files.
63-
add_custom_command( OUTPUT ${ulp_ps_output}
64-
WORKING_DIRECTORY ${CMAKE_CURRENT_BINARY_DIR}
65-
COMMAND ${CMAKE_C_COMPILER} -E -P -xc ${ULP_PREPROCESSOR_ARGS} -o ${ulp_ps_output} ${ulp_s_source}
66-
DEPENDS ${ulp_s_source} ${ULP_LD_SCRIPT}
67-
VERBATIM)
68-
# During assembly file compilation, output listing files as well.
69-
set_source_files_properties(${ulp_ps_output}
70-
PROPERTIES COMPILE_FLAGS
71-
"-al=${CMAKE_CURRENT_BINARY_DIR}/${ulp_ps_source}.lst")
72-
list(APPEND ULP_PS_SOURCES ${ulp_ps_output})
73-
endforeach()
68+
if(ULP_COCPU_IS_RISCV)
69+
#risc-v ulp uses extra files for building:
70+
list(APPEND ULP_S_SOURCES
71+
"${IDF_PATH}/components/ulp/ulp_riscv/start.S"
72+
"${IDF_PATH}/components/ulp/ulp_riscv/ulp_riscv_utils.c")
73+
74+
#dummy loop to force pre-processed linker file generation:
75+
foreach(ulp_s_source ${ULP_S_SOURCES})
76+
set(noop ${ulp_s_source})
77+
78+
add_custom_command(OUTPUT ${noop}
79+
WORKING_DIRECTORY ${CMAKE_CURRENT_BINARY_DIR}
80+
COMMAND cmake -E echo
81+
DEPENDS ${ULP_LD_SCRIPT}
82+
)
83+
84+
set_source_files_properties(${noop} PROPERTIES NOOP_PROPERTY ${ULP_LD_SCRIPT})
85+
endforeach()
86+
87+
#creates the executable:
88+
add_executable(${ULP_APP_NAME} ${ULP_S_SOURCES})
89+
set(DUMP_SYMBOL_ARGS -g)
90+
set(MAP_GEN_EXTRA_ARGS --riscv)
91+
set(EXTRA_LINKER_ARGS "-nostartfiles -Wl,--gc-sections -Xlinker -Map=${CMAKE_CURRENT_BINARY_DIR}/${ULP_APP_NAME}.map")
92+
#Makes the csr utillies for riscv visible:
93+
target_include_directories(${ULP_APP_NAME} PRIVATE "${IDF_PATH}/components/ulp/ulp_riscv/include")
94+
95+
else()
96+
97+
foreach(ulp_s_source ${ULP_S_SOURCES})
98+
get_filename_component(ulp_ps_source ${ulp_s_source} NAME_WE)
99+
set(ulp_ps_output ${CMAKE_CURRENT_BINARY_DIR}/${ulp_ps_source}.ulp.S)
100+
# Generate preprocessed assembly files.
101+
add_custom_command( OUTPUT ${ulp_ps_output}
102+
WORKING_DIRECTORY ${CMAKE_CURRENT_BINARY_DIR}
103+
COMMAND ${CMAKE_C_COMPILER} -E -P -xc ${ULP_PREPROCESSOR_ARGS} -o ${ulp_ps_output} ${ulp_s_source}
104+
DEPENDS ${ulp_s_source} ${ULP_LD_SCRIPT}
105+
VERBATIM)
106+
# During assembly file compilation, output listing files as well.
107+
set_source_files_properties(${ulp_ps_output}
108+
PROPERTIES COMPILE_FLAGS
109+
"-al=${CMAKE_CURRENT_BINARY_DIR}/${ulp_ps_source}.lst")
110+
list(APPEND ULP_PS_SOURCES ${ulp_ps_output})
111+
endforeach()
112+
113+
# Create an executable
114+
add_executable(${ULP_APP_NAME} ${ULP_PS_SOURCES})
115+
set(DUMP_SYMBOL_ARGS -g -f posix)
116+
set(MAP_GEN_EXTRA_ARGS .)
117+
set(EXTRA_LINKER_ARGS "-Map=${CMAKE_CURRENT_BINARY_DIR}/${ULP_APP_NAME}.map")
74118

75-
# Create an executable
76-
add_executable(${ULP_APP_NAME} ${ULP_PS_SOURCES})
119+
endif()
77120

78121
# Dump the list of global symbols in a convenient format
79122
add_custom_command( OUTPUT ${ULP_APP_NAME}.sym
80-
COMMAND ${CMAKE_NM} -g -f posix $<TARGET_FILE:${ULP_APP_NAME}> > ${ULP_APP_NAME}.sym
123+
COMMAND ${CMAKE_NM} ${DUMP_SYMBOL_ARGS} $<TARGET_FILE:${ULP_APP_NAME}> > ${ULP_APP_NAME}.sym
81124
DEPENDS ${ULP_APP_NAME}
82125
WORKING_DIRECTORY ${CMAKE_CURRENT_BINARY_DIR})
83126

@@ -88,7 +131,7 @@ add_custom_command( OUTPUT ${ULP_APP_NAME}.bin
88131
WORKING_DIRECTORY ${CMAKE_CURRENT_BINARY_DIR})
89132

90133
add_custom_command( OUTPUT ${ULP_APP_NAME}.ld ${ULP_APP_NAME}.h
91-
COMMAND ${ULP_MAP_GEN} -s ${ULP_APP_NAME}.sym -o ${ULP_APP_NAME}
134+
COMMAND ${ULP_MAP_GEN} ${MAP_GEN_EXTRA_ARGS} -s ${ULP_APP_NAME}.sym -o ${ULP_APP_NAME}
92135
DEPENDS ${ULP_APP_NAME}.sym
93136
WORKING_DIRECTORY ${CMAKE_CURRENT_BINARY_DIR})
94137

@@ -100,4 +143,4 @@ add_custom_target(build
100143
${CMAKE_CURRENT_BINARY_DIR}/${ULP_APP_NAME}.h
101144
WORKING_DIRECTORY ${CMAKE_CURRENT_BINARY_DIR})
102145

103-
target_link_libraries(${ULP_APP_NAME} -T${CMAKE_CURRENT_BINARY_DIR}/${ULP_LD_SCRIPT} -Map=${CMAKE_CURRENT_BINARY_DIR}/${ULP_APP_NAME}.map)
146+
target_link_libraries(${ULP_APP_NAME} -T${CMAKE_CURRENT_BINARY_DIR}/${ULP_LD_SCRIPT} ${EXTRA_LINKER_ARGS})

‎components/ulp/cmake/toolchain-esp32s2-ulp-riscv.cmake

Lines changed: 18 additions & 0 deletions
Original file line numberDiff line numberDiff line change
@@ -0,0 +1,18 @@
1+
# CMake toolchain file for ULP-RISC-V
2+
set(CMAKE_SYSTEM_NAME Generic)
3+
4+
# Not best solution, needs to figure why the compiler detection
5+
# fails in CI
6+
set(CMAKE_C_COMPILER_FORCED TRUE)
7+
set(CMAKE_CXX_COMPILER_FORCED TRUE)
8+
9+
set(CMAKE_C_COMPILER "riscv-none-embed-gcc")
10+
set(CMAKE_ASM_COMPILER "riscv-none-embed-gcc")
11+
12+
if(NOT ASM_DIALECT)
13+
set(ASM_DIALECT "")
14+
endif()
15+
16+
set(CMAKE_C_FLAGS "-Os -march=rv32imc -mdiv -fdata-sections -ffunction-sections")
17+
set(CMAKE_ASM_FLAGS "-march=rv32imc -mdiv -x assembler-with-cpp -fdata-sections -ffunction-sections")
18+
set(CMAKE_EXE_LINKER_FLAGS "-march=rv32imc --specs=nano.specs --specs=nosys.specs")

‎components/ulp/component.mk

Lines changed: 1 addition & 0 deletions
Original file line numberDiff line numberDiff line change
@@ -0,0 +1 @@
1+
COMPONENT_OBJEXCLUDE := ulp_riscv.o

‎components/ulp/esp32ulp_mapgen.py

Lines changed: 23 additions & 1 deletion
Original file line numberDiff line numberDiff line change
@@ -19,7 +19,22 @@ def gen_ld_h_from_sym(f_sym, f_ld, f_h):
1919
f_h.write("#pragma once\n\n")
2020

2121
for line in f_sym:
22-
name, _, addr_str = line.split()
22+
name, _, addr_str = line.split(" ", 2)
23+
addr = int(addr_str, 16) + BASE_ADDR
24+
f_h.write("extern uint32_t ulp_{0};\n".format(name))
25+
f_ld.write("PROVIDE ( ulp_{0} = 0x{1:08x} );\n".format(name, addr))
26+
27+
28+
def gen_ld_h_from_sym_riscv(f_sym, f_ld, f_h):
29+
f_ld.write("/* Variable definitions for ESP32ULP linker\n")
30+
f_ld.write(" * This file is generated automatically by esp32ulp_mapgen.py utility.\n")
31+
f_ld.write(" */\n\n")
32+
f_h.write("// Variable definitions for ESP32ULP\n")
33+
f_h.write("// This file is generated automatically by esp32ulp_mapgen.py utility\n\n")
34+
f_h.write("#pragma once\n\n")
35+
36+
for line in f_sym:
37+
addr_str, _, name = line.split()
2338
addr = int(addr_str, 16) + BASE_ADDR
2439
f_h.write("extern uint32_t ulp_{0};\n".format(name))
2540
f_ld.write("PROVIDE ( ulp_{0} = 0x{1:08x} );\n".format(name, addr))
@@ -36,6 +51,8 @@ def main():
3651
parser.add_option("-o", "--outputfile", dest="outputfile",
3752
help="destination .h and .ld files name prefix", metavar="OUTFILE")
3853

54+
parser.add_option("--riscv", action="store_true", help="use format for ulp riscv .sym file")
55+
3956
(options, args) = parser.parse_args()
4057
if options.symfile is None:
4158
parser.print_help()
@@ -45,6 +62,11 @@ def main():
4562
parser.print_help()
4663
return 1
4764

65+
if options.riscv:
66+
with open(options.outputfile + ".h", 'w') as f_h, open(options.outputfile + ".ld", 'w') as f_ld, open(options.symfile) as f_sym:
67+
gen_ld_h_from_sym_riscv(f_sym, f_ld, f_h)
68+
return 0
69+
4870
with open(options.outputfile + ".h", 'w') as f_h, open(options.outputfile + ".ld", 'w') as f_ld, open(options.symfile) as f_sym:
4971
gen_ld_h_from_sym(f_sym, f_ld, f_h)
5072
return 0

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