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tannewttannewt
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Merge pull request #2789 from simmel-project/nrf52833
Add support for nrf52833
2 parents a4d86b9 + c04e6d6 commit ff9e388

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16 files changed

+507
-21
lines changed

16 files changed

+507
-21
lines changed

‎ports/nrf/Makefile

Lines changed: 5 additions & 0 deletions
Original file line numberDiff line numberDiff line change
@@ -182,6 +182,11 @@ SRC_C += \
182182
lib/tinyusb/src/portable/nordic/nrf5x/dcd_nrf5x.c
183183
endif
184184

185+
ifeq ($(MCU_SUB_VARIANT),nrf52833)
186+
SRC_C += \
187+
lib/tinyusb/src/portable/nordic/nrf5x/dcd_nrf5x.c
188+
endif
189+
185190
ifeq ($(CIRCUITPY_NETWORK),1)
186191
CFLAGS += -DMICROPY_PY_NETWORK=1
187192

‎ports/nrf/boards/common.template.ld

Lines changed: 2 additions & 2 deletions
Original file line numberDiff line numberDiff line change
@@ -5,7 +5,7 @@
55
/* Specify the memory areas */
66
MEMORY
77
{
8-
FLASH (rx) : ORIGIN = 0x00000000, LENGTH = 0x100000 /* entire flash, 1 MiB */
8+
FLASH (rx) : ORIGIN = 0x00000000, LENGTH = ${FLASH_SIZE} /* entire flash */
99
/* nRF SoftDevice */
1010
FLASH_MBR (rx) : ORIGIN = ${MBR_START_ADDR}, LENGTH = ${MBR_SIZE}
1111
FLASH_SD (rx) : ORIGIN = ${SD_FLASH_START_ADDR}, LENGTH = ${SD_FLASH_SIZE}
@@ -23,7 +23,7 @@ MEMORY
2323
/* To measure the minimum required amount of memory for given configuration, set this number
2424
high enough to work and then check the mutation of the value done by sd_ble_enable. */
2525
SPIM3_RAM (rw) : ORIGIN = 0x20000000 + ${SOFTDEVICE_RAM_SIZE}, LENGTH = ${SPIM3_BUFFER_SIZE}
26-
RAM (xrw) : ORIGIN = 0x20000000 + ${SOFTDEVICE_RAM_SIZE} + ${SPIM3_BUFFER_SIZE}, LENGTH = 256K - ${SOFTDEVICE_RAM_SIZE} -${SPIM3_BUFFER_SIZE}
26+
RAM (xrw) : ORIGIN = 0x20000000 + ${SOFTDEVICE_RAM_SIZE} + ${SPIM3_BUFFER_SIZE}, LENGTH = ${RAM_SIZE} - ${SOFTDEVICE_RAM_SIZE} -${SPIM3_BUFFER_SIZE}
2727

2828
}
2929

‎ports/nrf/common-hal/_bleio/Adapter.c

Lines changed: 25 additions & 5 deletions
Original file line numberDiff line numberDiff line change
@@ -56,6 +56,26 @@
5656
#define BLE_SLAVE_LATENCY 0
5757
#define BLE_CONN_SUP_TIMEOUT MSEC_TO_UNITS(4000, UNIT_10_MS)
5858

59+
#ifndef BLEIO_VS_UUID_COUNT
60+
#define BLEIO_VS_UUID_COUNT 75
61+
#endif
62+
63+
#ifndef BLEIO_HVN_TX_QUEUE_SIZE
64+
#define BLEIO_HVN_TX_QUEUE_SIZE 9
65+
#endif
66+
67+
#ifndef BLEIO_CENTRAL_ROLE_COUNT
68+
#define BLEIO_CENTRAL_ROLE_COUNT 4
69+
#endif
70+
71+
#ifndef BLEIO_PERIPH_ROLE_COUNT
72+
#define BLEIO_PERIPH_ROLE_COUNT 4
73+
#endif
74+
75+
#ifndef BLEIO_ATTR_TAB_SIZE
76+
#define BLEIO_ATTR_TAB_SIZE (BLE_GATTS_ATTR_TAB_SIZE_DEFAULT * 5)
77+
#endif
78+
5979
const nvm_bytearray_obj_t common_hal_bleio_nvm_obj = {
6080
.base = {
6181
.type = &nvm_bytearray_type,
@@ -124,9 +144,9 @@ STATIC uint32_t ble_stack_enable(void) {
124144
// adv_set_count must be == 1 for S140. Cannot be increased.
125145
ble_conf.gap_cfg.role_count_cfg.adv_set_count = 1;
126146
// periph_role_count costs 1232 bytes for 2 to 3, then ~1840 for each further increment.
127-
ble_conf.gap_cfg.role_count_cfg.periph_role_count = 4;
147+
ble_conf.gap_cfg.role_count_cfg.periph_role_count = BLEIO_PERIPH_ROLE_COUNT;
128148
// central_role_count costs 648 bytes for 1 to 2, then ~1250 for each further increment.
129-
ble_conf.gap_cfg.role_count_cfg.central_role_count = 4;
149+
ble_conf.gap_cfg.role_count_cfg.central_role_count = BLEIO_CENTRAL_ROLE_COUNT;
130150
err_code = sd_ble_cfg_set(BLE_GAP_CFG_ROLE_COUNT, &ble_conf, app_ram_start);
131151
if (err_code != NRF_SUCCESS) {
132152
return err_code;
@@ -137,7 +157,7 @@ STATIC uint32_t ble_stack_enable(void) {
137157
// Each increment to hvn_tx_queue_size costs 2064 bytes.
138158
// DevZone recommends not setting this directly, but instead changing gap_conn_cfg.event_length.
139159
// However, we are setting connection extension, so this seems to make sense.
140-
ble_conf.conn_cfg.params.gatts_conn_cfg.hvn_tx_queue_size = 9;
160+
ble_conf.conn_cfg.params.gatts_conn_cfg.hvn_tx_queue_size = BLEIO_HVN_TX_QUEUE_SIZE;
141161
err_code = sd_ble_cfg_set(BLE_CONN_CFG_GATTS, &ble_conf, app_ram_start);
142162
if (err_code != NRF_SUCCESS) {
143163
return err_code;
@@ -156,7 +176,7 @@ STATIC uint32_t ble_stack_enable(void) {
156176
// and anything the user does.
157177
memset(&ble_conf, 0, sizeof(ble_conf));
158178
// Each increment to the BLE_GATTS_ATTR_TAB_SIZE_DEFAULT multiplier costs 1408 bytes.
159-
ble_conf.gatts_cfg.attr_tab_size.attr_tab_size = BLE_GATTS_ATTR_TAB_SIZE_DEFAULT * 5;
179+
ble_conf.gatts_cfg.attr_tab_size.attr_tab_size = BLEIO_ATTR_TAB_SIZE;
160180
err_code = sd_ble_cfg_set(BLE_GATTS_CFG_ATTR_TAB_SIZE, &ble_conf, app_ram_start);
161181
if (err_code != NRF_SUCCESS) {
162182
return err_code;
@@ -166,7 +186,7 @@ STATIC uint32_t ble_stack_enable(void) {
166186
// service and characteristic.
167187
memset(&ble_conf, 0, sizeof(ble_conf));
168188
// Each additional vs_uuid_count costs 16 bytes.
169-
ble_conf.common_cfg.vs_uuid_cfg.vs_uuid_count = 75; // Defaults to 10.
189+
ble_conf.common_cfg.vs_uuid_cfg.vs_uuid_count = BLEIO_VS_UUID_COUNT; // Defaults to 10.
170190
err_code = sd_ble_cfg_set(BLE_COMMON_CFG_VS_UUID, &ble_conf, app_ram_start);
171191
if (err_code != NRF_SUCCESS) {
172192
return err_code;

‎ports/nrf/common-hal/_bleio/Adapter.h

Lines changed: 2 additions & 0 deletions
Original file line numberDiff line numberDiff line change
@@ -35,7 +35,9 @@
3535
#include "shared-bindings/_bleio/Connection.h"
3636
#include "shared-bindings/_bleio/ScanResults.h"
3737

38+
#ifndef BLEIO_TOTAL_CONNECTION_COUNT
3839
#define BLEIO_TOTAL_CONNECTION_COUNT 5
40+
#endif
3941

4042
extern bleio_connection_internal_t bleio_connections[BLEIO_TOTAL_CONNECTION_COUNT];
4143

‎ports/nrf/common-hal/microcontroller/__init__.c

Lines changed: 12 additions & 0 deletions
Original file line numberDiff line numberDiff line change
@@ -168,5 +168,17 @@ STATIC const mp_rom_map_elem_t mcu_pin_globals_table[] = {
168168
{ MP_ROM_QSTR(MP_QSTR_P1_14), MP_ROM_PTR(&pin_P1_14) },
169169
{ MP_ROM_QSTR(MP_QSTR_P1_15), MP_ROM_PTR(&pin_P1_15) },
170170
#endif
171+
#ifdef NRF52833
172+
{ MP_ROM_QSTR(MP_QSTR_P1_00), MP_ROM_PTR(&pin_P1_00) },
173+
{ MP_ROM_QSTR(MP_QSTR_P1_01), MP_ROM_PTR(&pin_P1_01) },
174+
{ MP_ROM_QSTR(MP_QSTR_P1_02), MP_ROM_PTR(&pin_P1_02) },
175+
{ MP_ROM_QSTR(MP_QSTR_P1_03), MP_ROM_PTR(&pin_P1_03) },
176+
{ MP_ROM_QSTR(MP_QSTR_P1_04), MP_ROM_PTR(&pin_P1_04) },
177+
{ MP_ROM_QSTR(MP_QSTR_P1_05), MP_ROM_PTR(&pin_P1_05) },
178+
{ MP_ROM_QSTR(MP_QSTR_P1_06), MP_ROM_PTR(&pin_P1_06) },
179+
{ MP_ROM_QSTR(MP_QSTR_P1_07), MP_ROM_PTR(&pin_P1_07) },
180+
{ MP_ROM_QSTR(MP_QSTR_P1_08), MP_ROM_PTR(&pin_P1_08) },
181+
{ MP_ROM_QSTR(MP_QSTR_P1_09), MP_ROM_PTR(&pin_P1_09) },
182+
#endif
171183
};
172184
MP_DEFINE_CONST_DICT(mcu_pin_globals, mcu_pin_globals_table);

‎ports/nrf/device/nrf52/startup_nrf52833.c

Lines changed: 184 additions & 0 deletions
Original file line numberDiff line numberDiff line change
@@ -0,0 +1,184 @@
1+
/*
2+
* This file is part of the MicroPython project, http://micropython.org/
3+
*
4+
* The MIT License (MIT)
5+
*
6+
* Copyright (c) 2017 Glenn Ruben Bakke
7+
*
8+
* Permission is hereby granted, free of charge, to any person obtaining a copy
9+
* of this software and associated documentation files (the "Software"), to deal
10+
* in the Software without restriction, including without limitation the rights
11+
* to use, copy, modify, merge, publish, distribute, sublicense, and/or sell
12+
* copies of the Software, and to permit persons to whom the Software is
13+
* furnished to do so, subject to the following conditions:
14+
*
15+
* The above copyright notice and this permission notice shall be included in
16+
* all copies or substantial portions of the Software.
17+
*
18+
* THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
19+
* IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
20+
* FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE
21+
* AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
22+
* LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM,
23+
* OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN
24+
* THE SOFTWARE.
25+
*/
26+
27+
#include <stdint.h>
28+
29+
extern uint32_t _estack;
30+
extern uint32_t _sidata;
31+
extern uint32_t _sdata;
32+
extern uint32_t _edata;
33+
extern uint32_t _sbss;
34+
extern uint32_t _ebss;
35+
36+
typedef void (*func)(void);
37+
38+
#define _start main
39+
40+
extern void _start(void) __attribute__((noreturn));
41+
extern void SystemInit(void);
42+
43+
void Default_Handler(void) {
44+
while (1);
45+
}
46+
47+
void Reset_Handler(void) {
48+
uint32_t * p_src = &_sidata;
49+
uint32_t * p_dest = &_sdata;
50+
51+
while (p_dest < &_edata) {
52+
*p_dest++ = *p_src++;
53+
}
54+
55+
uint32_t * p_bss = &_sbss;
56+
uint32_t * p_bss_end = &_ebss;
57+
while (p_bss < p_bss_end) {
58+
*p_bss++ = 0ul;
59+
}
60+
61+
SystemInit();
62+
_start();
63+
}
64+
65+
void NMI_Handler (void) __attribute__ ((weak, alias("Default_Handler")));
66+
void HardFault_Handler (void) __attribute__ ((weak, alias("Default_Handler")));
67+
void MemoryManagement_Handler (void) __attribute__ ((weak, alias("Default_Handler")));
68+
void BusFault_Handler (void) __attribute__ ((weak, alias("Default_Handler")));
69+
void UsageFault_Handler (void) __attribute__ ((weak, alias("Default_Handler")));
70+
void SVC_Handler (void) __attribute__ ((weak, alias("Default_Handler")));
71+
void DebugMon_Handler (void) __attribute__ ((weak, alias("Default_Handler")));
72+
void PendSV_Handler (void) __attribute__ ((weak, alias("Default_Handler")));
73+
void SysTick_Handler (void) __attribute__ ((weak, alias("Default_Handler")));
74+
75+
void POWER_CLOCK_IRQHandler (void) __attribute__ ((weak, alias("Default_Handler")));
76+
void RADIO_IRQHandler (void) __attribute__ ((weak, alias("Default_Handler")));
77+
void UARTE0_UART0_IRQHandler (void) __attribute__ ((weak, alias("Default_Handler")));
78+
void SPIM0_SPIS0_TWIM0_TWIS0_SPI0_TWI0_IRQHandler (void) __attribute__ ((weak, alias("Default_Handler")));
79+
void SPIM1_SPIS1_TWIM1_TWIS1_SPI1_TWI1_IRQHandler (void) __attribute__ ((weak, alias("Default_Handler")));
80+
void NFCT_IRQHandler (void) __attribute__ ((weak, alias("Default_Handler")));
81+
void GPIOTE_IRQHandler (void) __attribute__ ((weak, alias("Default_Handler")));
82+
void SAADC_IRQHandler (void) __attribute__ ((weak, alias("Default_Handler")));
83+
void TIMER0_IRQHandler (void) __attribute__ ((weak, alias("Default_Handler")));
84+
void TIMER1_IRQHandler (void) __attribute__ ((weak, alias("Default_Handler")));
85+
void TIMER2_IRQHandler (void) __attribute__ ((weak, alias("Default_Handler")));
86+
void RTC0_IRQHandler (void) __attribute__ ((weak, alias("Default_Handler")));
87+
void TEMP_IRQHandler (void) __attribute__ ((weak, alias("Default_Handler")));
88+
void RNG_IRQHandler (void) __attribute__ ((weak, alias("Default_Handler")));
89+
void ECB_IRQHandler (void) __attribute__ ((weak, alias("Default_Handler")));
90+
void CCM_AAR_IRQHandler (void) __attribute__ ((weak, alias("Default_Handler")));
91+
void WDT_IRQHandler (void) __attribute__ ((weak, alias("Default_Handler")));
92+
void RTC1_IRQHandler (void) __attribute__ ((weak, alias("Default_Handler")));
93+
void QDEC_IRQHandler (void) __attribute__ ((weak, alias("Default_Handler")));
94+
void COMP_LPCOMP_IRQHandler (void) __attribute__ ((weak, alias("Default_Handler")));
95+
void SWI0_EGU0_IRQHandler (void) __attribute__ ((weak, alias("Default_Handler")));
96+
void SWI1_EGU1_IRQHandler (void) __attribute__ ((weak, alias("Default_Handler")));
97+
void SWI2_EGU2_IRQHandler (void) __attribute__ ((weak, alias("Default_Handler")));
98+
void SWI3_EGU3_IRQHandler (void) __attribute__ ((weak, alias("Default_Handler")));
99+
void SWI4_EGU4_IRQHandler (void) __attribute__ ((weak, alias("Default_Handler")));
100+
void SWI5_EGU5_IRQHandler (void) __attribute__ ((weak, alias("Default_Handler")));
101+
void TIMER3_IRQHandler (void) __attribute__ ((weak, alias("Default_Handler")));
102+
void TIMER4_IRQHandler (void) __attribute__ ((weak, alias("Default_Handler")));
103+
void PWM0_IRQHandler (void) __attribute__ ((weak, alias("Default_Handler")));
104+
void PDM_IRQHandler (void) __attribute__ ((weak, alias("Default_Handler")));
105+
void MWU_IRQHandler (void) __attribute__ ((weak, alias("Default_Handler")));
106+
void PWM1_IRQHandler (void) __attribute__ ((weak, alias("Default_Handler")));
107+
void PWM2_IRQHandler (void) __attribute__ ((weak, alias("Default_Handler")));
108+
void SPIM2_SPIS2_SPI2_IRQHandler (void) __attribute__ ((weak, alias("Default_Handler")));
109+
void RTC2_IRQHandler (void) __attribute__ ((weak, alias("Default_Handler")));
110+
void I2S_IRQHandler (void) __attribute__ ((weak, alias("Default_Handler")));
111+
void FPU_IRQHandler (void) __attribute__ ((weak, alias("Default_Handler")));
112+
void USBD_IRQHandler (void) __attribute__ ((weak, alias("Default_Handler")));
113+
void UARTE1_IRQHandler (void) __attribute__ ((weak, alias("Default_Handler")));
114+
void PWM3_IRQHandler (void) __attribute__ ((weak, alias("Default_Handler")));
115+
void SPIM3_IRQHandler (void) __attribute__ ((weak, alias("Default_Handler")));
116+
117+
const func __Vectors[] __attribute__ ((used, section(".isr_vector"))) = {
118+
(func)&_estack,
119+
Reset_Handler,
120+
NMI_Handler,
121+
HardFault_Handler,
122+
MemoryManagement_Handler,
123+
BusFault_Handler,
124+
UsageFault_Handler,
125+
0,
126+
0,
127+
0,
128+
0,
129+
SVC_Handler,
130+
DebugMon_Handler,
131+
0,
132+
PendSV_Handler,
133+
SysTick_Handler,
134+
135+
/* External Interrupts */
136+
POWER_CLOCK_IRQHandler,
137+
RADIO_IRQHandler,
138+
UARTE0_UART0_IRQHandler,
139+
SPIM0_SPIS0_TWIM0_TWIS0_SPI0_TWI0_IRQHandler,
140+
SPIM1_SPIS1_TWIM1_TWIS1_SPI1_TWI1_IRQHandler,
141+
NFCT_IRQHandler,
142+
GPIOTE_IRQHandler,
143+
SAADC_IRQHandler,
144+
TIMER0_IRQHandler,
145+
TIMER1_IRQHandler,
146+
TIMER2_IRQHandler,
147+
RTC0_IRQHandler,
148+
TEMP_IRQHandler,
149+
RNG_IRQHandler,
150+
ECB_IRQHandler,
151+
CCM_AAR_IRQHandler,
152+
WDT_IRQHandler,
153+
RTC1_IRQHandler,
154+
QDEC_IRQHandler,
155+
COMP_LPCOMP_IRQHandler,
156+
SWI0_EGU0_IRQHandler,
157+
SWI1_EGU1_IRQHandler,
158+
SWI2_EGU2_IRQHandler,
159+
SWI3_EGU3_IRQHandler,
160+
SWI4_EGU4_IRQHandler,
161+
SWI5_EGU5_IRQHandler,
162+
TIMER3_IRQHandler,
163+
TIMER4_IRQHandler,
164+
PWM0_IRQHandler,
165+
PDM_IRQHandler,
166+
0,
167+
0,
168+
MWU_IRQHandler,
169+
PWM1_IRQHandler,
170+
PWM2_IRQHandler,
171+
SPIM2_SPIS2_SPI2_IRQHandler,
172+
RTC2_IRQHandler,
173+
I2S_IRQHandler,
174+
FPU_IRQHandler,
175+
USBD_IRQHandler,
176+
UARTE1_IRQHandler,
177+
0,
178+
0,
179+
0,
180+
0,
181+
PWM3_IRQHandler,
182+
0,
183+
SPIM3_IRQHandler,
184+
};

‎ports/nrf/ld_defines.c

Lines changed: 3 additions & 0 deletions
Original file line numberDiff line numberDiff line change
@@ -9,6 +9,9 @@
99
// The next line is a marker to start looking for definitions. Lines above the next line are ignored.
1010
// START_LD_DEFINES
1111

12+
/*FLASH_SIZE=*/ FLASH_SIZE;
13+
/*RAM_SIZE=*/ RAM_SIZE;
14+
1215
/*MBR_START_ADDR=*/ MBR_START_ADDR;
1316
/*MBR_SIZE=*/ MBR_SIZE;
1417

‎ports/nrf/mpconfigport.h

Lines changed: 23 additions & 4 deletions
Original file line numberDiff line numberDiff line change
@@ -36,16 +36,30 @@
3636

3737
// Max RAM used by SoftDevice. Can be changed when SoftDevice parameters are changed.
3838
// See common.template.ld.
39+
#ifndef SOFTDEVICE_RAM_SIZE
3940
#define SOFTDEVICE_RAM_SIZE (64*1024)
41+
#endif
4042

4143
#ifdef NRF52840
4244
#define MICROPY_PY_SYS_PLATFORM "nRF52840"
4345
#define FLASH_SIZE (0x100000) // 1MiB
46+
#define RAM_SIZE (0x40000) // 256 KiB
4447
// Special RAM area for SPIM3 transmit buffer, to work around hardware bug.
4548
// See common.template.ld.
4649
#define SPIM3_BUFFER_SIZE (8192)
4750
#endif
4851

52+
#ifdef NRF52833
53+
#define MICROPY_PY_SYS_PLATFORM "nRF52833"
54+
#define FLASH_SIZE (0x80000) // 512 KiB
55+
#define RAM_SIZE (0x20000) // 128 KiB
56+
// Special RAM area for SPIM3 transmit buffer, to work around hardware bug.
57+
// See common.template.ld.
58+
#ifndef SPIM3_BUFFER_SIZE
59+
#define SPIM3_BUFFER_SIZE (8192)
60+
#endif
61+
#endif
62+
4963
#define MICROPY_PY_COLLECTIONS_ORDEREDDICT (1)
5064
#define MICROPY_PY_FUNCTION_ATTRS (1)
5165
#define MICROPY_PY_IO (1)
@@ -112,25 +126,30 @@
112126
// Define these regions starting down from the bootloader:
113127

114128
// Bootloader values from https://github.com/adafruit/Adafruit_nRF52_Bootloader/blob/master/src/linker/s140_v6.ld
115-
#define BOOTLOADER_START_ADDR (0x000F4000)
129+
#define BOOTLOADER_START_ADDR (FLASH_SIZE - BOOTLOADER_SIZE - BOOTLOADER_SETTINGS_SIZE - BOOTLOADER_MBR_SIZE)
130+
#define BOOTLOADER_MBR_SIZE (0x1000) // 4kib
131+
#ifndef BOOTLOADER_SIZE
116132
#define BOOTLOADER_SIZE (0xA000) // 40kiB
117-
#define BOOTLOADER_SETTINGS_START_ADDR (0x000FF000)
133+
#endif
134+
#define BOOTLOADER_SETTINGS_START_ADDR (FLASH_SIZE - BOOTLOADER_SETTINGS_SIZE)
118135
#define BOOTLOADER_SETTINGS_SIZE (0x1000) // 4kiB
119136

120137
#define CIRCUITPY_INTERNAL_FLASH_FILESYSTEM_START_ADDR (BOOTLOADER_START_ADDR - CIRCUITPY_INTERNAL_FLASH_FILESYSTEM_SIZE)
121138

122-
#if CIRCUITPY_INTERNAL_FLASH_FILESYSTEM_SIZE > 0 && CIRCUITPY_INTERNAL_FLASH_FILESYSTEM_START_ADDR != (BOOTLOADER_START_ADDR - 256*1024)
139+
#if CIRCUITPY_INTERNAL_FLASH_FILESYSTEM_SIZE > 0 && CIRCUITPY_INTERNAL_FLASH_FILESYSTEM_START_ADDR != (BOOTLOADER_START_ADDR - CIRCUITPY_INTERNAL_FLASH_FILESYSTEM_SIZE)
123140
#warning Internal flash filesystem location has moved!
124141
#endif
125142

126143
#define CIRCUITPY_INTERNAL_NVM_START_ADDR (CIRCUITPY_INTERNAL_FLASH_FILESYSTEM_START_ADDR - CIRCUITPY_INTERNAL_NVM_SIZE)
127144

128145
// 32kiB for bonding, etc.
146+
#ifndef CIRCUITPY_BLE_CONFIG_SIZE
129147
#define CIRCUITPY_BLE_CONFIG_SIZE (32*1024)
148+
#endif
130149
#define CIRCUITPY_BLE_CONFIG_START_ADDR (CIRCUITPY_INTERNAL_NVM_START_ADDR - CIRCUITPY_BLE_CONFIG_SIZE)
131150

132151
// The firmware space is the space left over between the fixed lower and upper regions.
133-
#define CIRCUITPY_FIRMWARE_SIZE (CIRCUITPY_INTERNAL_FLASH_FILESYSTEM_START_ADDR - CIRCUITPY_FIRMWARE_START_ADDR)
152+
#define CIRCUITPY_FIRMWARE_SIZE (CIRCUITPY_INTERNAL_FLASH_FILESYSTEM_START_ADDR - CIRCUITPY_FIRMWARE_START_ADDR - CIRCUITPY_BLE_CONFIG_SIZE)
134153

135154
#if BOOTLOADER_START_ADDR % FLASH_ERASE_SIZE != 0
136155
#error BOOTLOADER_START_ADDR must be on a flash erase boundary.

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