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SI-8054 Fix regression in TypeRef rebind with val overriding object
Regressed in 8076738 / SI-7928 The condition added in that commit are necessary after refchecks but poisonous before. This still seems rather fragile: I wonder if `eliminateModuleDefs` in `RefChecks` ought to flag the module symbol as `ARTIFACT` after creating the accessor, so as to signal that it shouldn't be bound anymore?
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src/reflect/scala/reflect/internal/Types.scala

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@@ -3392,11 +3392,14 @@ trait Types
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/** Rebind symbol `sym` to an overriding member in type `pre`. */
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private def rebind(pre: Type, sym: Symbol): Symbol = {
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if (!sym.isOverridableMember || sym.owner == pre.typeSymbol) sym
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else pre.nonPrivateMember(sym.name).suchThat(sym =>
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// SI-7928 `isModuleNotMethod` is here to avoid crashing with overloaded module accessor and module symbols
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// after refchecks eliminates a ModuleDef that implements and interface.
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sym.isType || (!sym.isModuleNotMethod && sym.isStable && !sym.hasVolatileType)
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) orElse sym
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else pre.nonPrivateMember(sym.name).suchThat { sym =>
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// SI-7928 `isModuleNotMethod` is here to avoid crashing with spuriously "overloaded" module accessor and module symbols.
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// These appear after refchecks eliminates ModuleDefs that implement an interface.
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// Here, we exclude the module symbol, which allows us to bind to the accessor.
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// SI-8054 We must only do this after refchecks, otherwise we exclude the module symbol which does not yet have an accessor!
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val isModuleWithAccessor = phase.refChecked && sym.isModuleNotMethod
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sym.isType || (!isModuleWithAccessor && sym.isStable && !sym.hasVolatileType)
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} orElse sym
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}
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/** Convert a `super` prefix to a this-type if `sym` is abstract or final. */

test/files/pos/t8054.scala

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@@ -0,0 +1,31 @@
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trait D {
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trait Manifest {
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class Entry
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}
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val M: Manifest
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def m: M.Entry = ???
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}
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object D1 extends D {
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object M extends Manifest
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}
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object D2 extends D {
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val M: Manifest = ???
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}
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object Hello {
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def main(args: Array[String]) {
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// 2.10.3 - ok
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// 2.11.0-M7 - type mismatch; found : Seq[DB1.MANIFEST.Entry]
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// required: Seq[DB1.MANIFEST.Entry]
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val t1: D1.M.Entry = D1.m
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// 2.10.3 - ok
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// 2.11.0-M7 - ok
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val t2: D2.M.Entry = D2.m
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}
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}

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