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Revert "[AMDGPU] SIFixSgprCopies should not process twice VGPR to SGPR copies inserted by PHI preprocessing. (llvm#134153)"
This reverts commit 0563569. Breaks tests, see comments on llvm#134153
1 parent 61a7289 commit 464035f

38 files changed

+7016
-8192
lines changed

llvm/lib/Target/AMDGPU/SIFixSGPRCopies.cpp

Lines changed: 6 additions & 8 deletions
Original file line numberDiff line numberDiff line change
@@ -127,7 +127,6 @@ class SIFixSGPRCopies {
127127
unsigned NextVGPRToSGPRCopyID = 0;
128128
MapVector<unsigned, V2SCopyInfo> V2SCopies;
129129
DenseMap<MachineInstr *, SetVector<unsigned>> SiblingPenalty;
130-
DenseSet<MachineInstr *> PHISources;
131130

132131
public:
133132
MachineRegisterInfo *MRI;
@@ -692,8 +691,10 @@ bool SIFixSGPRCopies::run(MachineFunction &MF) {
692691
TII->get(AMDGPU::COPY), NewDst)
693692
.addReg(MO.getReg());
694693
MO.setReg(NewDst);
694+
695+
// FIXME: We are transitively revisiting users of this
696+
// instruction for every input.
695697
analyzeVGPRToSGPRCopy(NewCopy);
696-
PHISources.insert(NewCopy);
697698
}
698699
}
699700
}
@@ -800,7 +801,6 @@ bool SIFixSGPRCopies::run(MachineFunction &MF) {
800801
RegSequences.clear();
801802
PHINodes.clear();
802803
S2VCopies.clear();
803-
PHISources.clear();
804804

805805
return true;
806806
}
@@ -926,13 +926,13 @@ bool SIFixSGPRCopies::lowerSpecialCase(MachineInstr &MI,
926926
}
927927

928928
void SIFixSGPRCopies::analyzeVGPRToSGPRCopy(MachineInstr* MI) {
929-
if (PHISources.contains(MI))
930-
return;
931929
Register DstReg = MI->getOperand(0).getReg();
932930
const TargetRegisterClass *DstRC = MRI->getRegClass(DstReg);
933931

934932
V2SCopyInfo Info(getNextVGPRToSGPRCopyId(), MI,
935933
TRI->getRegSizeInBits(*DstRC));
934+
V2SCopies[Info.ID] = Info;
935+
936936
SmallVector<MachineInstr *, 8> AnalysisWorklist;
937937
// Needed because the SSA is not a tree but a graph and may have
938938
// forks and joins. We should not then go same way twice.
@@ -971,18 +971,16 @@ void SIFixSGPRCopies::analyzeVGPRToSGPRCopy(MachineInstr* MI) {
971971
}
972972
} else if (Inst->getNumExplicitDefs() != 0) {
973973
Register Reg = Inst->getOperand(0).getReg();
974-
if (Reg.isVirtual() && TRI->isSGPRReg(*MRI, Reg) && !TII->isVALU(*Inst)) {
974+
if (TRI->isSGPRReg(*MRI, Reg) && !TII->isVALU(*Inst))
975975
for (auto &U : MRI->use_instructions(Reg))
976976
Users.push_back(&U);
977-
}
978977
}
979978
for (auto *U : Users) {
980979
if (TII->isSALU(*U))
981980
Info.SChain.insert(U);
982981
AnalysisWorklist.push_back(U);
983982
}
984983
}
985-
V2SCopies[Info.ID] = Info;
986984
}
987985

988986
// The main function that computes the VGPR to SGPR copy score

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