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[X86] Add tests to show missed opportunities to calculate knownbits in SMAX/SMIN/UMAX/UMIN
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@288801 91177308-0d34-0410-b5e6-96231b3b80d8
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‎test/CodeGen/X86/known-bits-vector.ll

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@@ -379,3 +379,97 @@ define <4 x float> @knownbits_lshr_bitcast_shuffle_uitofp(<2 x i64> %a0, <4 x i3
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%4 = uitofp <4 x i32> %3 to <4 x float>
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ret <4 x float> %4
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}
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define <4 x float> @knownbits_smax_smin_shuffle_uitofp(<4 x i32> %a0) {
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; X32-LABEL: knownbits_smax_smin_shuffle_uitofp:
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; X32: # BB#0:
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; X32-NEXT: vpminsd {{\.LCPI.*}}, %xmm0, %xmm0
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; X32-NEXT: vpmaxsd {{\.LCPI.*}}, %xmm0, %xmm0
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; X32-NEXT: vpshufd {{.*#+}} xmm0 = xmm0[0,0,3,3]
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; X32-NEXT: vpblendw {{.*#+}} xmm1 = xmm0[0],mem[1],xmm0[2],mem[3],xmm0[4],mem[5],xmm0[6],mem[7]
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; X32-NEXT: vpsrld $16, %xmm0, %xmm0
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; X32-NEXT: vpblendw {{.*#+}} xmm0 = xmm0[0],mem[1],xmm0[2],mem[3],xmm0[4],mem[5],xmm0[6],mem[7]
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; X32-NEXT: vaddps {{\.LCPI.*}}, %xmm0, %xmm0
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; X32-NEXT: vaddps %xmm0, %xmm1, %xmm0
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; X32-NEXT: retl
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;
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; X64-LABEL: knownbits_smax_smin_shuffle_uitofp:
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; X64: # BB#0:
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; X64-NEXT: vpminsd {{.*}}(%rip), %xmm0, %xmm0
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; X64-NEXT: vpmaxsd {{.*}}(%rip), %xmm0, %xmm0
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; X64-NEXT: vpshufd {{.*#+}} xmm0 = xmm0[0,0,3,3]
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; X64-NEXT: vpblendw {{.*#+}} xmm1 = xmm0[0],mem[1],xmm0[2],mem[3],xmm0[4],mem[5],xmm0[6],mem[7]
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; X64-NEXT: vpsrld $16, %xmm0, %xmm0
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; X64-NEXT: vpblendw {{.*#+}} xmm0 = xmm0[0],mem[1],xmm0[2],mem[3],xmm0[4],mem[5],xmm0[6],mem[7]
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; X64-NEXT: vaddps {{.*}}(%rip), %xmm0, %xmm0
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; X64-NEXT: vaddps %xmm0, %xmm1, %xmm0
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; X64-NEXT: retq
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%1 = call <4 x i32> @llvm.x86.sse41.pminsd(<4 x i32> %a0, <4 x i32> <i32 0, i32 -65535, i32 -65535, i32 0>)
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%2 = call <4 x i32> @llvm.x86.sse41.pmaxsd(<4 x i32> %1, <4 x i32> <i32 65535, i32 -1, i32 -1, i32 131071>)
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%3 = shufflevector <4 x i32> %2, <4 x i32> undef, <4 x i32> <i32 0, i32 0, i32 3, i32 3>
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%4 = uitofp <4 x i32> %3 to <4 x float>
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ret <4 x float> %4
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}
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declare <4 x i32> @llvm.x86.sse41.pminsd(<4 x i32>, <4 x i32>) nounwind readnone
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declare <4 x i32> @llvm.x86.sse41.pmaxsd(<4 x i32>, <4 x i32>) nounwind readnone
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define <4 x float> @knownbits_umax_shuffle_uitofp(<4 x i32> %a0) {
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; X32-LABEL: knownbits_umax_shuffle_uitofp:
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; X32: # BB#0:
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; X32-NEXT: vpmaxud {{\.LCPI.*}}, %xmm0, %xmm0
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; X32-NEXT: vpshufd {{.*#+}} xmm0 = xmm0[0,0,3,3]
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; X32-NEXT: vpblendw {{.*#+}} xmm1 = xmm0[0],mem[1],xmm0[2],mem[3],xmm0[4],mem[5],xmm0[6],mem[7]
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; X32-NEXT: vpsrld $16, %xmm0, %xmm0
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; X32-NEXT: vpblendw {{.*#+}} xmm0 = xmm0[0],mem[1],xmm0[2],mem[3],xmm0[4],mem[5],xmm0[6],mem[7]
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; X32-NEXT: vaddps {{\.LCPI.*}}, %xmm0, %xmm0
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; X32-NEXT: vaddps %xmm0, %xmm1, %xmm0
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; X32-NEXT: retl
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;
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; X64-LABEL: knownbits_umax_shuffle_uitofp:
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; X64: # BB#0:
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; X64-NEXT: vpmaxud {{.*}}(%rip), %xmm0, %xmm0
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; X64-NEXT: vpshufd {{.*#+}} xmm0 = xmm0[0,0,3,3]
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; X64-NEXT: vpblendw {{.*#+}} xmm1 = xmm0[0],mem[1],xmm0[2],mem[3],xmm0[4],mem[5],xmm0[6],mem[7]
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; X64-NEXT: vpsrld $16, %xmm0, %xmm0
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; X64-NEXT: vpblendw {{.*#+}} xmm0 = xmm0[0],mem[1],xmm0[2],mem[3],xmm0[4],mem[5],xmm0[6],mem[7]
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; X64-NEXT: vaddps {{.*}}(%rip), %xmm0, %xmm0
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; X64-NEXT: vaddps %xmm0, %xmm1, %xmm0
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; X64-NEXT: retq
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%1 = call <4 x i32> @llvm.x86.sse41.pmaxud(<4 x i32> %a0, <4 x i32> <i32 65535, i32 -1, i32 -1, i32 262143>)
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%2 = shufflevector <4 x i32> %1, <4 x i32> undef, <4 x i32> <i32 0, i32 0, i32 3, i32 3>
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%3 = uitofp <4 x i32> %2 to <4 x float>
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ret <4 x float> %3
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}
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declare <4 x i32> @llvm.x86.sse41.pmaxud(<4 x i32>, <4 x i32>) nounwind readnone
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define <4 x float> @knownbits_umin_shl_shuffle_uitofp(<4 x i32> %a0) {
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; X32-LABEL: knownbits_umin_shl_shuffle_uitofp:
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; X32: # BB#0:
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; X32-NEXT: vpminud {{\.LCPI.*}}, %xmm0, %xmm0
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; X32-NEXT: vpslld $16, %xmm0, %xmm0
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; X32-NEXT: vpshufd {{.*#+}} xmm0 = xmm0[0,0,3,3]
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; X32-NEXT: vpblendw {{.*#+}} xmm1 = xmm0[0],mem[1],xmm0[2],mem[3],xmm0[4],mem[5],xmm0[6],mem[7]
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; X32-NEXT: vpsrld $16, %xmm0, %xmm0
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; X32-NEXT: vpblendw {{.*#+}} xmm0 = xmm0[0],mem[1],xmm0[2],mem[3],xmm0[4],mem[5],xmm0[6],mem[7]
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; X32-NEXT: vaddps {{\.LCPI.*}}, %xmm0, %xmm0
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; X32-NEXT: vaddps %xmm0, %xmm1, %xmm0
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; X32-NEXT: retl
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;
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; X64-LABEL: knownbits_umin_shl_shuffle_uitofp:
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; X64: # BB#0:
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; X64-NEXT: vpminud {{.*}}(%rip), %xmm0, %xmm0
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; X64-NEXT: vpslld $16, %xmm0, %xmm0
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; X64-NEXT: vpshufd {{.*#+}} xmm0 = xmm0[0,0,3,3]
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; X64-NEXT: vpblendw {{.*#+}} xmm1 = xmm0[0],mem[1],xmm0[2],mem[3],xmm0[4],mem[5],xmm0[6],mem[7]
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; X64-NEXT: vpsrld $16, %xmm0, %xmm0
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; X64-NEXT: vpblendw {{.*#+}} xmm0 = xmm0[0],mem[1],xmm0[2],mem[3],xmm0[4],mem[5],xmm0[6],mem[7]
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; X64-NEXT: vaddps {{.*}}(%rip), %xmm0, %xmm0
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; X64-NEXT: vaddps %xmm0, %xmm1, %xmm0
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; X64-NEXT: retq
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%1 = call <4 x i32> @llvm.x86.sse41.pminud(<4 x i32> %a0, <4 x i32> <i32 65536, i32 -1, i32 -1, i32 262143>)
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%2 = shl <4 x i32> %1, <i32 16, i32 16, i32 16, i32 16>
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%3 = shufflevector <4 x i32> %2, <4 x i32> undef, <4 x i32> <i32 0, i32 0, i32 3, i32 3>
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%4 = uitofp <4 x i32> %3 to <4 x float>
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ret <4 x float> %4
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}
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declare <4 x i32> @llvm.x86.sse41.pminud(<4 x i32>, <4 x i32>) nounwind readnone

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