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Commit 21db7b7

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author
Chad Rosier
committed
[AArch64] Fix warnings pointed out by Hal.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@264882 91177308-0d34-0410-b5e6-96231b3b80d8
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lib/Target/AArch64/AArch64LoadStoreOptimizer.cpp

Lines changed: 5 additions & 1 deletion
Original file line numberDiff line numberDiff line change
@@ -678,6 +678,7 @@ AArch64LoadStoreOpt::mergeNarrowInsns(MachineBasicBlock::iterator I,
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.addOperand(BaseRegOp)
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.addImm(OffsetImm)
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.setMemRefs(I->mergeMemRefsWith(*MergeMI));
681+
(void)NewMemMI;
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DEBUG(
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dbgs()
@@ -742,6 +743,9 @@ AArch64LoadStoreOpt::mergeNarrowInsns(MachineBasicBlock::iterator I,
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.addImm(LSBHigh)
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.addImm(ImmsHigh);
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}
746+
(void)BitExtMI1;
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(void)BitExtMI2;
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DEBUG(dbgs() << " ");
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DEBUG((BitExtMI1)->print(dbgs()));
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DEBUG(dbgs() << " ");
@@ -762,7 +766,6 @@ AArch64LoadStoreOpt::mergeNarrowInsns(MachineBasicBlock::iterator I,
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.addOperand(BaseRegOp)
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.addImm(OffsetImm)
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.setMemRefs(I->mergeMemRefsWith(*MergeMI));
765-
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(void)MIB;
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DEBUG(dbgs() << "Creating wider load/store. Replacing instructions:\n ");
@@ -996,6 +999,7 @@ AArch64LoadStoreOpt::promoteLoadFromStore(MachineBasicBlock::iterator LoadI,
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.addImm(Imms);
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}
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}
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(void)BitExtMI;
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DEBUG(dbgs() << "Promoting load by replacing :\n ");
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DEBUG(StoreI->print(dbgs()));

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