Skip to content
This repository was archived by the owner on Mar 28, 2020. It is now read-only.

Commit 2ffda75

Browse files
committed
[X86] EltsFromConsecutiveLoads SDLoc argument should be const&.
There appears never to have been a time that the reference was updated. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@295739 91177308-0d34-0410-b5e6-96231b3b80d8
1 parent ab07cb9 commit 2ffda75

File tree

1 file changed

+1
-1
lines changed

1 file changed

+1
-1
lines changed

lib/Target/X86/X86ISelLowering.cpp

Lines changed: 1 addition & 1 deletion
Original file line numberDiff line numberDiff line change
@@ -6231,7 +6231,7 @@ static SDValue LowerAsSplatVectorLoad(SDValue SrcOp, MVT VT, const SDLoc &dl,
62316231
///
62326232
/// Example: <load i32 *a, load i32 *a+4, zero, undef> -> zextload a
62336233
static SDValue EltsFromConsecutiveLoads(EVT VT, ArrayRef<SDValue> Elts,
6234-
SDLoc &DL, SelectionDAG &DAG,
6234+
const SDLoc &DL, SelectionDAG &DAG,
62356235
bool isAfterLegalize) {
62366236
unsigned NumElems = Elts.size();
62376237

0 commit comments

Comments
 (0)