Skip to content
This repository was archived by the owner on Mar 28, 2020. It is now read-only.

Commit 3455264

Browse files
committed
[InstCombine] Fixed bug introduced in r282237
The index of the new insertelement instruction was evaluated in the wrong way, it was considered as the index of the inserted value instead of index of the position, where the value should be inserted. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@282401 91177308-0d34-0410-b5e6-96231b3b80d8
1 parent 23d2e04 commit 3455264

File tree

2 files changed

+17
-6
lines changed

2 files changed

+17
-6
lines changed

lib/Transforms/InstCombine/InstCombineSimplifyDemanded.cpp

Lines changed: 8 additions & 6 deletions
Original file line numberDiff line numberDiff line change
@@ -1048,8 +1048,8 @@ Value *InstCombiner::SimplifyDemandedVectorElts(Value *V, APInt DemandedElts,
10481048
if (TmpV) { I->setOperand(1, TmpV); MadeChange = true; }
10491049

10501050
bool NewUndefElts = false;
1051-
unsigned LHSIdx = -1u;
1052-
unsigned RHSIdx = -1u;
1051+
unsigned LHSIdx = -1u, LHSValIdx = -1u;
1052+
unsigned RHSIdx = -1u, RHSValIdx = -1u;
10531053
bool LHSUniform = true;
10541054
bool RHSUniform = true;
10551055
for (unsigned i = 0; i < VWidth; i++) {
@@ -1064,15 +1064,17 @@ Value *InstCombiner::SimplifyDemandedVectorElts(Value *V, APInt DemandedElts,
10641064
NewUndefElts = true;
10651065
UndefElts.setBit(i);
10661066
} else {
1067-
LHSIdx = LHSIdx == -1u ? MaskVal : LHSVWidth;
1067+
LHSIdx = LHSIdx == -1u ? i : LHSVWidth;
1068+
LHSValIdx = LHSValIdx == -1u ? MaskVal : LHSVWidth;
10681069
LHSUniform = LHSUniform && (MaskVal == i);
10691070
}
10701071
} else {
10711072
if (RHSUndefElts[MaskVal - LHSVWidth]) {
10721073
NewUndefElts = true;
10731074
UndefElts.setBit(i);
10741075
} else {
1075-
RHSIdx = RHSIdx == -1u ? MaskVal - LHSVWidth : LHSVWidth;
1076+
RHSIdx = RHSIdx == -1u ? i : LHSVWidth;
1077+
RHSValIdx = RHSValIdx == -1u ? MaskVal - LHSVWidth : LHSVWidth;
10761078
RHSUniform = RHSUniform && (MaskVal - LHSVWidth == i);
10771079
}
10781080
}
@@ -1091,14 +1093,14 @@ Value *InstCombiner::SimplifyDemandedVectorElts(Value *V, APInt DemandedElts,
10911093
if (LHSIdx < LHSVWidth && RHSUniform) {
10921094
if (auto *CV = dyn_cast<ConstantVector>(Shuffle->getOperand(0))) {
10931095
Op = Shuffle->getOperand(1);
1094-
Value = CV->getOperand(LHSIdx);
1096+
Value = CV->getOperand(LHSValIdx);
10951097
Idx = LHSIdx;
10961098
}
10971099
}
10981100
if (RHSIdx < LHSVWidth && LHSUniform) {
10991101
if (auto *CV = dyn_cast<ConstantVector>(Shuffle->getOperand(1))) {
11001102
Op = Shuffle->getOperand(0);
1101-
Value = CV->getOperand(RHSIdx);
1103+
Value = CV->getOperand(RHSValIdx);
11021104
Idx = RHSIdx;
11031105
}
11041106
}

test/Transforms/InstCombine/vec_demanded_elts.ll

Lines changed: 9 additions & 0 deletions
Original file line numberDiff line numberDiff line change
@@ -212,6 +212,15 @@ define <2 x double> @test_fpext(float %f) {
212212
ret <2 x double> %ret
213213
}
214214

215+
define <4 x double> @test_shuffle(<4 x double> %f) {
216+
; CHECK-LABEL: @test_shuffle(
217+
; CHECK-NEXT: [[RET1:%.*]] = insertelement <4 x double> %f, double 1.000000e+00, i32 3
218+
; CHECK-NEXT: ret <4 x double> [[RET1]]
219+
;
220+
%ret = shufflevector <4 x double> %f, <4 x double> <double undef, double 1.0, double undef, double undef>, <4 x i32> <i32 0, i32 1, i32 2, i32 5>
221+
ret <4 x double> %ret
222+
}
223+
215224
define <4 x float> @test_select(float %f, float %g) {
216225
; CHECK-LABEL: @test_select(
217226
; CHECK-NEXT: [[A0:%.*]] = insertelement <4 x float> undef, float %f, i32 0

0 commit comments

Comments
 (0)