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Dylan McKay
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[AVR] Add AVRMCExpr
Summary: This adds the AVRMCExpr headers and implementation. Reviewers: arsenm, ruiu, grosbach, kparzysz Subscribers: wdng, beanz, mgorny, kparzysz, jtbandes, llvm-commits Differential Revision: https://reviews.llvm.org/D20503 git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@282397 91177308-0d34-0410-b5e6-96231b3b80d8
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‎lib/Target/AVR/MCTargetDesc/AVRFixupKinds.h

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//===-- AVRFixupKinds.h - AVR Specific Fixup Entries ------------*- C++ -*-===//
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//
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// The LLVM Compiler Infrastructure
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//
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// This file is distributed under the University of Illinois Open Source
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// License. See LICENSE.TXT for details.
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//
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//===----------------------------------------------------------------------===//
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#ifndef LLVM_AVR_FIXUP_KINDS_H
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#define LLVM_AVR_FIXUP_KINDS_H
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#include "llvm/MC/MCFixup.h"
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namespace llvm {
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namespace AVR {
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/// The set of supported fixups.
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///
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/// Although most of the current fixup types reflect a unique relocation
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/// one can have multiple fixup types for a given relocation and thus need
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/// to be uniquely named.
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///
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/// \note This table *must* be in the same order of
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/// MCFixupKindInfo Infos[AVR::NumTargetFixupKinds]
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/// in `AVRAsmBackend.cpp`.
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enum Fixups {
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/// A 32-bit AVR fixup.
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fixup_32 = FirstTargetFixupKind,
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/// A 7-bit PC-relative fixup for the family of conditional
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/// branches which take 7-bit targets (BRNE,BRGT,etc).
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fixup_7_pcrel,
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/// A 12-bit PC-relative fixup for the family of branches
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/// which take 12-bit targets (RJMP,RCALL,etc).
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/// \note Although the fixup is labelled as 13 bits, it
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/// is actually only encoded in 12. The reason for
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/// The nonmenclature is that AVR branch targets are
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/// rightshifted by 1, because instructions are always
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/// aligned to 2 bytes, so the 0'th bit is always 0.
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/// This way there is 13-bits of precision.
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fixup_13_pcrel,
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/// A 16-bit address.
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fixup_16,
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/// A 16-bit program memory address.
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fixup_16_pm,
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/// Replaces the 8-bit immediate with another value.
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fixup_ldi,
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/// Replaces the immediate operand of a 16-bit `Rd, K` instruction
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/// with the lower 8 bits of a 16-bit value (bits 0-7).
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fixup_lo8_ldi,
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/// Replaces the immediate operand of a 16-bit `Rd, K` instruction
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/// with the upper 8 bits of a 16-bit value (bits 8-15).
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fixup_hi8_ldi,
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/// Replaces the immediate operand of a 16-bit `Rd, K` instruction
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/// with the upper 8 bits of a 24-bit value (bits 16-23).
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fixup_hh8_ldi,
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/// Replaces the immediate operand of a 16-bit `Rd, K` instruction
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/// with the upper 8 bits of a 32-bit value (bits 24-31).
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fixup_ms8_ldi,
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/// Replaces the immediate operand of a 16-bit `Rd, K` instruction
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/// with the lower 8 bits of a negated 16-bit value (bits 0-7).
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fixup_lo8_ldi_neg,
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/// Replaces the immediate operand of a 16-bit `Rd, K` instruction
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/// with the upper 8 bits of a negated 16-bit value (bits 8-15).
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fixup_hi8_ldi_neg,
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/// Replaces the immediate operand of a 16-bit `Rd, K` instruction
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/// with the upper 8 bits of a negated negated 24-bit value (bits 16-23).
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fixup_hh8_ldi_neg,
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/// Replaces the immediate operand of a 16-bit `Rd, K` instruction
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/// with the upper 8 bits of a negated negated 32-bit value (bits 24-31).
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fixup_ms8_ldi_neg,
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/// Replaces the immediate operand of a 16-bit `Rd, K` instruction
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/// with the lower 8 bits of a 16-bit program memory address value (bits 0-7).
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fixup_lo8_ldi_pm,
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/// Replaces the immediate operand of a 16-bit `Rd, K` instruction
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/// with the upper 8 bits of a 16-bit program memory address value (bits
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/// 8-15).
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fixup_hi8_ldi_pm,
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/// Replaces the immediate operand of a 16-bit `Rd, K` instruction
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/// with the upper 8 bits of a 24-bit program memory address value (bits
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/// 16-23).
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fixup_hh8_ldi_pm,
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/// Replaces the immediate operand of a 16-bit `Rd, K` instruction
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/// with the lower 8 bits of a negated 16-bit program memory address value
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/// (bits 0-7).
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fixup_lo8_ldi_pm_neg,
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/// Replaces the immediate operand of a 16-bit `Rd, K` instruction
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/// with the upper 8 bits of a negated 16-bit program memory address value
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/// (bits 8-15).
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fixup_hi8_ldi_pm_neg,
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/// Replaces the immediate operand of a 16-bit `Rd, K` instruction
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/// with the upper 8 bits of a negated 24-bit program memory address value
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/// (bits 16-23).
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fixup_hh8_ldi_pm_neg,
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/// A 22-bit fixup for the target of a `CALL k` or `JMP k` instruction.
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fixup_call,
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fixup_6,
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/// A symbol+addr fixup for the `LDD <x>+<n>, <r>" family of instructions.
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fixup_6_adiw,
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fixup_lo8_ldi_gs,
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fixup_hi8_ldi_gs,
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fixup_8,
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fixup_8_lo8,
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fixup_8_hi8,
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fixup_8_hlo8,
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/// Fixup to calculate the difference between two symbols.
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/// Is the only stateful fixup. We do not support it yet.
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fixup_sym_diff,
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fixup_16_ldst,
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fixup_lds_sts_16,
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/// A 6-bit port address.
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fixup_port6,
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/// A 5-bit port address.
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fixup_port5,
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// Marker
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LastTargetFixupKind,
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NumTargetFixupKinds = LastTargetFixupKind - FirstTargetFixupKind
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};
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namespace fixups {
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/// Adjusts the value of a branch target.
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/// All branch targets in AVR are rightshifted by 1 to take advantage
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/// of the fact that all instructions are aligned to addresses of size
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/// 2, so bit 0 of an address is always 0. This gives us another bit
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/// of precision.
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/// \param[in,out] The target to adjust.
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template <typename T> inline void adjustBranchTarget(T &val) { val >>= 1; }
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} // end of namespace fixups
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}
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} // end of namespace llvm::AVR
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#endif // LLVM_AVR_FIXUP_KINDS_H

‎lib/Target/AVR/MCTargetDesc/AVRMCExpr.cpp

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//===-- AVRMCExpr.cpp - AVR specific MC expression classes ----------------===//
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//
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// The LLVM Compiler Infrastructure
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//
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// This file is distributed under the University of Illinois Open Source
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// License. See LICENSE.TXT for details.
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//
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//===----------------------------------------------------------------------===//
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#include "AVRMCExpr.h"
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#include "llvm/MC/MCAssembler.h"
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#include "llvm/MC/MCContext.h"
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#include "llvm/MC/MCStreamer.h"
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#include "llvm/MC/MCValue.h"
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#include "llvm/MC/MCAsmLayout.h"
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namespace llvm {
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namespace {
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const struct ModifierEntry {
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const char * const Spelling;
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AVRMCExpr::VariantKind VariantKind;
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} ModifierNames[] = {
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{"lo8", AVRMCExpr::VK_AVR_LO8}, {"hi8", AVRMCExpr::VK_AVR_HI8},
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{"hh8", AVRMCExpr::VK_AVR_HH8}, // synonym with hlo8
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{"hlo8", AVRMCExpr::VK_AVR_HH8}, {"hhi8", AVRMCExpr::VK_AVR_HHI8},
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{"pm_lo8", AVRMCExpr::VK_AVR_PM_LO8}, {"pm_hi8", AVRMCExpr::VK_AVR_PM_HI8},
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{"pm_hh8", AVRMCExpr::VK_AVR_PM_HH8},
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};
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} // end of anonymous namespace
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const AVRMCExpr *AVRMCExpr::create(VariantKind Kind, const MCExpr *Expr,
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bool Negated, MCContext &Ctx) {
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return new (Ctx) AVRMCExpr(Kind, Expr, Negated);
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}
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void AVRMCExpr::printImpl(raw_ostream &OS, const MCAsmInfo *MAI) const {
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assert(Kind != VK_AVR_None);
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if (isNegated())
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OS << '-';
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OS << getName() << '(';
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getSubExpr()->print(OS, MAI);
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OS << ')';
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}
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bool AVRMCExpr::evaluateAsConstant(int64_t &Result) const {
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MCValue Value;
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bool isRelocatable =
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getSubExpr()->evaluateAsRelocatable(Value, nullptr, nullptr);
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if (!isRelocatable)
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return false;
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if (Value.isAbsolute()) {
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Result = evaluateAsInt64(Value.getConstant());
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return true;
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}
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return false;
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}
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bool AVRMCExpr::evaluateAsRelocatableImpl(MCValue &Result,
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const MCAsmLayout *Layout,
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const MCFixup *Fixup) const {
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MCValue Value;
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bool isRelocatable = SubExpr->evaluateAsRelocatable(Value, Layout, Fixup);
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if (!isRelocatable)
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return false;
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if (Value.isAbsolute()) {
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Result = MCValue::get(evaluateAsInt64(Value.getConstant()));
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} else {
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if (!Layout) return false;
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MCContext &Context = Layout->getAssembler().getContext();
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const MCSymbolRefExpr *Sym = Value.getSymA();
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MCSymbolRefExpr::VariantKind Modifier = Sym->getKind();
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if (Modifier != MCSymbolRefExpr::VK_None)
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return false;
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Sym = MCSymbolRefExpr::create(&Sym->getSymbol(), Modifier, Context);
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Result = MCValue::get(Sym, Value.getSymB(), Value.getConstant());
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}
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return true;
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}
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int64_t AVRMCExpr::evaluateAsInt64(int64_t Value) const {
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if (Negated)
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Value *= -1;
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switch (Kind) {
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case AVRMCExpr::VK_AVR_LO8:
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break;
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case AVRMCExpr::VK_AVR_HI8:
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Value >>= 8;
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break;
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case AVRMCExpr::VK_AVR_HH8:
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Value >>= 16;
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break;
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case AVRMCExpr::VK_AVR_HHI8:
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Value >>= 24;
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break;
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case AVRMCExpr::VK_AVR_PM_LO8:
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Value >>= 1;
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break;
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case AVRMCExpr::VK_AVR_PM_HI8:
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Value >>= 9;
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break;
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case AVRMCExpr::VK_AVR_PM_HH8:
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Value >>= 17;
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break;
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case AVRMCExpr::VK_AVR_None:
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llvm_unreachable("Uninitialized expression.");
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}
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return static_cast<uint64_t>(Value) & 0xff;
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}
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AVR::Fixups AVRMCExpr::getFixupKind() const {
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AVR::Fixups Kind = AVR::Fixups::LastTargetFixupKind;
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switch (getKind()) {
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case VK_AVR_LO8:
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Kind = isNegated() ? AVR::fixup_lo8_ldi_neg : AVR::fixup_lo8_ldi;
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break;
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case VK_AVR_HI8:
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Kind = isNegated() ? AVR::fixup_hi8_ldi_neg : AVR::fixup_hi8_ldi;
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break;
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case VK_AVR_HH8:
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Kind = isNegated() ? AVR::fixup_hh8_ldi_neg : AVR::fixup_hh8_ldi;
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break;
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case VK_AVR_HHI8:
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Kind = isNegated() ? AVR::fixup_ms8_ldi_neg : AVR::fixup_ms8_ldi;
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break;
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case VK_AVR_PM_LO8:
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Kind = isNegated() ? AVR::fixup_lo8_ldi_pm_neg : AVR::fixup_lo8_ldi_pm;
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break;
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case VK_AVR_PM_HI8:
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Kind = isNegated() ? AVR::fixup_hi8_ldi_pm_neg : AVR::fixup_hi8_ldi_pm;
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break;
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case VK_AVR_PM_HH8:
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Kind = isNegated() ? AVR::fixup_hh8_ldi_pm_neg : AVR::fixup_hh8_ldi_pm;
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break;
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case VK_AVR_None:
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llvm_unreachable("Uninitialized expression");
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}
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return Kind;
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}
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void AVRMCExpr::visitUsedExpr(MCStreamer &Streamer) const {
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Streamer.visitUsedExpr(*getSubExpr());
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}
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const char *AVRMCExpr::getName() const {
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const auto &Modifier = std::find_if(
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std::begin(ModifierNames), std::end(ModifierNames),
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[this](ModifierEntry const &Mod) { return Mod.VariantKind == Kind; });
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if (Modifier != std::end(ModifierNames)) {
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return Modifier->Spelling;
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}
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return nullptr;
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}
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AVRMCExpr::VariantKind AVRMCExpr::getKindByName(StringRef Name) {
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const auto &Modifier = std::find_if(
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std::begin(ModifierNames), std::end(ModifierNames),
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[&Name](ModifierEntry const &Mod) { return Mod.Spelling == Name; });
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if (Modifier != std::end(ModifierNames)) {
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return Modifier->VariantKind;
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}
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return VK_AVR_None;
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}
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} // end of namespace llvm
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