Skip to content
This repository was archived by the owner on Mar 28, 2020. It is now read-only.

Commit 785d7f7

Browse files
author
Zoran Jovanovic
committed
ps][microMIPS] Add R_MICROMIPS_PC21_S1 relocation
Differential Revision: http://reviews.llvm.org/D15526 git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@270048 91177308-0d34-0410-b5e6-96231b3b80d8
1 parent e4c0214 commit 785d7f7

File tree

7 files changed

+42
-4
lines changed

7 files changed

+42
-4
lines changed

‎include/llvm/Support/ELFRelocs/Mips.def

Lines changed: 1 addition & 1 deletion
Original file line numberDiff line numberDiff line change
@@ -108,7 +108,7 @@ ELF_RELOC(R_MICROMIPS_TLS_TPREL_HI16, 169)
108108
ELF_RELOC(R_MICROMIPS_TLS_TPREL_LO16, 170)
109109
ELF_RELOC(R_MICROMIPS_GPREL7_S2, 172)
110110
ELF_RELOC(R_MICROMIPS_PC23_S2, 173)
111-
ELF_RELOC(R_MICROMIPS_PC21_S2, 174)
111+
ELF_RELOC(R_MICROMIPS_PC21_S1, 174)
112112
ELF_RELOC(R_MICROMIPS_PC26_S1, 175)
113113
ELF_RELOC(R_MICROMIPS_PC18_S3, 176)
114114
ELF_RELOC(R_MICROMIPS_PC19_S2, 177)

‎lib/Target/Mips/MCTargetDesc/MipsAsmBackend.cpp

Lines changed: 11 additions & 1 deletion
Original file line numberDiff line numberDiff line change
@@ -189,7 +189,15 @@ static unsigned adjustFixupValue(const MCFixup &Fixup, uint64_t Value,
189189
return 0;
190190
}
191191
break;
192-
192+
case Mips::fixup_MICROMIPS_PC21_S1:
193+
// Forcing a signed division because Value can be negative.
194+
Value = (int64_t)Value / 2;
195+
// We now check if Value can be encoded as a 21-bit signed immediate.
196+
if (!isInt<21>(Value) && Ctx) {
197+
Ctx->reportError(Fixup.getLoc(), "out of range PC21 fixup");
198+
return 0;
199+
}
200+
break;
193201
}
194202

195203
return Value;
@@ -343,6 +351,7 @@ getFixupKindInfo(MCFixupKind Kind) const {
343351
{ "fixup_MICROMIPS_PC26_S1", 0, 26, MCFixupKindInfo::FKF_IsPCRel },
344352
{ "fixup_MICROMIPS_PC19_S2", 0, 19, MCFixupKindInfo::FKF_IsPCRel },
345353
{ "fixup_MICROMIPS_PC18_S3", 0, 18, MCFixupKindInfo::FKF_IsPCRel },
354+
{ "fixup_MICROMIPS_PC21_S1", 0, 21, MCFixupKindInfo::FKF_IsPCRel },
346355
{ "fixup_MICROMIPS_CALL16", 0, 16, 0 },
347356
{ "fixup_MICROMIPS_GOT_DISP", 0, 16, 0 },
348357
{ "fixup_MICROMIPS_GOT_PAGE", 0, 16, 0 },
@@ -411,6 +420,7 @@ getFixupKindInfo(MCFixupKind Kind) const {
411420
{ "fixup_MICROMIPS_PC26_S1", 6, 26, MCFixupKindInfo::FKF_IsPCRel },
412421
{ "fixup_MICROMIPS_PC19_S2",13, 19, MCFixupKindInfo::FKF_IsPCRel },
413422
{ "fixup_MICROMIPS_PC18_S3",14, 18, MCFixupKindInfo::FKF_IsPCRel },
423+
{ "fixup_MICROMIPS_PC21_S1",11, 21, MCFixupKindInfo::FKF_IsPCRel },
414424
{ "fixup_MICROMIPS_CALL16", 16, 16, 0 },
415425
{ "fixup_MICROMIPS_GOT_DISP", 16, 16, 0 },
416426
{ "fixup_MICROMIPS_GOT_PAGE", 16, 16, 0 },

‎lib/Target/Mips/MCTargetDesc/MipsELFObjectWriter.cpp

Lines changed: 3 additions & 1 deletion
Original file line numberDiff line numberDiff line change
@@ -247,6 +247,8 @@ unsigned MipsELFObjectWriter::getRelocType(MCContext &Ctx,
247247
return ELF::R_MICROMIPS_PC19_S2;
248248
case Mips::fixup_MICROMIPS_PC18_S3:
249249
return ELF::R_MICROMIPS_PC18_S3;
250+
case Mips::fixup_MICROMIPS_PC21_S1:
251+
return ELF::R_MICROMIPS_PC21_S1;
250252
case Mips::fixup_MIPS_PC19_S2:
251253
return ELF::R_MIPS_PC19_S2;
252254
case Mips::fixup_MIPS_PC18_S3:
@@ -608,7 +610,7 @@ bool MipsELFObjectWriter::needsRelocateWithSymbol(const MCSymbol &Sym,
608610
case ELF::R_MICROMIPS_TLS_TPREL_LO16:
609611
case ELF::R_MICROMIPS_GPREL7_S2:
610612
case ELF::R_MICROMIPS_PC23_S2:
611-
case ELF::R_MICROMIPS_PC21_S2:
613+
case ELF::R_MICROMIPS_PC21_S1:
612614
case ELF::R_MICROMIPS_PC26_S1:
613615
case ELF::R_MICROMIPS_PC18_S3:
614616
case ELF::R_MICROMIPS_PC19_S2:

‎lib/Target/Mips/MCTargetDesc/MipsFixupKinds.h

Lines changed: 3 additions & 0 deletions
Original file line numberDiff line numberDiff line change
@@ -176,6 +176,9 @@ namespace Mips {
176176
// resulting in - R_MICROMIPS_PC18_S3
177177
fixup_MICROMIPS_PC18_S3,
178178

179+
// resulting in - R_MICROMIPS_PC21_S1
180+
fixup_MICROMIPS_PC21_S1,
181+
179182
// resulting in - R_MICROMIPS_CALL16
180183
fixup_MICROMIPS_CALL16,
181184

‎lib/Target/Mips/MCTargetDesc/MipsMCCodeEmitter.cpp

Lines changed: 4 additions & 1 deletion
Original file line numberDiff line numberDiff line change
@@ -384,7 +384,10 @@ getBranchTarget21OpValueMM(const MCInst &MI, unsigned OpNo,
384384
assert(MO.isExpr() &&
385385
"getBranchTarget21OpValueMM expects only expressions or immediates");
386386

387-
// TODO: Push fixup.
387+
const MCExpr *FixupExpression = MCBinaryExpr::createAdd(
388+
MO.getExpr(), MCConstantExpr::create(-4, Ctx), Ctx);
389+
Fixups.push_back(MCFixup::create(0, FixupExpression,
390+
MCFixupKind(Mips::fixup_MICROMIPS_PC21_S1)));
388391
return 0;
389392
}
390393

‎test/MC/Mips/micromips32r6/relocations.s

Lines changed: 10 additions & 0 deletions
Original file line numberDiff line numberDiff line change
@@ -17,6 +17,12 @@
1717
# CHECK-FIXUP: lwpc $2, bar # encoding: [0x78,0b01001AAA,A,A]
1818
# CHECK-FIXUP: # fixup A - offset: 0,
1919
# CHECK-FIXUP: value: bar, kind: fixup_MICROMIPS_PC19_S2
20+
# CHECK-FIXUP: beqzc $3, bar # encoding: [0x80,0b011AAAAA,A,A]
21+
# CHECK-FIXUP: # fixup A - offset: 0,
22+
# CHECK-FIXUP: value: bar-4, kind: fixup_MICROMIPS_PC21_S1
23+
# CHECK-FIXUP: bnezc $3, bar # encoding: [0xa0,0b011AAAAA,A,A]
24+
# CHECK-FIXUP: # fixup A - offset: 0,
25+
# CHECK-FIXUP: value: bar-4, kind: fixup_MICROMIPS_PC21_S1
2026
#------------------------------------------------------------------------------
2127
# Check that the appropriate relocations were created.
2228
#------------------------------------------------------------------------------
@@ -25,9 +31,13 @@
2531
# CHECK-ELF: 0x4 R_MICROMIPS_PC26_S1 bar 0x0
2632
# CHECK-ELF: 0x8 R_MICROMIPS_PC19_S2 bar 0x0
2733
# CHECK-ELF: 0xC R_MICROMIPS_PC19_S2 bar 0x0
34+
# CHECK-ELF: 0x10 R_MICROMIPS_PC21_S1 bar 0x0
35+
# CHECK-ELF: 0x14 R_MICROMIPS_PC21_S1 bar 0x0
2836
# CHECK-ELF: ]
2937

3038
balc bar
3139
bc bar
3240
addiupc $2,bar
3341
lwpc $2,bar
42+
beqzc $3, bar
43+
bnezc $3, bar

‎test/MC/Mips/micromips64r6/relocations.s

Lines changed: 10 additions & 0 deletions
Original file line numberDiff line numberDiff line change
@@ -20,6 +20,12 @@
2020
# CHECK-FIXUP: ldpc $2, bar # encoding: [0x78,0b010110AA,A,A]
2121
# CHECK-FIXUP: # fixup A - offset: 0,
2222
# CHECK-FIXUP: value: bar, kind: fixup_MICROMIPS_PC18_S3
23+
# CHECK-FIXUP: beqzc $3, bar # encoding: [0x80,0b011AAAAA,A,A]
24+
# CHECK-FIXUP: # fixup A - offset: 0,
25+
# CHECK-FIXUP: value: bar-4, kind: fixup_MICROMIPS_PC21_S1
26+
# CHECK-FIXUP: bnezc $3, bar # encoding: [0xa0,0b011AAAAA,A,A]
27+
# CHECK-FIXUP: # fixup A - offset: 0,
28+
# CHECK-FIXUP: value: bar-4, kind: fixup_MICROMIPS_PC21_S1
2329
#------------------------------------------------------------------------------
2430
# Check that the appropriate relocations were created.
2531
#------------------------------------------------------------------------------
@@ -29,10 +35,14 @@
2935
# CHECK-ELF: 0x8 R_MICROMIPS_PC19_S2 bar 0x0
3036
# CHECK-ELF: 0xC R_MICROMIPS_PC19_S2 bar 0x0
3137
# CHECK-ELF: 0x10 R_MICROMIPS_PC18_S3 bar 0x0
38+
# CHECK-ELF: 0x14 R_MICROMIPS_PC21_S1 bar 0x0
39+
# CHECK-ELF: 0x18 R_MICROMIPS_PC21_S1 bar 0x0
3240
# CHECK-ELF: ]
3341

3442
balc bar
3543
bc bar
3644
addiupc $2,bar
3745
lwpc $2,bar
3846
ldpc $2, bar
47+
beqzc $3, bar
48+
bnezc $3, bar

0 commit comments

Comments
 (0)