Skip to content
This repository was archived by the owner on Mar 28, 2020. It is now read-only.

Commit a62a0a3

Browse files
committed
[X86][SSE] Include MIN_SIGNED element in non-uniform SDIV pow2 tests
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@335721 91177308-0d34-0410-b5e6-96231b3b80d8
1 parent 8a57afc commit a62a0a3

File tree

1 file changed

+17
-25
lines changed

1 file changed

+17
-25
lines changed

test/CodeGen/X86/combine-sdiv.ll

Lines changed: 17 additions & 25 deletions
Original file line numberDiff line numberDiff line change
@@ -4408,12 +4408,10 @@ define <16 x i8> @non_splat_minus_one_divisor_1(<16 x i8> %A) {
44084408
; SSE-NEXT: movzbl %cl, %eax
44094409
; SSE-NEXT: pinsrb $12, %eax, %xmm1
44104410
; SSE-NEXT: pextrb $13, %xmm0, %eax
4411-
; SSE-NEXT: movl %eax, %ecx
4412-
; SSE-NEXT: shrb $7, %cl
4413-
; SSE-NEXT: addb %al, %cl
4414-
; SSE-NEXT: sarb %cl
4415-
; SSE-NEXT: movzbl %cl, %eax
4416-
; SSE-NEXT: pinsrb $13, %eax, %xmm1
4411+
; SSE-NEXT: xorl %ecx, %ecx
4412+
; SSE-NEXT: cmpb $-128, %al
4413+
; SSE-NEXT: sete %cl
4414+
; SSE-NEXT: pinsrb $13, %ecx, %xmm1
44174415
; SSE-NEXT: pextrb $14, %xmm0, %eax
44184416
; SSE-NEXT: movl %eax, %ecx
44194417
; SSE-NEXT: shrb $7, %cl
@@ -4422,12 +4420,10 @@ define <16 x i8> @non_splat_minus_one_divisor_1(<16 x i8> %A) {
44224420
; SSE-NEXT: movzbl %cl, %eax
44234421
; SSE-NEXT: pinsrb $14, %eax, %xmm1
44244422
; SSE-NEXT: pextrb $15, %xmm0, %eax
4425-
; SSE-NEXT: movl %eax, %ecx
4426-
; SSE-NEXT: shrb $7, %cl
4427-
; SSE-NEXT: addb %al, %cl
4428-
; SSE-NEXT: sarb %cl
4429-
; SSE-NEXT: movzbl %cl, %eax
4430-
; SSE-NEXT: pinsrb $15, %eax, %xmm1
4423+
; SSE-NEXT: xorl %ecx, %ecx
4424+
; SSE-NEXT: cmpb $-128, %al
4425+
; SSE-NEXT: sete %cl
4426+
; SSE-NEXT: pinsrb $15, %ecx, %xmm1
44314427
; SSE-NEXT: movdqa %xmm1, %xmm0
44324428
; SSE-NEXT: retq
44334429
;
@@ -4504,12 +4500,10 @@ define <16 x i8> @non_splat_minus_one_divisor_1(<16 x i8> %A) {
45044500
; AVX-NEXT: movzbl %cl, %eax
45054501
; AVX-NEXT: vpinsrb $12, %eax, %xmm1, %xmm1
45064502
; AVX-NEXT: vpextrb $13, %xmm0, %eax
4507-
; AVX-NEXT: movl %eax, %ecx
4508-
; AVX-NEXT: shrb $7, %cl
4509-
; AVX-NEXT: addb %al, %cl
4510-
; AVX-NEXT: sarb %cl
4511-
; AVX-NEXT: movzbl %cl, %eax
4512-
; AVX-NEXT: vpinsrb $13, %eax, %xmm1, %xmm1
4503+
; AVX-NEXT: xorl %ecx, %ecx
4504+
; AVX-NEXT: cmpb $-128, %al
4505+
; AVX-NEXT: sete %cl
4506+
; AVX-NEXT: vpinsrb $13, %ecx, %xmm1, %xmm1
45134507
; AVX-NEXT: vpextrb $14, %xmm0, %eax
45144508
; AVX-NEXT: movl %eax, %ecx
45154509
; AVX-NEXT: shrb $7, %cl
@@ -4518,14 +4512,12 @@ define <16 x i8> @non_splat_minus_one_divisor_1(<16 x i8> %A) {
45184512
; AVX-NEXT: movzbl %cl, %eax
45194513
; AVX-NEXT: vpinsrb $14, %eax, %xmm1, %xmm1
45204514
; AVX-NEXT: vpextrb $15, %xmm0, %eax
4521-
; AVX-NEXT: movl %eax, %ecx
4522-
; AVX-NEXT: shrb $7, %cl
4523-
; AVX-NEXT: addb %al, %cl
4524-
; AVX-NEXT: sarb %cl
4525-
; AVX-NEXT: movzbl %cl, %eax
4526-
; AVX-NEXT: vpinsrb $15, %eax, %xmm1, %xmm0
4515+
; AVX-NEXT: xorl %ecx, %ecx
4516+
; AVX-NEXT: cmpb $-128, %al
4517+
; AVX-NEXT: sete %cl
4518+
; AVX-NEXT: vpinsrb $15, %ecx, %xmm1, %xmm0
45274519
; AVX-NEXT: retq
4528-
%div = sdiv <16 x i8> %A, <i8 -1, i8 -1, i8 2, i8 -1, i8 -1, i8 -1, i8 2, i8 -1, i8 -1, i8 2, i8 2, i8 2, i8 2, i8 2, i8 2, i8 2>
4520+
%div = sdiv <16 x i8> %A, <i8 -1, i8 -1, i8 2, i8 -1, i8 -1, i8 -1, i8 2, i8 -1, i8 -1, i8 2, i8 2, i8 2, i8 2, i8 -128, i8 2, i8 -128>
45294521
ret <16 x i8> %div
45304522
}
45314523

0 commit comments

Comments
 (0)