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Commit d5127f4

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James Molloy
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[ARM] Transform LDMs into writeback form to save code size
If we have an LDM that uses only low registers and doesn't write to its base register: ldm.w r0, {r1, r2, r3} And that base register is dead after the LDM, then we can convert it to writeback form and use a narrow encoding: ldm.n r0!, {r1, r2, r3} Obviously, this introduces a new register write and so can cause WAW hazards, so I've enabled it only in minsize mode. This is a code size trick that ARM Compiler 5 ("armcc") does that we don't. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@272000 91177308-0d34-0410-b5e6-96231b3b80d8
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lib/Target/ARM/ARMLoadStoreOptimizer.cpp

Lines changed: 23 additions & 3 deletions
Original file line numberDiff line numberDiff line change
@@ -1229,10 +1229,30 @@ bool ARMLoadStoreOpt::MergeBaseUpdateLSMultiple(MachineInstr *MI) {
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} else {
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MergeInstr = findIncDecAfter(MBBI, Base, Pred, PredReg, Offset);
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if (((Mode != ARM_AM::ia && Mode != ARM_AM::ib) || Offset != Bytes) &&
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((Mode != ARM_AM::da && Mode != ARM_AM::db) || Offset != -Bytes))
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return false;
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((Mode != ARM_AM::da && Mode != ARM_AM::db) || Offset != -Bytes)) {
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// We couldn't find an inc/dec to merge. But if the base is dead, we
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// can still change to a writeback form as that will save us 2 bytes
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// of code size. It can create WAW hazards though, so only do it if
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// we're minimizing code size.
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if (!MBB.getParent()->getFunction()->optForMinSize() || !BaseKill)
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return false;
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bool HighRegsUsed = false;
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for (unsigned i = 2, e = MI->getNumOperands(); i != e; ++i)
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if (MI->getOperand(i).getReg() >= ARM::R8) {
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HighRegsUsed = true;
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break;
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}
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if (!HighRegsUsed)
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MergeInstr = MBB.end();
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else
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return false;
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}
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}
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MBB.erase(MergeInstr);
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if (MergeInstr != MBB.end())
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MBB.erase(MergeInstr);
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unsigned NewOpc = getUpdatingLSMultipleOpcode(Opcode, Mode);
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MachineInstrBuilder MIB = BuildMI(MBB, MBBI, DL, TII->get(NewOpc))
Lines changed: 21 additions & 0 deletions
Original file line numberDiff line numberDiff line change
@@ -0,0 +1,21 @@
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; RUN: llc -O3 < %s | FileCheck %s
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target datalayout = "e-m:e-p:32:32-f64:32:64-v64:32:64-v128:32:128-a:0:32-n32-S32"
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target triple = "armv7--linux-gnu"
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@a = global i32 0, align 4
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@b = global i32 0, align 4
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@c = global i32 0, align 4
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; CHECK-LABEL: bar:
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; CHECK: ldm r{{[0-9]}}!, {r0, r{{[0-9]}}, r{{[0-9]}}}
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define void @bar(i32 %a1, i32 %b1, i32 %c1) minsize optsize {
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%1 = load i32, i32* @a, align 4
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%2 = load i32, i32* @b, align 4
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%3 = load i32, i32* @c, align 4
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%4 = tail call i32 @baz(i32 %1, i32 %3) minsize optsize
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%5 = tail call i32 @baz(i32 %2, i32 %3) minsize optsize
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ret void
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}
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declare i32 @baz(i32,i32) minsize optsize

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