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Limit output of binary hex dump to 16k (0x4000) bytes since thats the maximum size which is available for the SNU second stage bootloader. In case of the MKR VIDOR 4000 the necessary FPGA bitstream is injected in the binary image above the usable flash of the MCU by the build system. When using the SNU for the MKR VIDOR 4000 we have to rely on the bitstream being already in place (not a unrealistic assumption, given that the SNU is compiled into a complete Vidor binary + fpga application).
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