[RISCV] Canonicalize beq/bne with x0 as first arg to beqz/bnez

This covers similar ground as llvm#139086. Although I think it makes sense
to land both, the practical motivation for llvm#139086 is significantly
reduced here.

This canonicalisation makes no difference to compressibility (we have
compress patterns for the operands in either order), but it does mean
that easier to read assembly is printed, as we don't have aliases
defined for beq/bne with x0 in either position.

Author: asb

llvm/lib/Target/RISCV/RISCVInstrInfo.cpp

@@ -4191,6 +4191,15 @@ bool RISCVInstrInfo::simplifyInstruction(MachineInstr &MI) const {
       return true;
     }
     break;
+  case RISCV::BEQ:
+  case RISCV::BNE:
+    // b{eq,ne} zero, rs, imm => b{eq,ne} rs, zero, imm
+    if (MI.getOperand(0).getReg() == RISCV::X0) {
+      MachineOperand MO0 = MI.getOperand(0);
+      MI.removeOperand(0);
+      MI.insert(MI.operands_begin() + 1, {MO0});
+    }
+    break;
   }
   return false;
 }

llvm/test/CodeGen/RISCV/machine-copyprop-simplifyinstruction.mir

@@ -742,3 +742,39 @@ body: |
     renamable $x10 = MAXU renamable $x11, renamable $x11
     PseudoRET implicit $x10
 ...
+---
+name: beq
+body: |
+  ; CHECK-LABEL: name: beq
+  ; CHECK: bb.0:
+  ; CHECK-NEXT:   successors: %bb.1(0x80000000)
+  ; CHECK-NEXT: {{  $}}
+  ; CHECK-NEXT:   renamable $x11 = COPY $x12
+  ; CHECK-NEXT:   BEQ $x12, $x0, %bb.1
+  ; CHECK-NEXT: {{  $}}
+  ; CHECK-NEXT: bb.1:
+  ; CHECK-NEXT:   PseudoRET
+  bb.0:
+    renamable $x11 = COPY $x12
+    BEQ $x0, renamable $x11, %bb.1
+  bb.1:
+    PseudoRET
+...
+---
+name: bne
+body: |
+  ; CHECK-LABEL: name: bne
+  ; CHECK: bb.0:
+  ; CHECK-NEXT:   successors: %bb.1(0x80000000)
+  ; CHECK-NEXT: {{  $}}
+  ; CHECK-NEXT:   renamable $x11 = COPY $x12
+  ; CHECK-NEXT:   BNE $x12, $x0, %bb.1
+  ; CHECK-NEXT: {{  $}}
+  ; CHECK-NEXT: bb.1:
+  ; CHECK-NEXT:   PseudoRET
+  bb.0:
+    renamable $x11 = COPY $x12
+    BNE $x0, renamable $x11, %bb.1
+  bb.1:
+    PseudoRET
+...