gdb, gdbserver, python, testsuite: Remove MPX.

GDB deprecated the commands "show/set mpx bound" in GDB 15.1, as Intel
listed Intel(R) Memory Protection Extensions (MPX) as removed in 2019.
MPX is also deprecated in gcc (since v9.1), the linux kernel (since v5.6)
and glibc (since v2.35).  Let's now remove MPX support in GDB completely.

This includes the removal of:
- MPX functionality including register support
- deprecated mpx commands
- i386 and amd64 implementation of the hooks report_signal_info and
  get_siginfo_type
- tests
- and pretty printer.

We keep MPX register numbers to not break compatibility with old gdbservers.

Approved-By: Felix Willgerodt <[email protected]>

Author: SchChristina

gdb/NEWS

@@ -3,6 +3,13 @@
 
 *** Changes since GDB 15
 
+* Debugging support for Intel MPX has been removed.  This includes the
+  removal of
+  ** MPX register support
+  ** the commands "show/set mpx bound" (deprecated since GDB 15)
+  ** i386 and amd64 implementation of the hooks report_signal_info and
+     get_siginfo_type.
+
 * GDB now supports printing of asynchronous events from the Intel Processor
   Trace during 'record instruction-history', 'record function-call-history'
   and all stepping commands.  This can be controlled with the new

gdb/amd64-linux-nat.c

@@ -79,6 +79,8 @@ static int amd64_linux_gregset32_reg_offset[] =
   -1, -1, -1, -1, -1, -1, -1, -1,
   -1, -1, -1, -1, -1, -1, -1, -1, -1,
   -1, -1, -1, -1, -1, -1, -1, -1,
+   /* MPX is deprecated.  Yet we keep this to not give the registers below
+      a new number.  That could break older gdbservers.  */
   -1, -1, -1, -1,		  /* MPX registers BND0 ... BND3.  */
   -1, -1,			  /* MPX registers BNDCFGU, BNDSTATUS.  */
   -1, -1, -1, -1, -1, -1, -1, -1, /* k0 ... k7 (AVX512)  */

gdb/amd64-linux-tdep.c

@@ -86,6 +86,8 @@ int amd64_linux_gregset_reg_offset[] =
   -1, -1, -1, -1, -1, -1, -1, -1, -1,
   -1, -1, -1, -1, -1, -1, -1, -1,
   -1, -1, -1, -1, -1, -1, -1, -1,
+  /* MPX is deprecated.  Yet we keep this to not give the registers below
+     a new number.  That could break older gdbservers.  */
   -1, -1, -1, -1,		/* MPX registers BND0 ... BND3.  */
   -1, -1,			/* MPX registers BNDCFGU and BNDSTATUS.  */
   -1, -1, -1, -1, -1, -1, -1, -1,     /* xmm16 ... xmm31 (AVX512)  */
@@ -1816,9 +1818,6 @@ amd64_linux_init_abi_common(struct gdbarch_info info, struct gdbarch *gdbarch,
 
   set_gdbarch_process_record (gdbarch, i386_process_record);
   set_gdbarch_process_record_signal (gdbarch, amd64_linux_record_signal);
-
-  set_gdbarch_get_siginfo_type (gdbarch, x86_linux_get_siginfo_type);
-  set_gdbarch_report_signal_info (gdbarch, i386_linux_report_signal_info);
 }
 
 static void

gdb/amd64-tdep.c

@@ -110,11 +110,6 @@ static const char * const amd64_ymmh_avx512_names[] =
   "ymm28h", "ymm29h", "ymm30h", "ymm31h"
 };
 
-static const char * const amd64_mpx_names[] =
-{
-  "bnd0raw", "bnd1raw", "bnd2raw", "bnd3raw", "bndcfgu", "bndstatus"
-};
-
 static const char * const amd64_k_names[] =
 {
   "k0", "k1", "k2", "k3",
@@ -1039,13 +1034,6 @@ amd64_push_dummy_call (struct gdbarch *gdbarch, struct value *function,
   enum bfd_endian byte_order = gdbarch_byte_order (gdbarch);
   gdb_byte buf[8];
 
-  /* BND registers can be in arbitrary values at the moment of the
-     inferior call.  This can cause boundary violations that are not
-     due to a real bug or even desired by the user.  The best to be done
-     is set the BND registers to allow access to the whole memory, INIT
-     state, before pushing the inferior call.   */
-  i387_reset_bnd_regs (gdbarch, regcache);
-
   /* Pass arguments.  */
   sp = amd64_push_arguments (regcache, nargs, args, sp, return_method);
 
@@ -3196,13 +3184,6 @@ amd64_init_abi (struct gdbarch_info info, struct gdbarch *gdbarch,
       tdep->ymm0h_regnum = AMD64_YMM0H_REGNUM;
     }
 
-  if (tdesc_find_feature (tdesc, "org.gnu.gdb.i386.mpx") != NULL)
-    {
-      tdep->mpx_register_names = amd64_mpx_names;
-      tdep->bndcfgu_regnum = AMD64_BNDCFGU_REGNUM;
-      tdep->bnd0r_regnum = AMD64_BND0R_REGNUM;
-    }
-
   if (tdesc_find_feature (tdesc, "org.gnu.gdb.i386.segments") != NULL)
     {
       tdep->fsbase_regnum = AMD64_FSBASE_REGNUM;
@@ -3377,11 +3358,10 @@ const struct target_desc *
 amd64_target_description (uint64_t xcr0, bool segments)
 {
   static target_desc *amd64_tdescs \
-    [2/*AVX*/][2/*MPX*/][2/*AVX512*/][2/*PKRU*/][2/*segments*/] = {};
+    [2/*AVX*/][2/*AVX512*/][2/*PKRU*/][2/*segments*/] = {};
   target_desc **tdesc;
 
   tdesc = &amd64_tdescs[(xcr0 & X86_XSTATE_AVX) ? 1 : 0]
-    [(xcr0 & X86_XSTATE_MPX) ? 1 : 0]
     [(xcr0 & X86_XSTATE_AVX512) ? 1 : 0]
     [(xcr0 & X86_XSTATE_PKRU) ? 1 : 0]
     [segments ? 1 : 0];

gdb/amd64-tdep.h

@@ -66,6 +66,8 @@ enum amd64_regnum
   AMD64_MXCSR_REGNUM = AMD64_XMM0_REGNUM + 16,
   AMD64_YMM0H_REGNUM,		/* %ymm0h */
   AMD64_YMM15H_REGNUM = AMD64_YMM0H_REGNUM + 15,
+  /* MPX is deprecated.  Yet we keep this to not give the registers below
+     a new number.  That could break older gdbservers.  */
   AMD64_BND0R_REGNUM = AMD64_YMM15H_REGNUM + 1,
   AMD64_BND3R_REGNUM = AMD64_BND0R_REGNUM + 3,
   AMD64_BNDCFGU_REGNUM,

gdb/arch/amd64.c

@@ -23,7 +23,6 @@
 #include "../features/i386/64bit-avx512.c"
 #include "../features/i386/64bit-core.c"
 #include "../features/i386/64bit-linux.c"
-#include "../features/i386/64bit-mpx.c"
 #include "../features/i386/64bit-segments.c"
 #include "../features/i386/64bit-sse.c"
 #include "../features/i386/pkeys.c"
@@ -65,13 +64,6 @@ amd64_create_target_description (uint64_t xcr0, bool is_x32, bool is_linux,
   if (xcr0 & X86_XSTATE_AVX)
     regnum = create_feature_i386_64bit_avx (tdesc.get (), regnum);
 
-  if (xcr0 & X86_XSTATE_MPX)
-    {
-      /* MPX is not available on x32.  */
-      gdb_assert (!is_x32);
-      regnum = create_feature_i386_64bit_mpx (tdesc.get (), regnum);
-    }
-
   if (xcr0 & X86_XSTATE_AVX512)
     regnum = create_feature_i386_64bit_avx512 (tdesc.get (), regnum);
 

gdb/arch/i386.c

@@ -25,7 +25,6 @@
 #include "../features/i386/32bit-sse.c"
 #include "../features/i386/32bit-avx.c"
 #include "../features/i386/32bit-avx512.c"
-#include "../features/i386/32bit-mpx.c"
 #include "../features/i386/32bit-segments.c"
 #include "../features/i386/pkeys.c"
 
@@ -59,9 +58,6 @@ i386_create_target_description (uint64_t xcr0, bool is_linux, bool segments)
   if (xcr0 & X86_XSTATE_AVX)
     regnum = create_feature_i386_32bit_avx (tdesc.get (), regnum);
 
-  if (xcr0 & X86_XSTATE_MPX)
-    regnum = create_feature_i386_32bit_mpx (tdesc.get (), regnum);
-
   if (xcr0 & X86_XSTATE_AVX512)
     regnum = create_feature_i386_32bit_avx512 (tdesc.get (), regnum);
 

gdb/arch/x86-linux-tdesc-features.c

@@ -65,7 +65,6 @@ static constexpr x86_xstate_feature x86_linux_all_xstate_features[] = {
   { X86_XSTATE_PKRU,	true,	true, 	true },
   { X86_XSTATE_AVX512,	true,	true, 	true },
   { X86_XSTATE_AVX,	true,	true, 	true },
-  { X86_XSTATE_MPX,	true,	true, 	false },
   { X86_XSTATE_SSE,	true,	false, 	false },
   { X86_XSTATE_X87,	true,	false, 	false }
 };
@@ -150,9 +149,9 @@ x86_linux_xcr0_to_tdesc_idx (uint64_t xcr0)
      the target descriptions (see nat/x86-linux-tdesc.c), the feature order
      represents the bit order within the generated index number.
 
-     i386  | x87 sse mpx avx avx512 pkru
-     amd64 |         mpx avx avx512 pkru
-     i32   |             avx avx512 pkru
+     i386  | x87 sse avx avx512 pkru
+     amd64 |         avx avx512 pkru
+     i32   |         avx avx512 pkru
 
      The features are ordered so that for each mode (i386, amd64, i32) the
      generated index will form a continuous range.  */

gdb/data-directory/Makefile.in

@@ -120,8 +120,7 @@ PYTHON_FILE_LIST = \
 	gdb/function/as_string.py \
 	gdb/function/caller_is.py \
 	gdb/function/strfns.py \
-	gdb/printer/__init__.py \
-	gdb/printer/bound_registers.py
+	gdb/printer/__init__.py
 
 @HAVE_PYTHON_TRUE@PYTHON_FILES = $(PYTHON_FILE_LIST)
 @HAVE_PYTHON_FALSE@PYTHON_FILES =

gdb/doc/gdb.texinfo

@@ -7077,33 +7077,6 @@ $1 = (void *) 0x7ffff7ff7000
 
 Depending on target support, @code{$_siginfo} may also be writable.
 
-@cindex Intel MPX boundary violations
-@cindex boundary violations, Intel MPX
-On some targets, a @code{SIGSEGV} can be caused by a boundary
-violation, i.e., accessing an address outside of the allowed range.
-In those cases @value{GDBN} may displays additional information,
-depending on how @value{GDBN} has been told to handle the signal.
-With @code{handle stop SIGSEGV}, @value{GDBN} displays the violation
-kind: "Upper" or "Lower", the memory address accessed and the
-bounds, while with @code{handle nostop SIGSEGV} no additional
-information is displayed.
-
-The usual output of a segfault is:
-@smallexample
-Program received signal SIGSEGV, Segmentation fault
-0x0000000000400d7c in upper () at i386-mpx-sigsegv.c:68
-68        value = *(p + len);
-@end smallexample
-
-While a bound violation is presented as:
-@smallexample
-Program received signal SIGSEGV, Segmentation fault
-Upper bound violation while accessing address 0x7fffffffc3b3
-Bounds: [lower = 0x7fffffffc390, upper = 0x7fffffffc3a3]
-0x0000000000400d7c in upper () at i386-mpx-sigsegv.c:68
-68        value = *(p + len);
-@end smallexample
-
 @node Thread Stops
 @section Stopping and Starting Multi-thread Programs
 
@@ -26803,91 +26776,6 @@ Show the current setting of the convention to return @code{struct}s
 from functions.
 @end table
 
-
-@subsubsection Intel @dfn{Memory Protection Extensions} (MPX).
-@cindex Intel Memory Protection Extensions (MPX).
-
-Memory Protection Extension (MPX) adds the bound registers @samp{BND0}
-@footnote{The register named with capital letters represent the architecture
-registers.} through @samp{BND3}.  Bound registers store a pair of 64-bit values
-which are the lower bound and upper bound.  Bounds are effective addresses or
-memory locations.  The upper bounds are architecturally represented in 1's
-complement form.  A bound having lower bound = 0, and upper bound = 0
-(1's complement of all bits set) will allow access to the entire address space.
-
-@samp{BND0} through @samp{BND3} are represented in @value{GDBN} as @samp{bnd0raw}
-through @samp{bnd3raw}.  Pseudo registers @samp{bnd0} through @samp{bnd3}
-display the upper bound performing the complement of one operation on the
-upper bound value, i.e.@ when upper bound in @samp{bnd0raw} is 0 in the
-@value{GDBN} @samp{bnd0} it will be @code{0xfff@dots{}}.  In this sense it
-can also be noted that the upper bounds are inclusive.
-
-As an example, assume that the register BND0 holds bounds for a pointer having
-access allowed for the range between 0x32 and 0x71.  The values present on
-bnd0raw and bnd registers are presented as follows:
-
-@smallexample
-	bnd0raw = @{0x32, 0xffffffff8e@}
-	bnd0 = @{lbound = 0x32, ubound = 0x71@} : size 64
-@end smallexample
-
-This way the raw value can be accessed via bnd0raw@dots{}bnd3raw.  Any
-change on bnd0@dots{}bnd3 or bnd0raw@dots{}bnd3raw is reflect on its
-counterpart.  When the bnd0@dots{}bnd3 registers are displayed via
-Python, the display includes the memory size, in bits, accessible to
-the pointer.
-
-Bounds can also be stored in bounds tables, which are stored in
-application memory.  These tables store bounds for pointers by specifying
-the bounds pointer's value along with its bounds.  Evaluating and changing
-bounds located in bound tables is therefore interesting while investigating
-bugs on MPX context.  @value{GDBN} provides commands for this purpose:
-
-@table @code
-@item show mpx bound @var{pointer}
-@kindex show mpx bound
-Display bounds of the given @var{pointer}.
-
-@item set mpx bound @var{pointer}, @var{lbound}, @var{ubound}
-@kindex  set mpx bound
-Set the bounds of a pointer in the bound table.
-This command takes three parameters: @var{pointer} is the pointers
-whose bounds are to be changed, @var{lbound} and @var{ubound} are new values
-for lower and upper bounds respectively.
-@end table
-
-Both commands are deprecated and will be removed in future versions of
-@value{GDBN}.  MPX itself was listed as removed by Intel in 2019.
-
-When you call an inferior function on an Intel MPX enabled program,
-GDB sets the inferior's bound registers to the init (disabled) state
-before calling the function.  As a consequence, bounds checks for the
-pointer arguments passed to the function will always pass.
-
-This is necessary because when you call an inferior function, the
-program is usually in the middle of the execution of other function.
-Since at that point bound registers are in an arbitrary state, not
-clearing them would lead to random bound violations in the called
-function.
-
-You can still examine the influence of the bound registers on the
-execution of the called function by stopping the execution of the
-called function at its prologue, setting bound registers, and
-continuing the execution.  For example:
-
-@smallexample
-	$ break *upper
-	Breakpoint 2 at 0x4009de: file i386-mpx-call.c, line 47.
-	$ print upper (a, b, c, d, 1)
-	Breakpoint 2, upper (a=0x0, b=0x6e0000005b, c=0x0, d=0x0, len=48)....
-	$ print $bnd0
-	@{lbound = 0x0, ubound = ffffffff@} : size -1
-@end smallexample
-
-At this last step the value of bnd0 can be changed for investigation of bound
-violations caused along the execution of the call.  In order to know how to
-set the bound registers or bound table for the call consult the ABI.
-
 @subsubsection x87 registers
 
 @value{GDBN} provides access to the x87 state through the following registers:
@@ -49746,16 +49634,6 @@ describe the upper 128 bits of @sc{ymm} registers:
 @samp{ymm0h} through @samp{ymm15h} for amd64
 @end itemize
 
-The @samp{org.gnu.gdb.i386.mpx} is an optional feature representing Intel
-Memory Protection Extension (MPX).  It should describe the following registers:
-
-@itemize @minus
-@item
-@samp{bnd0raw} through @samp{bnd3raw} for i386 and amd64.
-@item
-@samp{bndcfgu} and @samp{bndstatus} for i386 and amd64.
-@end itemize
-
 The @samp{org.gnu.gdb.i386.linux} feature is optional.  It should
 describe a single register, @samp{orig_eax}.
 

gdb/features/Makefile

@@ -222,12 +222,10 @@ FEATURE_XMLFILES = aarch64-core.xml \
 	i386/32bit-sse.xml \
 	i386/32bit-linux.xml \
 	i386/32bit-avx.xml \
-	i386/32bit-mpx.xml \
 	i386/32bit-avx512.xml \
 	i386/32bit-segments.xml \
 	i386/64bit-avx512.xml \
 	i386/64bit-core.xml \
-	i386/64bit-mpx.xml \
 	i386/64bit-segments.xml \
 	i386/64bit-avx.xml \
 	i386/64bit-linux.xml \