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- ; RUN: llc < %s -march=x86-64 -mcpu=nehalem -mattr=+sse4.2 | FileCheck %s
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+ ; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
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+ ; RUN: llc < %s -mtriple=i686-unknown -mattr=+sse4.2 | FileCheck %s --check-prefix=X32
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+ ; RUN: llc < %s -mtriple=x86_64-unknown -mattr=+sse4.2 | FileCheck %s --check-prefix=X64
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+
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; widen extract subvector
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define void @convert (<2 x double >* %dst.addr , <3 x double > %src ) {
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+ ; X32-LABEL: convert:
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+ ; X32: # BB#0: # %entry
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+ ; X32-NEXT: movups {{[0-9]+}}(%esp), %xmm0
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+ ; X32-NEXT: movl {{[0-9]+}}(%esp), %eax
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+ ; X32-NEXT: movaps %xmm0, (%eax)
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+ ; X32-NEXT: retl
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+ ;
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+ ; X64-LABEL: convert:
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+ ; X64: # BB#0: # %entry
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+ ; X64-NEXT: unpcklpd {{.*#+}} xmm0 = xmm0[0],xmm1[0]
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+ ; X64-NEXT: movapd %xmm0, (%rdi)
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+ ; X64-NEXT: retq
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entry:
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- ; CHECK-LABEL: convert:
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- ; CHECK: unpcklpd {{%xmm[0-7]}}, {{%xmm[0-7]}}
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- ; CHECK-NEXT: movapd
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- %val = shufflevector <3 x double > %src , <3 x double > undef , <2 x i32 > < i32 0 , i32 1 >
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+ %val = shufflevector <3 x double > %src , <3 x double > undef , <2 x i32 > <i32 0 , i32 1 >
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store <2 x double > %val , <2 x double >* %dst.addr
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ret void
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}
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