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Add target hse u575xg (ARMmbed#218)
* Definition added for hse and msi pll * Updating rom and ram size * Adding target MCU_STM32U575xG
1 parent f42c322 commit 033058a

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3 files changed

+122
-3
lines changed

3 files changed

+122
-3
lines changed

targets/TARGET_STM/TARGET_STM32U5/TARGET_STM32U575xG/cmsis_nvic.h

Lines changed: 2 additions & 2 deletions
Original file line numberDiff line numberDiff line change
@@ -22,15 +22,15 @@
2222
#endif
2323

2424
#if !defined(MBED_ROM_SIZE)
25-
#define MBED_ROM_SIZE 0x0 // 0 B
25+
#define MBED_ROM_SIZE 0x100000 // 1MB
2626
#endif
2727

2828
#if !defined(MBED_RAM_START)
2929
#define MBED_RAM_START 0x20000000
3030
#endif
3131

3232
#if !defined(MBED_RAM_SIZE)
33-
#define MBED_RAM_SIZE 0x0 // 0 B
33+
#define MBED_RAM_SIZE 0xc0000 // 786K
3434
#endif
3535

3636
#define NVIC_NUM_VECTORS 142

targets/TARGET_STM/TARGET_STM32U5/TARGET_STM32U575xG/system_clock.c

Lines changed: 108 additions & 1 deletion
Original file line numberDiff line numberDiff line change
@@ -39,6 +39,11 @@
3939
#define USE_PLL_HSI 0x2 // Use HSI internal clock
4040
#define USE_PLL_MSI 0x1 // Use MSI internal clock
4141

42+
#define DEBUG_MCO (0) // Output the MCO on PA8 for debugging (0=OFF, 1=SYSCLK)
43+
// TODO , 2=HSE, 3=HSI, 4=MSI)
44+
#define DEBUG_LSCO (0) // Output the LSCO on PA2 for debugging (0=OFF, 1=LSE)
45+
// TODO , 2=LSI)
46+
4247
#if ( ((CLOCK_SOURCE) & USE_PLL_HSE_XTAL) || ((CLOCK_SOURCE) & USE_PLL_HSE_EXTC) )
4348
uint8_t SetSysClock_PLL_HSE(uint8_t bypass);
4449
#endif /* ((CLOCK_SOURCE) & USE_PLL_HSE_XTAL) || ((CLOCK_SOURCE) & USE_PLL_HSE_EXTC) */
@@ -90,6 +95,18 @@ MBED_WEAK void SetSysClock(void)
9095
}
9196
}
9297
}
98+
99+
// Output clock on MCO pin(PA8) for debugging purpose
100+
#if DEBUG_MCO == 1
101+
HAL_RCC_MCOConfig(RCC_MCO, RCC_MCOSOURCE_SYSCLK, RCC_MCO_NODIV); // 160 MHz
102+
#endif
103+
104+
// Output clock on LSCO pin(PA2) for debugging purpose
105+
// LSE is set with the low power ticker
106+
#if DEBUG_LSCO == 1
107+
HAL_RCCEx_EnableLSCO(RCC_LSCOSOURCE_LSE); // 32 kHz
108+
#endif
109+
93110
}
94111

95112
#if ( ((CLOCK_SOURCE) & USE_PLL_HSE_XTAL) || ((CLOCK_SOURCE) & USE_PLL_HSE_EXTC) )
@@ -98,7 +115,73 @@ MBED_WEAK void SetSysClock(void)
98115
/******************************************************************************/
99116
MBED_WEAK uint8_t SetSysClock_PLL_HSE(uint8_t bypass)
100117
{
101-
return 0;
118+
RCC_ClkInitTypeDef RCC_ClkInitStruct = {0};
119+
RCC_OscInitTypeDef RCC_OscInitStruct = {0};
120+
121+
#if DEVICE_USBDEVICE
122+
RCC_PeriphCLKInitTypeDef RCC_PeriphClkInit = {0};
123+
#endif /* DEVICE_USBDEVICE */
124+
125+
/* GPIO Ports Clock Enable */
126+
__HAL_RCC_GPIOH_CLK_ENABLE();
127+
__HAL_RCC_GPIOB_CLK_ENABLE();
128+
__HAL_RCC_PWR_CLK_ENABLE();
129+
if (HAL_PWREx_ControlVoltageScaling(PWR_REGULATOR_VOLTAGE_SCALE1) != HAL_OK) {
130+
return 0; // FAIL
131+
}
132+
133+
// Enable HSE oscillator and activate PLL with HSE as source
134+
RCC_OscInitStruct.OscillatorType = RCC_OSCILLATORTYPE_HSE | RCC_OSCILLATORTYPE_HSI48;
135+
if (bypass == 0) {
136+
RCC_OscInitStruct.HSEState = RCC_HSE_ON; // External xtal on OSC_IN/OSC_OUT
137+
} else {
138+
RCC_OscInitStruct.HSEState = RCC_HSE_BYPASS; // External clock on OSC_IN
139+
}
140+
#if DEVICE_USBDEVICE
141+
RCC_OscInitStruct.HSI48State = RCC_HSI48_ON;
142+
#else
143+
RCC_OscInitStruct.HSI48State = RCC_HSI48_OFF;
144+
#endif /* DEVICE_USBDEVICE */
145+
#if HSE_VALUE==10000000UL
146+
RCC_OscInitStruct.PLL.PLLState = RCC_PLL_ON;
147+
RCC_OscInitStruct.PLL.PLLSource = RCC_PLLSOURCE_HSE;
148+
RCC_OscInitStruct.PLL.PLLMBOOST = RCC_PLLMBOOST_DIV1;
149+
RCC_OscInitStruct.PLL.PLLM = 1; // VCO input clock = 10 MHz (10 MHz / 1)
150+
#else
151+
#error Unsupported external clock value, check HSE_VALUE define
152+
#endif
153+
RCC_OscInitStruct.PLL.PLLN = 16; // VCO output clock = 160 MHz (10 MHz * 16)
154+
RCC_OscInitStruct.PLL.PLLP = 2;
155+
RCC_OscInitStruct.PLL.PLLQ = 2;
156+
RCC_OscInitStruct.PLL.PLLR = 1; // PLL clock = 160 MHz
157+
RCC_OscInitStruct.PLL.PLLRGE = RCC_PLLVCIRANGE_1;
158+
RCC_OscInitStruct.PLL.PLLFRACN = 0;
159+
160+
if (HAL_RCC_OscConfig(&RCC_OscInitStruct) != HAL_OK) {
161+
return 0; // FAIL
162+
}
163+
164+
#if DEVICE_USBDEVICE
165+
RCC_PeriphClkInit.PeriphClockSelection = RCC_PERIPHCLK_USB;
166+
PeriphClkIniRCC_PeriphClkInittStruct.UsbClockSelection = RCC_USBCLKSOURCE_HSI48; /* 48 MHz */
167+
if (HAL_RCCEx_PeriphCLKConfig(&RCC_PeriphClkInit) != HAL_OK) {
168+
return 0; // FAIL
169+
}
170+
#endif /* DEVICE_USBDEVICE */
171+
172+
// Select PLL clock as system clock source and configure the HCLK, PCLK1 and PCLK2 clock dividers
173+
RCC_ClkInitStruct.ClockType = (RCC_CLOCKTYPE_HCLK | RCC_CLOCKTYPE_SYSCLK | RCC_CLOCKTYPE_PCLK1 | RCC_CLOCKTYPE_PCLK2 | RCC_CLOCKTYPE_PCLK3);
174+
RCC_ClkInitStruct.SYSCLKSource = RCC_SYSCLKSOURCE_PLLCLK; // 160 MHz
175+
RCC_ClkInitStruct.AHBCLKDivider = RCC_SYSCLK_DIV1; // 160 MHz
176+
RCC_ClkInitStruct.APB1CLKDivider = RCC_HCLK_DIV1; // 160 MHz
177+
RCC_ClkInitStruct.APB2CLKDivider = RCC_HCLK_DIV1; // 160 MHz
178+
RCC_ClkInitStruct.APB3CLKDivider = RCC_HCLK_DIV1; // 160 MHz
179+
180+
if (HAL_RCC_ClockConfig(&RCC_ClkInitStruct, FLASH_LATENCY_4) != HAL_OK) {
181+
return 0; // FAIL
182+
}
183+
return 1; // OK
184+
102185
}
103186
#endif /* ((CLOCK_SOURCE) & USE_PLL_HSE_XTAL) || ((CLOCK_SOURCE) & USE_PLL_HSE_EXTC) */
104187

@@ -127,6 +210,17 @@ MBED_WEAK uint8_t SetSysClock_PLL_MSI(void)
127210
HAL_PWREx_EnableVddA();
128211
HAL_PWREx_ControlVoltageScaling(PWR_REGULATOR_VOLTAGE_SCALE1);
129212

213+
#if MBED_CONF_TARGET_LSE_AVAILABLE
214+
// Enable LSE Oscillator to automatically calibrate the MSI clock
215+
RCC_OscInitStruct.OscillatorType = RCC_OSCILLATORTYPE_LSE;
216+
RCC_OscInitStruct.PLL.PLLState = RCC_PLL_NONE; // No PLL update
217+
RCC_OscInitStruct.LSEState = RCC_LSE_ON; // External 32.768 kHz clock on OSC32_IN/OSC32_OUT
218+
if (HAL_RCC_OscConfig(&RCC_OscInitStruct) != HAL_OK) {
219+
return 0; // FAIL
220+
}
221+
#endif /* MBED_CONF_TARGET_LSE_AVAILABLE */
222+
223+
/* Enable MSI Oscillator and activate PLL with MSI as source */
130224
RCC_OscInitStruct.OscillatorType = RCC_OSCILLATORTYPE_HSI48 | RCC_OSCILLATORTYPE_HSI
131225
| RCC_OSCILLATORTYPE_MSI;
132226
RCC_OscInitStruct.HSIState = RCC_HSI_ON;
@@ -149,6 +243,19 @@ MBED_WEAK uint8_t SetSysClock_PLL_MSI(void)
149243
return 0; // FAIL
150244
}
151245

246+
#if MBED_CONF_TARGET_LSE_AVAILABLE
247+
/* Enable MSI Auto-calibration through LSE */
248+
HAL_RCCEx_EnableMSIPLLMode();
249+
#endif /* MBED_CONF_TARGET_LSE_AVAILABLE */
250+
251+
#if DEVICE_USBDEVICE
252+
/* Select MSI output as USB clock source */
253+
PeriphClkInitStruct.PeriphClockSelection = RCC_PERIPHCLK_USB;
254+
PeriphClkInitStruct.UsbClockSelection = RCC_USBCLKSOURCE_MSI; /* 48 MHz */
255+
HAL_RCCEx_PeriphCLKConfig(&PeriphClkInitStruct);
256+
#endif /* DEVICE_USBDEVICE */
257+
258+
// Select PLL as system clock source and configure the HCLK, PCLK1 and PCLK2 clocks dividers
152259
RCC_ClkInitStruct.ClockType = RCC_CLOCKTYPE_HCLK | RCC_CLOCKTYPE_SYSCLK
153260
| RCC_CLOCKTYPE_PCLK1 | RCC_CLOCKTYPE_PCLK2
154261
| RCC_CLOCKTYPE_PCLK3;

targets/targets.json5

Lines changed: 12 additions & 0 deletions
Original file line numberDiff line numberDiff line change
@@ -4883,6 +4883,18 @@
48834883
// Jumper JP4 can be used to switch VDD_MCU to 1.8V in which case you should override this setting to 1.8.
48844884
"default-adc-vref": 3.3
48854885
}
4886+
},
4887+
"MCU_STM32U575xG": {
4888+
"inherits": [
4889+
"MCU_STM32U5"
4890+
],
4891+
"public": false,
4892+
"extra_labels_add": [
4893+
"STM32U575xG"
4894+
],
4895+
"macros_add": [
4896+
"STM32U575xx"
4897+
]
48864898
},
48874899
"MCU_STM32U585xI": {
48884900
"inherits": [

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