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Jamie SmithcaoddxYannCharbonjeromecoutantsaheerb
authored
Synchronize upstream changes - May 2023 edition (ARMmbed#160)
* fix STM32L1 FLASH_SIZE for cat.3 devices with DEV_ID 0x436 * Fix mesh connect semaphore not releasing causing blockage * Add support of NSAPI_ICMP sockets in Nanostack * STM32F1: add MCU_STM32F103xD support * STM32F1: add MCU_STM32F103xG support * test: Disable failing tests due to echo server Some tests are failing as echo.mbedcloudtesting.com is not serving TLS requests anymore. Signed-off-by: Saheer Babu <[email protected]> * Check CAN DLC length value * Fix default interface ID only being used partially If user sets the default interface ID for a socket (e.g. using setsockopt with SOCKET_INTERFACE_SELECT), the default interface should take over other interface selection mechanisms as a interface is bound to the socket. This applies for both IPv6 local and global scopes for unicast messages but not for multicast messages as these are bound to a multicast interface using SOCKET_IPV6_MULTICAST_IF socket option. * Targets: NXP: IMXRT: Fixed GCC_ARM lds syntax. Signed-off-by: Yilin Sun <[email protected]> * CAN: read only up to 8 bytes If HAL implementation writes more than 8 bytes of data, error immediately. CANMessage defines only 8 bytes of data, lenght cannot be > 8. This fixes ARMmbed#15361 Signed-off-by: Martin Kojtal <[email protected]> * STM32F303xC: add RAM_CCM in GCC linker script * fix(drivers/emac): Remove incorrect RMII RX ER initialization * fix(drivers/emac): Add missing SPDX indetifier to ST driver files * fixed compiler inline issue * Update Mbed version block * removed HSE speed limitation for STM32G431RB * Added HSE range validation for STM32g431xB * added support for 4, 8 and 16MHz * M487: Remove unused variable 'u32EscapeFrame' Remove unused variable 'u32EscapeFrame' in BSP m480_ccap.h to avoid warnings * force FIFO IRQ for FDCan RX on H7 * Add hardware CRC support to STM32G4 * add support for Nucleo-H745ZI * Update MAX32670 peripheral drivers with final ones that use by SDK Signed-off-by: Sadik.Ozer <[email protected]> * MAX32670 apply mbed required changes on peripheral drivers Signed-off-by: Sadik.Ozer <[email protected]> * M467: Support CAN bus 1. Update BSP CANFD driver 2. Notes for implementation (1) Each CANFD instance supports two IRQ lines. Use only line 0. Line 1 is not used. (2) For Rx disabling multiple filter handles, 1) Map all filter handles to filter handle 0 2) Use Rx FIFO 0 for filter handle 0 (3) For Rx enabling multiple filter handles, 1) Use Rx FIFO 0 for filter handle 0 2) Use Rx FIFO 1 for filter handle through first invoking can_filter() 3) Use dedicated Rx Buffer for other filter handles NOTE: H/W supports mask on Rx FIFO 0/1 but not on dedicated Rx Buffer. (4) For Tx, use only dedicated Tx Buffer. BSP CANFD driver doesn't support Tx FIFO/Queue. (5) Support no CAN FD. * Fix 'new[]' array freed with 'delete' The array _scratch_buf is allocated using new[] in line 761 of mbed-os/storage/kvstore/securestore/source/SecureStore.cpp. But it was freed using delete. * Define default parameters of functions of derived class the same as the base class The member function bringup() of class ThreadInterface redefines parameter stack's default value to IPV6_STACK from the inherited default value DEFAULT_STACK (in Interface). The default value will be resolved statically, not by dispatch, so this can cause confusion. Similar arguments apply to LoWPANNDInterface and WisunInterface. * Avoid calling virtual functions from constructors and destructors Virtual functions are resolved statically (not dynamically) in constructors and destructors for the same class. The call should be made explicitly static by qualifying it using the scope resolution operator. * Fix potentially overrunning write of sprintf Format string "%d" requires 12 bytes (including the null terminator). Also, use snprintf instead of sprintf to prevent buffer overflow. * Fix system_clock.c location Signed-off-by: Jasper Jonker <[email protected]> * Fix variable name Signed-off-by: Jasper <[email protected]> * Change storage-class of secret_buf to static Storing the address of a local variable (`secret_buf`) in non-local memory (`prf_ptr->secret`) can cause a dangling pointer bug if the address is used after the function returns. * fix compiling errors of FATFileSystem when exFAT was enabled * Add OSPI support for STM32H7 * Nuvoton: Enable extending sampling time for ADC/EADC For all Nuvoton targets, enable extending sampling time in ADC/EADC clocks on per-pin basis. --------- Signed-off-by: Saheer Babu <[email protected]> Signed-off-by: Yilin Sun <[email protected]> Signed-off-by: Martin Kojtal <[email protected]> Signed-off-by: Sadik.Ozer <[email protected]> Signed-off-by: Jasper Jonker <[email protected]> Signed-off-by: Jasper <[email protected]> Co-authored-by: caodd <[email protected]> Co-authored-by: YannCharbon <[email protected]> Co-authored-by: Jerome Coutant <[email protected]> Co-authored-by: Saheer Babu <[email protected]> Co-authored-by: Martyx00 <[email protected]> Co-authored-by: Yilin Sun <[email protected]> Co-authored-by: Martin Kojtal <[email protected]> Co-authored-by: akiroz <[email protected]> Co-authored-by: Charles <[email protected]> Co-authored-by: Leonard Chiang <[email protected]> Co-authored-by: Chun-Chieh Li <[email protected]> Co-authored-by: jmcloud <[email protected]> Co-authored-by: Augusto Zanellato <[email protected]> Co-authored-by: Sadik.Ozer <[email protected]> Co-authored-by: Mingjie Shen <[email protected]> Co-authored-by: Jasper Jonker <[email protected]> Co-authored-by: wdx04 <[email protected]>
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‎connectivity/drivers/cellular/GEMALTO/CINTERION/GEMALTO_CINTERION_CellularStack.cpp

Lines changed: 2 additions & 2 deletions
Original file line numberDiff line numberDiff line change
@@ -186,8 +186,8 @@ nsapi_error_t GEMALTO_CINTERION_CellularStack::socket_open_defer(CellularSocket
186186
}
187187
}
188188
if (strcmp(paramTag, "conId") == 0) {
189-
char buf[10];
190-
std::sprintf(buf, "%d", _cid);
189+
char buf[12];
190+
std::snprintf(buf, sizeof(buf), "%d", _cid);
191191
if (strcmp(paramValue, buf) == 0) {
192192
foundConIdType = true;
193193
}

‎connectivity/drivers/emac/TARGET_STM/TARGET_STM32F2/TARGET_NUCLEO_F207ZG/stm32f2_eth_init.c

Lines changed: 6 additions & 5 deletions
Original file line numberDiff line numberDiff line change
@@ -1,6 +1,7 @@
11
/* mbed Microcontroller Library
22
* Copyright (c) 2022, STMicroelectronics
33
* All rights reserved.
4+
* SPDX-License-Identifier: BSD-3-Clause
45
*
56
* SPDX-License-Identifier: Apache-2.0
67
*
@@ -53,7 +54,7 @@ void HAL_ETH_MspInit(ETH_HandleTypeDef *heth)
5354
RMII_MII_CRS_DV -------------------> PA7
5455
RMII_MII_RXD0 ---------------------> PC4
5556
RMII_MII_RXD1 ---------------------> PC5
56-
RMII_MII_RXER ---------------------> PG2
57+
RMII_MII_RXER ---------------------> none
5758
RMII_MII_TX_EN --------------------> PG11
5859
RMII_MII_TXD0 ---------------------> PG13
5960
RMII_MII_TXD1 ---------------------> PB13
@@ -74,8 +75,8 @@ void HAL_ETH_MspInit(ETH_HandleTypeDef *heth)
7475
GPIO_InitStructure.Pin = GPIO_PIN_1 | GPIO_PIN_4 | GPIO_PIN_5;
7576
HAL_GPIO_Init(GPIOC, &GPIO_InitStructure);
7677

77-
/* Configure PG2, PG11 and PG13 */
78-
GPIO_InitStructure.Pin = GPIO_PIN_2 | GPIO_PIN_11 | GPIO_PIN_13;
78+
/* Configure PG11 and PG13 */
79+
GPIO_InitStructure.Pin = GPIO_PIN_11 | GPIO_PIN_13;
7980
HAL_GPIO_Init(GPIOG, &GPIO_InitStructure);
8081

8182
/* Enable the Ethernet global Interrupt */
@@ -103,15 +104,15 @@ void HAL_ETH_MspDeInit(ETH_HandleTypeDef *heth)
103104
RMII_MII_CRS_DV -------------------> PA7
104105
RMII_MII_RXD0 ---------------------> PC4
105106
RMII_MII_RXD1 ---------------------> PC5
106-
RMII_MII_RXER ---------------------> PG2
107+
RMII_MII_RXER ---------------------> none
107108
RMII_MII_TX_EN --------------------> PG11
108109
RMII_MII_TXD0 ---------------------> PG13
109110
RMII_MII_TXD1 ---------------------> PB13
110111
*/
111112
HAL_GPIO_DeInit(GPIOA, GPIO_PIN_1 | GPIO_PIN_2 | GPIO_PIN_7);
112113
HAL_GPIO_DeInit(GPIOB, GPIO_PIN_13);
113114
HAL_GPIO_DeInit(GPIOC, GPIO_PIN_1 | GPIO_PIN_4 | GPIO_PIN_5);
114-
HAL_GPIO_DeInit(GPIOG, GPIO_PIN_2 | GPIO_PIN_11 | GPIO_PIN_13);
115+
HAL_GPIO_DeInit(GPIOG, GPIO_PIN_11 | GPIO_PIN_13);
115116

116117
/* Disable the Ethernet global Interrupt */
117118
NVIC_DisableIRQ(ETH_IRQn);

‎connectivity/drivers/emac/TARGET_STM/TARGET_STM32F4/TARGET_ARCH_MAX/stm32f4_eth_init.c

Lines changed: 3 additions & 3 deletions
Original file line numberDiff line numberDiff line change
@@ -2,7 +2,7 @@
22
* Copyright (c) 2022, STMicroelectronics
33
* All rights reserved.
44
*
5-
* SPDX-License-Identifier: Apache-2.0
5+
* SPDX-License-Identifier: BSD-3-Clause
66
*
77
* Redistribution and use in source and binary forms, with or without
88
* modification, are permitted provided that the following conditions are met:
@@ -50,7 +50,7 @@ void HAL_ETH_MspInit(ETH_HandleTypeDef *heth)
5050
RMII_MII_CRS_DV -------------------> PA7
5151
RMII_MII_RXD0 ---------------------> PC4
5252
RMII_MII_RXD1 ---------------------> PC5
53-
RMII_MII_RXER --------------------->
53+
RMII_MII_RXER ---------------------> none
5454
RMII_MII_TX_EN --------------------> PB11
5555
RMII_MII_TXD0 ---------------------> PB12
5656
RMII_MII_TXD1 ---------------------> PB13
@@ -96,7 +96,7 @@ void HAL_ETH_MspDeInit(ETH_HandleTypeDef *heth)
9696
RMII_MII_CRS_DV -------------------> PA7
9797
RMII_MII_RXD0 ---------------------> PC4
9898
RMII_MII_RXD1 ---------------------> PC5
99-
RMII_MII_RXER --------------------->
99+
RMII_MII_RXER ---------------------> none
100100
RMII_MII_TX_EN --------------------> PB11
101101
RMII_MII_TXD0 ---------------------> PB12
102102
RMII_MII_TXD1 ---------------------> PB13

‎connectivity/drivers/emac/TARGET_STM/TARGET_STM32F4/TARGET_NUCLEO_F429ZI/stm32f4_eth_init.c

Lines changed: 6 additions & 5 deletions
Original file line numberDiff line numberDiff line change
@@ -1,6 +1,7 @@
11
/* mbed Microcontroller Library
22
* Copyright (c) 2022, STMicroelectronics
33
* All rights reserved.
4+
* SPDX-License-Identifier: BSD-3-Clause
45
*
56
* SPDX-License-Identifier: Apache-2.0
67
*
@@ -53,7 +54,7 @@ void HAL_ETH_MspInit(ETH_HandleTypeDef *heth)
5354
RMII_MII_CRS_DV -------------------> PA7
5455
RMII_MII_RXD0 ---------------------> PC4
5556
RMII_MII_RXD1 ---------------------> PC5
56-
RMII_MII_RXER ---------------------> PG2
57+
RMII_MII_RXER ---------------------> none
5758
RMII_MII_TX_EN --------------------> PG11
5859
RMII_MII_TXD0 ---------------------> PG13
5960
RMII_MII_TXD1 ---------------------> PB13
@@ -74,8 +75,8 @@ void HAL_ETH_MspInit(ETH_HandleTypeDef *heth)
7475
GPIO_InitStructure.Pin = GPIO_PIN_1 | GPIO_PIN_4 | GPIO_PIN_5;
7576
HAL_GPIO_Init(GPIOC, &GPIO_InitStructure);
7677

77-
/* Configure PG2, PG11 and PG13 */
78-
GPIO_InitStructure.Pin = GPIO_PIN_2 | GPIO_PIN_11 | GPIO_PIN_13;
78+
/* Configure PG11 and PG13 */
79+
GPIO_InitStructure.Pin = GPIO_PIN_11 | GPIO_PIN_13;
7980
HAL_GPIO_Init(GPIOG, &GPIO_InitStructure);
8081

8182
/* Enable the Ethernet global Interrupt */
@@ -103,15 +104,15 @@ void HAL_ETH_MspDeInit(ETH_HandleTypeDef *heth)
103104
RMII_MII_CRS_DV -------------------> PA7
104105
RMII_MII_RXD0 ---------------------> PC4
105106
RMII_MII_RXD1 ---------------------> PC5
106-
RMII_MII_RXER ---------------------> PG2
107+
RMII_MII_RXER ---------------------> none
107108
RMII_MII_TX_EN --------------------> PG11
108109
RMII_MII_TXD0 ---------------------> PG13
109110
RMII_MII_TXD1 ---------------------> PB13
110111
*/
111112
HAL_GPIO_DeInit(GPIOA, GPIO_PIN_1 | GPIO_PIN_2 | GPIO_PIN_7);
112113
HAL_GPIO_DeInit(GPIOB, GPIO_PIN_13);
113114
HAL_GPIO_DeInit(GPIOC, GPIO_PIN_1 | GPIO_PIN_4 | GPIO_PIN_5);
114-
HAL_GPIO_DeInit(GPIOG, GPIO_PIN_2 | GPIO_PIN_11 | GPIO_PIN_13);
115+
HAL_GPIO_DeInit(GPIOG, GPIO_PIN_11 | GPIO_PIN_13);
115116

116117
/* Disable the Ethernet global Interrupt */
117118
NVIC_DisableIRQ(ETH_IRQn);

‎connectivity/drivers/emac/TARGET_STM/TARGET_STM32F4/TARGET_NUCLEO_F439ZI/stm32f4_eth_init.c

Lines changed: 6 additions & 5 deletions
Original file line numberDiff line numberDiff line change
@@ -1,6 +1,7 @@
11
/* mbed Microcontroller Library
22
* Copyright (c) 2022, STMicroelectronics
33
* All rights reserved.
4+
* SPDX-License-Identifier: BSD-3-Clause
45
*
56
* SPDX-License-Identifier: Apache-2.0
67
*
@@ -53,7 +54,7 @@ void HAL_ETH_MspInit(ETH_HandleTypeDef *heth)
5354
RMII_MII_CRS_DV -------------------> PA7
5455
RMII_MII_RXD0 ---------------------> PC4
5556
RMII_MII_RXD1 ---------------------> PC5
56-
RMII_MII_RXER ---------------------> PG2
57+
RMII_MII_RXER ---------------------> none
5758
RMII_MII_TX_EN --------------------> PG11
5859
RMII_MII_TXD0 ---------------------> PG13
5960
RMII_MII_TXD1 ---------------------> PB13
@@ -74,8 +75,8 @@ void HAL_ETH_MspInit(ETH_HandleTypeDef *heth)
7475
GPIO_InitStructure.Pin = GPIO_PIN_1 | GPIO_PIN_4 | GPIO_PIN_5;
7576
HAL_GPIO_Init(GPIOC, &GPIO_InitStructure);
7677

77-
/* Configure PG2, PG11 and PG13 */
78-
GPIO_InitStructure.Pin = GPIO_PIN_2 | GPIO_PIN_11 | GPIO_PIN_13;
78+
/* Configure PG11 and PG13 */
79+
GPIO_InitStructure.Pin = GPIO_PIN_11 | GPIO_PIN_13;
7980
HAL_GPIO_Init(GPIOG, &GPIO_InitStructure);
8081

8182
/* Enable the Ethernet global Interrupt */
@@ -103,15 +104,15 @@ void HAL_ETH_MspDeInit(ETH_HandleTypeDef *heth)
103104
RMII_MII_CRS_DV -------------------> PA7
104105
RMII_MII_RXD0 ---------------------> PC4
105106
RMII_MII_RXD1 ---------------------> PC5
106-
RMII_MII_RXER ---------------------> PG2
107+
RMII_MII_RXER ---------------------> none
107108
RMII_MII_TX_EN --------------------> PG11
108109
RMII_MII_TXD0 ---------------------> PG13
109110
RMII_MII_TXD1 ---------------------> PB13
110111
*/
111112
HAL_GPIO_DeInit(GPIOA, GPIO_PIN_1 | GPIO_PIN_2 | GPIO_PIN_7);
112113
HAL_GPIO_DeInit(GPIOB, GPIO_PIN_13);
113114
HAL_GPIO_DeInit(GPIOC, GPIO_PIN_1 | GPIO_PIN_4 | GPIO_PIN_5);
114-
HAL_GPIO_DeInit(GPIOG, GPIO_PIN_2 | GPIO_PIN_11 | GPIO_PIN_13);
115+
HAL_GPIO_DeInit(GPIOG, GPIO_PIN_11 | GPIO_PIN_13);
115116

116117
/* Disable the Ethernet global Interrupt */
117118
NVIC_DisableIRQ(ETH_IRQn);

‎connectivity/drivers/emac/TARGET_STM/TARGET_STM32F7/TARGET_DISCO_F746NG/stm32f7_eth_init.c

Lines changed: 6 additions & 5 deletions
Original file line numberDiff line numberDiff line change
@@ -1,6 +1,7 @@
11
/* mbed Microcontroller Library
22
* Copyright (c) 2022, STMicroelectronics
33
* All rights reserved.
4+
* SPDX-License-Identifier: BSD-3-Clause
45
*
56
* SPDX-License-Identifier: Apache-2.0
67
*
@@ -57,7 +58,7 @@ void HAL_ETH_MspInit(ETH_HandleTypeDef *heth)
5758
RMII_MII_CRS_DV -------------------> PA7
5859
RMII_MII_RXD0 ---------------------> PC4
5960
RMII_MII_RXD1 ---------------------> PC5
60-
RMII_MII_RXER ---------------------> PG2
61+
RMII_MII_RXER ---------------------> none
6162
RMII_MII_TX_EN --------------------> PG11
6263
RMII_MII_TXD0 ---------------------> PG13
6364
RMII_MII_TXD1 ---------------------> PG14
@@ -74,8 +75,8 @@ void HAL_ETH_MspInit(ETH_HandleTypeDef *heth)
7475
GPIO_InitStructure.Pin = GPIO_PIN_1 | GPIO_PIN_4 | GPIO_PIN_5;
7576
HAL_GPIO_Init(GPIOC, &GPIO_InitStructure);
7677

77-
/* Configure PG2, PG11, PG13 and PG14 */
78-
GPIO_InitStructure.Pin = GPIO_PIN_2 | GPIO_PIN_11 | GPIO_PIN_13 | GPIO_PIN_14;
78+
/* Configure PG11, PG13 and PG14 */
79+
GPIO_InitStructure.Pin = GPIO_PIN_11 | GPIO_PIN_13 | GPIO_PIN_14;
7980
HAL_GPIO_Init(GPIOG, &GPIO_InitStructure);
8081

8182
/* Enable the Ethernet global Interrupt */
@@ -103,14 +104,14 @@ void HAL_ETH_MspDeInit(ETH_HandleTypeDef *heth)
103104
RMII_MII_CRS_DV -------------------> PA7
104105
RMII_MII_RXD0 ---------------------> PC4
105106
RMII_MII_RXD1 ---------------------> PC5
106-
RMII_MII_RXER ---------------------> PG2
107+
RMII_MII_RXER ---------------------> none
107108
RMII_MII_TX_EN --------------------> PG11
108109
RMII_MII_TXD0 ---------------------> PG13
109110
RMII_MII_TXD1 ---------------------> PG14
110111
*/
111112
HAL_GPIO_DeInit(GPIOA, GPIO_PIN_1 | GPIO_PIN_2 | GPIO_PIN_7);
112113
HAL_GPIO_DeInit(GPIOC, GPIO_PIN_1 | GPIO_PIN_4 | GPIO_PIN_5);
113-
HAL_GPIO_DeInit(GPIOG, GPIO_PIN_2 | GPIO_PIN_11 | GPIO_PIN_13 | GPIO_PIN_14);
114+
HAL_GPIO_DeInit(GPIOG, GPIO_PIN_11 | GPIO_PIN_13 | GPIO_PIN_14);
114115

115116
/* Disable the Ethernet global Interrupt */
116117
NVIC_DisableIRQ(ETH_IRQn);

‎connectivity/drivers/emac/TARGET_STM/TARGET_STM32F7/TARGET_DISCO_F769NI/stm32f7_eth_init.c

Lines changed: 3 additions & 8 deletions
Original file line numberDiff line numberDiff line change
@@ -1,6 +1,7 @@
11
/* mbed Microcontroller Library
22
* Copyright (c) 2022, STMicroelectronics
33
* All rights reserved.
4+
* SPDX-License-Identifier: BSD-3-Clause
45
*
56
* SPDX-License-Identifier: Apache-2.0
67
*
@@ -48,7 +49,6 @@ void HAL_ETH_MspInit(ETH_HandleTypeDef *heth)
4849
/* Enable GPIOs clocks */
4950
__HAL_RCC_GPIOA_CLK_ENABLE();
5051
__HAL_RCC_GPIOC_CLK_ENABLE();
51-
__HAL_RCC_GPIOD_CLK_ENABLE();
5252
__HAL_RCC_GPIOG_CLK_ENABLE();
5353

5454
/** ETH GPIO Configuration
@@ -58,7 +58,7 @@ void HAL_ETH_MspInit(ETH_HandleTypeDef *heth)
5858
RMII_MII_CRS_DV -------------------> PA7
5959
RMII_MII_RXD0 ---------------------> PC4
6060
RMII_MII_RXD1 ---------------------> PC5
61-
RMII_MII_RXER ---------------------> PD5
61+
RMII_MII_RXER ---------------------> none
6262
RMII_MII_TX_EN --------------------> PG11
6363
RMII_MII_TXD0 ---------------------> PG13
6464
RMII_MII_TXD1 ---------------------> PG14
@@ -75,10 +75,6 @@ void HAL_ETH_MspInit(ETH_HandleTypeDef *heth)
7575
GPIO_InitStructure.Pin = GPIO_PIN_1 | GPIO_PIN_4 | GPIO_PIN_5;
7676
HAL_GPIO_Init(GPIOC, &GPIO_InitStructure);
7777

78-
/* Configure PD5 */
79-
GPIO_InitStructure.Pin = GPIO_PIN_5;
80-
HAL_GPIO_Init(GPIOD, &GPIO_InitStructure);
81-
8278
/* Configure PG11, PG13 and PG14 */
8379
GPIO_InitStructure.Pin = GPIO_PIN_11 | GPIO_PIN_13 | GPIO_PIN_14;
8480
HAL_GPIO_Init(GPIOG, &GPIO_InitStructure);
@@ -108,14 +104,13 @@ void HAL_ETH_MspDeInit(ETH_HandleTypeDef *heth)
108104
RMII_MII_CRS_DV -------------------> PA7
109105
RMII_MII_RXD0 ---------------------> PC4
110106
RMII_MII_RXD1 ---------------------> PC5
111-
RMII_MII_RXER ---------------------> PD5
107+
RMII_MII_RXER ---------------------> none
112108
RMII_MII_TX_EN --------------------> PG11
113109
RMII_MII_TXD0 ---------------------> PG13
114110
RMII_MII_TXD1 ---------------------> PG14
115111
*/
116112
HAL_GPIO_DeInit(GPIOA, GPIO_PIN_1 | GPIO_PIN_2 | GPIO_PIN_7);
117113
HAL_GPIO_DeInit(GPIOC, GPIO_PIN_1 | GPIO_PIN_4 | GPIO_PIN_5);
118-
HAL_GPIO_DeInit(GPIOD, GPIO_PIN_5);
119114
HAL_GPIO_DeInit(GPIOG, GPIO_PIN_11 | GPIO_PIN_13 | GPIO_PIN_14);
120115

121116
/* Disable the Ethernet global Interrupt */

‎connectivity/drivers/emac/TARGET_STM/TARGET_STM32F7/TARGET_NUCLEO_F746ZG/stm32f7_eth_init.c

Lines changed: 6 additions & 5 deletions
Original file line numberDiff line numberDiff line change
@@ -1,6 +1,7 @@
11
/* mbed Microcontroller Library
22
* Copyright (c) 2022, STMicroelectronics
33
* All rights reserved.
4+
* SPDX-License-Identifier: BSD-3-Clause
45
*
56
* SPDX-License-Identifier: Apache-2.0
67
*
@@ -58,7 +59,7 @@ void HAL_ETH_MspInit(ETH_HandleTypeDef *heth)
5859
RMII_MII_CRS_DV -------------------> PA7
5960
RMII_MII_RXD0 ---------------------> PC4
6061
RMII_MII_RXD1 ---------------------> PC5
61-
RMII_MII_RXER ---------------------> PG2
62+
RMII_MII_RXER ---------------------> none
6263
RMII_MII_TX_EN --------------------> PG11
6364
RMII_MII_TXD0 ---------------------> PG13
6465
RMII_MII_TXD1 ---------------------> PB13
@@ -79,8 +80,8 @@ void HAL_ETH_MspInit(ETH_HandleTypeDef *heth)
7980
GPIO_InitStructure.Pin = GPIO_PIN_1 | GPIO_PIN_4 | GPIO_PIN_5;
8081
HAL_GPIO_Init(GPIOC, &GPIO_InitStructure);
8182

82-
/* Configure PG2, PG11 and PG13 */
83-
GPIO_InitStructure.Pin = GPIO_PIN_2 | GPIO_PIN_11 | GPIO_PIN_13;
83+
/* Configure PG11 and PG13 */
84+
GPIO_InitStructure.Pin = GPIO_PIN_11 | GPIO_PIN_13;
8485
HAL_GPIO_Init(GPIOG, &GPIO_InitStructure);
8586

8687
/* Enable the Ethernet global Interrupt */
@@ -108,15 +109,15 @@ void HAL_ETH_MspDeInit(ETH_HandleTypeDef *heth)
108109
RMII_MII_CRS_DV -------------------> PA7
109110
RMII_MII_RXD0 ---------------------> PC4
110111
RMII_MII_RXD1 ---------------------> PC5
111-
RMII_MII_RXER ---------------------> PG2
112+
RMII_MII_RXER ---------------------> none
112113
RMII_MII_TX_EN --------------------> PG11
113114
RMII_MII_TXD0 ---------------------> PG13
114115
RMII_MII_TXD1 ---------------------> PB13
115116
*/
116117
HAL_GPIO_DeInit(GPIOA, GPIO_PIN_1 | GPIO_PIN_2 | GPIO_PIN_7);
117118
HAL_GPIO_DeInit(GPIOB, GPIO_PIN_13);
118119
HAL_GPIO_DeInit(GPIOC, GPIO_PIN_1 | GPIO_PIN_4 | GPIO_PIN_5);
119-
HAL_GPIO_DeInit(GPIOG, GPIO_PIN_2 | GPIO_PIN_11 | GPIO_PIN_13);
120+
HAL_GPIO_DeInit(GPIOG, GPIO_PIN_11 | GPIO_PIN_13);
120121

121122
/* Disable the Ethernet global Interrupt */
122123
NVIC_DisableIRQ(ETH_IRQn);

‎connectivity/drivers/emac/TARGET_STM/TARGET_STM32F7/TARGET_NUCLEO_F756ZG/stm32f7_eth_init.c

Lines changed: 6 additions & 5 deletions
Original file line numberDiff line numberDiff line change
@@ -1,6 +1,7 @@
11
/* mbed Microcontroller Library
22
* Copyright (c) 2022, STMicroelectronics
33
* All rights reserved.
4+
* SPDX-License-Identifier: BSD-3-Clause
45
*
56
* SPDX-License-Identifier: Apache-2.0
67
*
@@ -58,7 +59,7 @@ void HAL_ETH_MspInit(ETH_HandleTypeDef *heth)
5859
RMII_MII_CRS_DV -------------------> PA7
5960
RMII_MII_RXD0 ---------------------> PC4
6061
RMII_MII_RXD1 ---------------------> PC5
61-
RMII_MII_RXER ---------------------> PG2
62+
RMII_MII_RXER ---------------------> none
6263
RMII_MII_TX_EN --------------------> PG11
6364
RMII_MII_TXD0 ---------------------> PG13
6465
RMII_MII_TXD1 ---------------------> PB13
@@ -79,8 +80,8 @@ void HAL_ETH_MspInit(ETH_HandleTypeDef *heth)
7980
GPIO_InitStructure.Pin = GPIO_PIN_1 | GPIO_PIN_4 | GPIO_PIN_5;
8081
HAL_GPIO_Init(GPIOC, &GPIO_InitStructure);
8182

82-
/* Configure PG2, PG11 and PG13 */
83-
GPIO_InitStructure.Pin = GPIO_PIN_2 | GPIO_PIN_11 | GPIO_PIN_13;
83+
/* Configure PG11 and PG13 */
84+
GPIO_InitStructure.Pin = GPIO_PIN_11 | GPIO_PIN_13;
8485
HAL_GPIO_Init(GPIOG, &GPIO_InitStructure);
8586

8687
/* Enable the Ethernet global Interrupt */
@@ -108,15 +109,15 @@ void HAL_ETH_MspDeInit(ETH_HandleTypeDef *heth)
108109
RMII_MII_CRS_DV -------------------> PA7
109110
RMII_MII_RXD0 ---------------------> PC4
110111
RMII_MII_RXD1 ---------------------> PC5
111-
RMII_MII_RXER ---------------------> PG2
112+
RMII_MII_RXER ---------------------> none
112113
RMII_MII_TX_EN --------------------> PG11
113114
RMII_MII_TXD0 ---------------------> PG13
114115
RMII_MII_TXD1 ---------------------> PB13
115116
*/
116117
HAL_GPIO_DeInit(GPIOA, GPIO_PIN_1 | GPIO_PIN_2 | GPIO_PIN_7);
117118
HAL_GPIO_DeInit(GPIOB, GPIO_PIN_13);
118119
HAL_GPIO_DeInit(GPIOC, GPIO_PIN_1 | GPIO_PIN_4 | GPIO_PIN_5);
119-
HAL_GPIO_DeInit(GPIOG, GPIO_PIN_2 | GPIO_PIN_11 | GPIO_PIN_13);
120+
HAL_GPIO_DeInit(GPIOG, GPIO_PIN_11 | GPIO_PIN_13);
120121

121122
/* Disable the Ethernet global Interrupt */
122123
NVIC_DisableIRQ(ETH_IRQn);

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