Adding NUCLEO-U545RE-Q and NUCLEO-U5A5ZJ-Q support, with some changes to stm_dma_utils (ARMmbed#273)

* added an option "QSPI_OSPIM_IOPORT_HIGH=1" to allow using the high IO ports (IO 4~7) of an OSPI peripheral to drive a QSPI device
updated STM32U5 firmware package to support STM32U5F/G devices
STM DMA Utils: added stm_get_dma_instance, stm_set_dma_link, stm_get_dma_link for working with DMA code in external libraries

* added NUCLEO-U545RE-Q and NUCLEO-U5A5ZJ-Q
USB is not supported yet

* added missing USART6 handlers for STM32U5

* changed PA_2_ALT0/PA_3_ALT0 in UART pinmap back to PA_2/PA_3 for NUCLEO-U545RE-Q

* renamed stm_get_dma_link to stm_get_dma_handle_for_link
renamed stm_set_dma_link to stm_set_dma_handle_for_link
added option "qspi_ospim_ioport_high" for MCU_STM32U5
implemented SetSysClock_PLL_HSI for NUCLEO-U545RE-Q and NUCLEO-U5A5ZJ-Q
made PLL_HSI the default clock source for NUCLEO-U545RE-Q and NUCLEO-U5A5ZJ-Q

* changed clock sources of NUCLEO-U545RE-Q and NUCLEO-U5A5ZJ-Q back to PLL+MSI
embedded LICENSE file into every source file in the STM32U5 firmware package

Author: wdx04

targets/TARGET_STM/TARGET_STM32U5/CMakeLists.txt

@@ -1,9 +1,11 @@
 # Copyright (c) 2020 ARM Limited. All rights reserved.
 # SPDX-License-Identifier: Apache-2.0
 
+add_subdirectory(TARGET_STM32U545xE EXCLUDE_FROM_ALL)
 add_subdirectory(TARGET_STM32U575xG EXCLUDE_FROM_ALL)
 add_subdirectory(TARGET_STM32U575xI EXCLUDE_FROM_ALL)
 add_subdirectory(TARGET_STM32U585xI EXCLUDE_FROM_ALL)
+add_subdirectory(TARGET_STM32U5A5xJ EXCLUDE_FROM_ALL)
 
 add_subdirectory(STM32Cube_FW EXCLUDE_FROM_ALL)
 

targets/TARGET_STM/TARGET_STM32U5/PeripheralNames.h

@@ -33,10 +33,15 @@ typedef enum {
 
 typedef enum {
     UART_1 = (int)USART1_BASE,
+#if defined(USART2_BASE)
     UART_2 = (int)USART2_BASE,
+#endif
     UART_3 = (int)USART3_BASE,
     UART_4 = (int)UART4_BASE,
     UART_5 = (int)UART5_BASE,
+#if defined(USART6_BASE)
+    UART_6 = (int)USART6_BASE,
+#endif
     LPUART_1 = (int)LPUART1_BASE
 } UARTName;
 
@@ -50,7 +55,13 @@ typedef enum {
     I2C_1 = (int)I2C1_BASE,
     I2C_2 = (int)I2C2_BASE,
     I2C_3 = (int)I2C3_BASE,
-    I2C_4 = (int)I2C4_BASE
+    I2C_4 = (int)I2C4_BASE,
+#ifdef I2C5_BASE
+    I2C_5 = (int)I2C5_BASE,
+#endif
+#ifdef I2C6_BASE
+    I2C_6 = (int)I2C6_BASE
+#endif
 } I2CName;
 
 typedef enum {
@@ -71,17 +82,28 @@ typedef enum {
 
 typedef enum {
     QSPI_1 = (int)OCTOSPI1_R_BASE,
-	QSPI_2 = (int)OCTOSPI2_R_BASE
+#if defined(OCTOSPI2_R_BASE)
+    QSPI_2 = (int)OCTOSPI2_R_BASE
+#endif
 } QSPIName;
 
 typedef enum {
     OSPI_1 = (int)OCTOSPI1_R_BASE,
-    OSPI_2 = (int)OCTOSPI2_R_BASE	
+#if defined(OCTOSPI2_R_BASE)
+    OSPI_2 = (int)OCTOSPI2_R_BASE
+#endif	
 } OSPIName;
 
+#if defined(USB_OTG_FS_BASE) || defined(USB_DRD_BASE)
 typedef enum {
+#if defined(USB_OTG_FS_BASE)
     USB_FS = (int)USB_OTG_FS_BASE
+#endif
+#if defined(USB_DRD_BASE)
+    USB_FS = (int)USB_DRD_BASE
+#endif
 } USBName;
+#endif
 
 #ifdef __cplusplus
 }

targets/TARGET_STM/TARGET_STM32U5/STM32Cube_FW/CMSIS/LICENSE.txt

@@ -13,12 +13,12 @@
   ******************************************************************************
   * @attention
   *
-  * Copyright (c) 2021 STMicroelectronics.
-  * All rights reserved.
-  *
-  * This software is licensed under terms that can be found in the LICENSE file
-  * in the root directory of this software component.
-  * If no LICENSE file comes with this software, it is provided AS-IS.
+  * This software component is provided to you as part of a software package and
+  * applicable license terms are in the  Package_license file. If you received this
+  * software component outside of a package or without applicable license terms,
+  * the terms of the Apache-2.0 license shall apply. 
+  * You may obtain a copy of the Apache-2.0 at:
+  * https://opensource.org/licenses/Apache-2.0
   *
   ******************************************************************************
   */
@@ -54,6 +54,14 @@
   #include "partition_stm32u599xx.h"
 #elif defined(STM32U5A9xx)
   #include "partition_stm32u5a9xx.h"
+#elif defined(STM32U5F7xx)
+  #include "partition_stm32u5f7xx.h"
+#elif defined(STM32U5G7xx)
+  #include "partition_stm32u5g7xx.h"
+#elif defined(STM32U5F9xx)
+  #include "partition_stm32u5f9xx.h"
+#elif defined(STM32U5G9xx)
+  #include "partition_stm32u5g9xx.h"
 #elif defined(STM32U535xx)
   #include "partition_stm32u535xx.h"
 #elif defined(STM32U545xx)

targets/TARGET_STM/TARGET_STM32U5/STM32Cube_FW/CMSIS/partition_stm32u5xx.h

@@ -16,12 +16,12 @@
   ******************************************************************************
   * @attention
   *
-  * Copyright (c) 2021 STMicroelectronics.
-  * All rights reserved.
-  *
-  * This software is licensed under terms that can be found in the LICENSE file
-  * in the root directory of this software component.
-  * If no LICENSE file comes with this software, it is provided AS-IS.
+  * This software component is provided to you as part of a software package and
+  * applicable license terms are in the  Package_license file. If you received this
+  * software component outside of a package or without applicable license terms,
+  * the terms of the Apache-2.0 license shall apply. 
+  * You may obtain a copy of the Apache-2.0 at:
+  * https://opensource.org/licenses/Apache-2.0
   *
   ******************************************************************************
   */
@@ -59,15 +59,21 @@
 #if !defined (STM32U575xx)  && !defined (STM32U585xx) \
     && !defined (STM32U595xx)  && !defined (STM32U599xx) \
     && !defined (STM32U5A5xx)  && !defined (STM32U5A9xx) \
+    && !defined (STM32U5F7xx)  && !defined (STM32U5G7xx) \
+    && !defined (STM32U5F9xx)  && !defined (STM32U5G9xx) \
     && !defined (STM32U535xx)  && !defined (STM32U545xx) \
   /* #define STM32U575xx */   /*!< STM32U575CIU6 STM32U575CIT6 STM32U575RIT6 STM32U575VIT6 STM32U575ZIT6 STM32U575QII6 STM32U575AII6 STM32U575CIU6Q STM32U575CIT6Q STM32U575OIY6Q STM32U575VIT6Q STM32U575QII6Q STM32U575ZIT6Q STM32U575RIT6Q STM32U575CGU6 STM32U575CGT6 STM32U575RGT6 STM32U575VGT6 STM32U575ZGT6 STM32U575QGI6 STM32U575AGI6 STM32U575CGU6Q STM32U575CGT6Q STM32U575OGY6Q STM32U575VGT6Q STM32U575QGI6Q STM32U575ZGT6Q STM32U575RGT6Q STM32U575AGI6Q Devices  */
   /* #define STM32U585xx */   /*!< STM32U585CIU6 STM32U585CIT6 STM32U585RIT6 STM32U585VIT6 STM32U585AII6 STM32U585QII6 STM32U585ZIT6 STM32U585OIY6Q STM32U585VIT6Q STM32U585QEI6Q STM32U585RIT6Q STM32U585AII6Q STM32U585CIU6Q STM32U585CIT6Q STM32U585ZET6Q Devices  */
-  /* #define STM32U595xx */   /*!< STM32U595ZJT6Q Device */
-  /* #define STM32U599xx */   /*!< STM32U599NJH6Q STM32U599BJY6Q STM32U599NIH6Q Devices */
-  /* #define STM32U5A5xx */   /*!< STM32U5A5ZJT6Q Device */
-  /* #define STM32U5A9xx */   /*!< STM32U5A9NJH6Q STM32U5A9BJY6Q Devices */
-  /* #define STM32U535xx */   /*!< STM32U535CET6 STM32U535CEU6 STM32U535RET6 STM32U535REI6 STM32U535VET6 STM32U535VEI6 STM32U535CET6Q STM32U535CEU6Q STM32U535RET6Q STM32U535REI6Q STM32U535VET6Q STM32U535VEI6Q STM32U535NEY6Q STM32U535JEY6Q Device */
-  /* #define STM32U545xx */   /*!< STM32U545CET6 STM32U545CEU6 STM32U545RET6 STM32U545REI6 STM32U545VET6 STM32U545VEI6 STM32U545CET6Q STM32U545CEU6Q STM32U545RET6Q STM32U545REI6Q STM32U545VET6Q STM32U545VEI6Q STM32U545NEY6Q STM32U545JEY6Q Device */
+  /* #define STM32U595xx */   /*!< STM32U595AJH6 STM32U595ZJT6 STM32U595QJI6 STM32U595VJT6 STM32U595RJT6  STM32U595AJH6Q  STM32U595ZJY6QTR  STM32U595ZJT6Q  STM32U595QJI6Q  STM32U595VJT6Q  STM32U595RJT6Q STM32U595AIH6 STM32U595ZIT6 STM32U595QII6 STM32U595VIT6 STM32U595RIT6  STM32U595AIH6Q STM32U595ZIY6QTR STM32U595ZIT6Q STM32U595QII6Q STM32U595VIT6Q STM32U595RIT6Q Devices */
+  /* #define STM32U599xx */   /*!< STM32U599VJT6 STM32U599NJH6Q  STM32U599BJY6QTR  STM32U599ZJY6QTR STM32U599ZJT6Q   STM32U599VJT6Q STM32U599NIH6Q  STM32U599ZIY6QTR STM32U599ZIT6Q STM32U599VIT6Q Devices */
+  /* #define STM32U5A5xx */   /*!< STM32U5A5AJH6 STM32U5A5ZJT6 STM32U5A5QJI6 STM32U5A5VJT6 STM32U5A5RJT6 STM32U5A5AJH6Q STM32U5A5ZJY6QTR STM32U5A5ZJT6Q STM32U5A5QJI6Q STM32U5A5VJT6Q STM32U5A5RJT6Q STM32U5A5QII3Q Devices */
+  /* #define STM32U5A9xx */   /*!< STM32U5A9NJH6Q STM32U5A9BJY6QTR STM32U5A9ZJY6QTR STM32U5A9ZJT6Q STM32U5A9VJT6Q Devices */
+  /* #define STM32U5F7xx */   /*!< STM32U5F7VJT6Q STM32U5F7VJT6 STM32U5F7VIT6Q STM32U5F7VIT6 Devices */
+  /* #define STM32U5G7xx */   /*!< STM32U5G7VJT6Q STM32U5G7VJT6 Devices */
+  /* #define STM32U5F9xx */   /*!< STM32U5F9NJH6Q STM32U5F9BJY6QTR STM32U5F9ZJJ6QTR STM32U5F9ZJT6Q STM32U5F9VJT6Q STM32U5F9ZIJ6QTR STM32U5F9ZIT6Q STM32U5F9VIT6Q Devices */
+  /* #define STM32U5G9xx */   /*!< STM32U5G9NJH6Q STM32U5G9BJY6QTR STM32U5G9ZJJ6QTR STM32U5G9ZJT6Q STM32U5G9VJT6Q Devices */
+  /* #define STM32U535xx */   /*!< STM32U535CET6 STM32U535CEU6 STM32U535RET6 STM32U535REI6 STM32U535VET6 STM32U535VEI6 STM32U535CET6Q STM32U535CEU6Q STM32U535RET6Q STM32U535REI6Q STM32U535VET6Q STM32U535VEI6Q STM32U535NEY6Q STM32U535JEY6Q Devices */
+  /* #define STM32U545xx */   /*!< STM32U545CET6 STM32U545CEU6 STM32U545RET6 STM32U545REI6 STM32U545VET6 STM32U545VEI6 STM32U545CET6Q STM32U545CEU6Q STM32U545RET6Q STM32U545REI6Q STM32U545VET6Q STM32U545VEI6Q STM32U545NEY6Q STM32U545JEY6Q Devices */
 #endif
 
 /*  Tip: To avoid modifying this file each time you need to switch between these
@@ -83,12 +89,12 @@
 #endif /* USE_HAL_DRIVER */
 
 /**
-  * @brief CMSIS Device version number 1.2.0
+  * @brief CMSIS Device version number 1.4.0
   */
-#define __STM32U5_CMSIS_VERSION_MAIN   (0x01U) /*!< [31:24] main version */
-#define __STM32U5_CMSIS_VERSION_SUB1   (0x02U) /*!< [23:16] sub1 version */
-#define __STM32U5_CMSIS_VERSION_SUB2   (0x00U) /*!< [15:8]  sub2 version */
-#define __STM32U5_CMSIS_VERSION_RC     (0x00U) /*!< [7:0]  release candidate */
+#define __STM32U5_CMSIS_VERSION_MAIN   (0x01) /*!< [31:24] main version */
+#define __STM32U5_CMSIS_VERSION_SUB1   (0x04) /*!< [23:16] sub1 version */
+#define __STM32U5_CMSIS_VERSION_SUB2   (0x00) /*!< [15:8]  sub2 version */
+#define __STM32U5_CMSIS_VERSION_RC     (0x00) /*!< [7:0]  release candidate */
 #define __STM32U5_CMSIS_VERSION        ((__STM32U5_CMSIS_VERSION_MAIN << 24U)\
                                        |(__STM32U5_CMSIS_VERSION_SUB1 << 16U)\
                                        |(__STM32U5_CMSIS_VERSION_SUB2 << 8U )\
@@ -114,6 +120,14 @@
   #include "stm32u5a5xx.h"
 #elif defined(STM32U5A9xx)
   #include "stm32u5a9xx.h"
+#elif defined(STM32U5F9xx)
+  #include "stm32u5f9xx.h"
+#elif defined(STM32U5G9xx)
+  #include "stm32u5g9xx.h"
+#elif defined(STM32U5F7xx)
+  #include "stm32u5f7xx.h"
+#elif defined(STM32U5G7xx)
+  #include "stm32u5g7xx.h"
 #elif defined(STM32U535xx)
   #include "stm32u535xx.h"
 #elif defined(STM32U545xx)

targets/TARGET_STM/TARGET_STM32U5/STM32Cube_FW/CMSIS/stm32u535xx.h

@@ -6,12 +6,12 @@
   ******************************************************************************
   * @attention
   *
-  * Copyright (c) 2021 STMicroelectronics.
-  * All rights reserved.
-  *
-  * This software is licensed under terms that can be found in the LICENSE file
-  * in the root directory of this software component.
-  * If no LICENSE file comes with this software, it is provided AS-IS.
+  * This software component is provided to you as part of a software package and
+  * applicable license terms are in the  Package_license file. If you received this
+  * software component outside of a package or without applicable license terms,
+  * the terms of the Apache-2.0 license shall apply. 
+  * You may obtain a copy of the Apache-2.0 at:
+  * https://opensource.org/licenses/Apache-2.0
   *
   ******************************************************************************
   */