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[AArch64][GlobalISel] Implement G_ICMP support for oversize pointer vectors.
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2 files changed

+70
-2
lines changed

2 files changed

+70
-2
lines changed

llvm/lib/Target/AArch64/GISel/AArch64LegalizerInfo.cpp

Lines changed: 5 additions & 2 deletions
Original file line numberDiff line numberDiff line change
@@ -563,13 +563,16 @@ AArch64LegalizerInfo::AArch64LegalizerInfo(const AArch64Subtarget &ST)
563563
[=](const LegalityQuery &Query) { return Query.Types[1] == v2s16; },
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1, s32)
565565
.minScalarOrEltIf(
566-
[=](const LegalityQuery &Query) { return Query.Types[1] == v2p0; }, 0,
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s64)
566+
[=](const LegalityQuery &Query) {
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return Query.Types[1].isPointerVector();
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},
569+
0, s64)
568570
.moreElementsToNextPow2(1)
569571
.clampNumElements(1, v8s8, v16s8)
570572
.clampNumElements(1, v4s16, v8s16)
571573
.clampNumElements(1, v2s32, v4s32)
572574
.clampNumElements(1, v2s64, v2s64)
575+
.clampNumElements(1, v2p0, v2p0)
573576
.customIf(isVector(0));
574577

575578
getActionDefinitionsBuilder(G_FCMP)

llvm/test/CodeGen/AArch64/GlobalISel/legalize-cmp.mir

Lines changed: 65 additions & 0 deletions
Original file line numberDiff line numberDiff line change
@@ -541,3 +541,68 @@ body: |
541541
%zext:_(s32) = G_ZEXT %2(s8)
542542
$w0 = COPY %zext(s32)
543543
RET_ReallyLR
544+
...
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---
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name: test_4xs64_ne
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tracksRegLiveness: true
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body: |
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bb.1:
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liveins:
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; CHECK-LABEL: name: test_4xs64_ne
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; CHECK: [[DEF:%[0-9]+]]:_(<2 x s64>) = G_IMPLICIT_DEF
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; CHECK-NEXT: [[ICMP:%[0-9]+]]:_(<2 x s64>) = G_ICMP intpred(eq), [[DEF]](<2 x s64>), [[DEF]]
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; CHECK-NEXT: [[C:%[0-9]+]]:_(s64) = G_CONSTANT i64 -1
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; CHECK-NEXT: [[BUILD_VECTOR:%[0-9]+]]:_(<2 x s64>) = G_BUILD_VECTOR [[C]](s64), [[C]](s64)
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; CHECK-NEXT: [[XOR:%[0-9]+]]:_(<2 x s64>) = G_XOR [[ICMP]], [[BUILD_VECTOR]]
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; CHECK-NEXT: [[ICMP1:%[0-9]+]]:_(<2 x s64>) = G_ICMP intpred(eq), [[DEF]](<2 x s64>), [[DEF]]
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; CHECK-NEXT: [[BUILD_VECTOR1:%[0-9]+]]:_(<2 x s64>) = G_BUILD_VECTOR [[C]](s64), [[C]](s64)
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; CHECK-NEXT: [[XOR1:%[0-9]+]]:_(<2 x s64>) = G_XOR [[ICMP1]], [[BUILD_VECTOR1]]
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; CHECK-NEXT: [[C1:%[0-9]+]]:_(s64) = G_CONSTANT i64 1
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; CHECK-NEXT: [[TRUNC:%[0-9]+]]:_(<2 x s32>) = G_TRUNC [[XOR]](<2 x s64>)
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; CHECK-NEXT: [[TRUNC1:%[0-9]+]]:_(<2 x s32>) = G_TRUNC [[XOR1]](<2 x s64>)
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; CHECK-NEXT: [[CONCAT_VECTORS:%[0-9]+]]:_(<4 x s32>) = G_CONCAT_VECTORS [[TRUNC]](<2 x s32>), [[TRUNC1]](<2 x s32>)
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; CHECK-NEXT: [[EVEC:%[0-9]+]]:_(s32) = G_EXTRACT_VECTOR_ELT [[CONCAT_VECTORS]](<4 x s32>), [[C1]](s64)
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; CHECK-NEXT: [[C2:%[0-9]+]]:_(s32) = G_CONSTANT i32 1
566+
; CHECK-NEXT: %zext:_(s32) = G_AND [[EVEC]], [[C2]]
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; CHECK-NEXT: $w0 = COPY %zext(s32)
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; CHECK-NEXT: RET_ReallyLR
569+
%vec:_(<4 x s64>) = G_IMPLICIT_DEF
570+
%cmp:_(<4 x s1>) = G_ICMP intpred(ne), %vec(<4 x s64>), %vec
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%1:_(s64) = G_CONSTANT i64 1
572+
%elt:_(s1) = G_EXTRACT_VECTOR_ELT %cmp(<4 x s1>), %1
573+
%zext:_(s32) = G_ZEXT %elt(s1)
574+
$w0 = COPY %zext(s32)
575+
RET_ReallyLR
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...
577+
---
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name: test_4xp0_ne
579+
tracksRegLiveness: true
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body: |
581+
bb.1:
582+
liveins:
583+
; CHECK-LABEL: name: test_4xp0_ne
584+
; CHECK: [[DEF:%[0-9]+]]:_(<2 x p0>) = G_IMPLICIT_DEF
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; CHECK-NEXT: [[ICMP:%[0-9]+]]:_(<2 x s64>) = G_ICMP intpred(eq), [[DEF]](<2 x p0>), [[DEF]]
586+
; CHECK-NEXT: [[C:%[0-9]+]]:_(s64) = G_CONSTANT i64 -1
587+
; CHECK-NEXT: [[BUILD_VECTOR:%[0-9]+]]:_(<2 x s64>) = G_BUILD_VECTOR [[C]](s64), [[C]](s64)
588+
; CHECK-NEXT: [[XOR:%[0-9]+]]:_(<2 x s64>) = G_XOR [[ICMP]], [[BUILD_VECTOR]]
589+
; CHECK-NEXT: [[ICMP1:%[0-9]+]]:_(<2 x s64>) = G_ICMP intpred(eq), [[DEF]](<2 x p0>), [[DEF]]
590+
; CHECK-NEXT: [[BUILD_VECTOR1:%[0-9]+]]:_(<2 x s64>) = G_BUILD_VECTOR [[C]](s64), [[C]](s64)
591+
; CHECK-NEXT: [[XOR1:%[0-9]+]]:_(<2 x s64>) = G_XOR [[ICMP1]], [[BUILD_VECTOR1]]
592+
; CHECK-NEXT: [[C1:%[0-9]+]]:_(s64) = G_CONSTANT i64 1
593+
; CHECK-NEXT: [[TRUNC:%[0-9]+]]:_(<2 x s32>) = G_TRUNC [[XOR]](<2 x s64>)
594+
; CHECK-NEXT: [[TRUNC1:%[0-9]+]]:_(<2 x s32>) = G_TRUNC [[XOR1]](<2 x s64>)
595+
; CHECK-NEXT: [[CONCAT_VECTORS:%[0-9]+]]:_(<4 x s32>) = G_CONCAT_VECTORS [[TRUNC]](<2 x s32>), [[TRUNC1]](<2 x s32>)
596+
; CHECK-NEXT: [[EVEC:%[0-9]+]]:_(s32) = G_EXTRACT_VECTOR_ELT [[CONCAT_VECTORS]](<4 x s32>), [[C1]](s64)
597+
; CHECK-NEXT: [[C2:%[0-9]+]]:_(s32) = G_CONSTANT i32 1
598+
; CHECK-NEXT: %zext:_(s32) = G_AND [[EVEC]], [[C2]]
599+
; CHECK-NEXT: $w0 = COPY %zext(s32)
600+
; CHECK-NEXT: RET_ReallyLR
601+
%vec:_(<4 x p0>) = G_IMPLICIT_DEF
602+
%cmp:_(<4 x s1>) = G_ICMP intpred(ne), %vec(<4 x p0>), %vec
603+
%1:_(s64) = G_CONSTANT i64 1
604+
%elt:_(s1) = G_EXTRACT_VECTOR_ELT %cmp(<4 x s1>), %1
605+
%zext:_(s32) = G_ZEXT %elt(s1)
606+
$w0 = COPY %zext(s32)
607+
RET_ReallyLR
608+
...

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