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iclsrc
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Merge from 'sycl' to 'sycl-web' (#32)
2 parents 151a0bb + d43b92a commit 067fb37

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‎CONTRIBUTING.md

Lines changed: 8 additions & 0 deletions
Original file line numberDiff line numberDiff line change
@@ -62,6 +62,14 @@ see [ABI Policy Guide](sycl/doc/ABIPolicyGuide.md) for more information.
6262
- For any DPC++-related commit, the `[SYCL]` tag should be present in the
6363
commit message title. To a reasonable extent, additional tags can be used
6464
to signify the component changed, e.g.: `[PI]`, `[CUDA]`, `[Doc]`.
65+
- For product changes which require modification in tests outside of the current repository
66+
(see [Test DPC++ toolchain](sycl/doc/GetStartedGuide.md#test-dpc-toolchain)),
67+
the commit message should contain the link to corresponding test PR, e.g.: E2E
68+
test changes are available under intel/llvm-test-suite#88 or SYCL
69+
conformance test changes are available under KhronosGroup/SYCL-CTS#65 (see
70+
[Autolinked references and URLs](https://docs.github.com/en/free-pro-team/github/writing-on-github/autolinked-references-and-urls)
71+
for more details). The same message should be present both in commit
72+
message and in PR description.
6573

6674
### Review and acceptance testing
6775

‎buildbot/check.py

Lines changed: 1 addition & 1 deletion
Original file line numberDiff line numberDiff line change
@@ -49,7 +49,7 @@ def main():
4949
parser.add_argument("-d", "--base-branch", metavar="BASE_BRANCH", help="pull request base branch")
5050
parser.add_argument("-r", "--pr-number", metavar="PR_NUM", help="pull request number")
5151
parser.add_argument("-w", "--builder-dir", metavar="BUILDER_DIR",
52-
help="builder directory, which is the directory contains source and build directories")
52+
help="builder directory, which is the directory containing source and build directories")
5353
parser.add_argument("-s", "--src-dir", metavar="SRC_DIR", help="source directory")
5454
parser.add_argument("-o", "--obj-dir", metavar="OBJ_DIR", help="build directory")
5555
parser.add_argument("-t", "--test-suite", metavar="TEST_SUITE", default="check-all", help="check-xxx target")

‎buildbot/clang_tidy.py

Lines changed: 1 addition & 1 deletion
Original file line numberDiff line numberDiff line change
@@ -51,7 +51,7 @@ def main():
5151
help="pull request base branch")
5252
parser.add_argument("-r", "--pr-number", metavar="PR_NUM", help="pull request number")
5353
parser.add_argument("-w", "--builder-dir", metavar="BUILDER_DIR", required=True,
54-
help="builder directory, which is the directory contains source and build directories")
54+
help="builder directory, which is the directory containing source and build directories")
5555
parser.add_argument("-s", "--src-dir", metavar="SRC_DIR", required=True, help="source directory")
5656
parser.add_argument("-o", "--obj-dir", metavar="OBJ_DIR", required=True, help="build directory")
5757

‎buildbot/compile.py

Lines changed: 1 addition & 1 deletion
Original file line numberDiff line numberDiff line change
@@ -51,7 +51,7 @@ def main():
5151
parser.add_argument("-d", "--base-branch", metavar="BASE_BRANCH", help="pull request base branch")
5252
parser.add_argument("-r", "--pr-number", metavar="PR_NUM", help="pull request number")
5353
parser.add_argument("-w", "--builder-dir", metavar="BUILDER_DIR",
54-
help="builder directory, which is the directory contains source and build directories")
54+
help="builder directory, which is the directory containing source and build directories")
5555
parser.add_argument("-s", "--src-dir", metavar="SRC_DIR", help="source directory")
5656
parser.add_argument("-o", "--obj-dir", metavar="OBJ_DIR", help="build directory")
5757
parser.add_argument("-j", "--build-parallelism", metavar="BUILD_PARALLELISM", help="build parallelism")

‎buildbot/configure.py

Lines changed: 1 addition & 1 deletion
Original file line numberDiff line numberDiff line change
@@ -123,7 +123,7 @@ def main():
123123
parser.add_argument("-d", "--base-branch", metavar="BASE_BRANCH", help="pull request base branch")
124124
parser.add_argument("-r", "--pr-number", metavar="PR_NUM", help="pull request number")
125125
parser.add_argument("-w", "--builder-dir", metavar="BUILDER_DIR",
126-
help="builder directory, which is the directory contains source and build directories")
126+
help="builder directory, which is the directory containing source and build directories")
127127
# User options
128128
parser.add_argument("-s", "--src-dir", metavar="SRC_DIR", help="source directory (autodetected by default)")
129129
parser.add_argument("-o", "--obj-dir", metavar="OBJ_DIR", help="build directory. (<src>/build by default)")

‎buildbot/dependency.conf

Lines changed: 3 additions & 3 deletions
Original file line numberDiff line numberDiff line change
@@ -4,8 +4,8 @@ ocl_cpu_rt_ver=2020.11.11.0.04
44
# https://github.com/intel/llvm/releases/download/2020-WW45/win-oclcpuexp-2020.11.11.0.04_rel.zip
55
ocl_cpu_rt_ver_win=2020.11.11.0.04
66
# Same GPU driver supports Level Zero and OpenCL
7-
# https://github.com/intel/compute-runtime/releases/tag/20.52.18783
8-
ocl_gpu_rt_ver=20.52.18783
7+
# https://github.com/intel/compute-runtime/releases/tag/21.01.18793
8+
ocl_gpu_rt_ver=21.01.18793
99
# Same GPU driver supports Level Zero and OpenCL
1010
# https://downloadmirror.intel.com/30066/a08/igfx_win10_100.9030.zip
1111
ocl_gpu_rt_ver_win=27.20.100.9030
@@ -26,7 +26,7 @@ ocloc_ver_win=27.20.100.8935
2626
[DRIVER VERSIONS]
2727
cpu_driver_lin=2020.11.11.0.04
2828
cpu_driver_win=2020.11.11.0.04
29-
gpu_driver_lin=20.52.18783
29+
gpu_driver_lin=21.01.18793
3030
gpu_driver_win=27.20.100.9030
3131
fpga_driver_lin=2020.11.11.0.04
3232
fpga_driver_win=2020.11.11.0.04

‎buildbot/dependency.py

Lines changed: 1 addition & 1 deletion
Original file line numberDiff line numberDiff line change
@@ -97,7 +97,7 @@ def main():
9797
parser.add_argument("-d", "--base-branch", metavar="BASE_BRANCH", help="pull request base branch")
9898
parser.add_argument("-r", "--pr-number", metavar="PR_NUM", help="pull request number")
9999
parser.add_argument("-w", "--builder-dir", metavar="BUILDER_DIR",
100-
help="builder directory, which is the directory contains source and build directories")
100+
help="builder directory, which is the directory containing source and build directories")
101101
parser.add_argument("-s", "--src-dir", metavar="SRC_DIR", help="source directory")
102102
parser.add_argument("-o", "--obj-dir", metavar="OBJ_DIR", required=True, help="build directory")
103103
parser.add_argument("-c", "--clean-build", action="store_true", default=False,

‎clang-tools-extra/clang-tidy/altera/SingleWorkItemBarrierCheck.cpp

Lines changed: 3 additions & 2 deletions
Original file line numberDiff line numberDiff line change
@@ -57,8 +57,9 @@ void SingleWorkItemBarrierCheck::check(const MatchFinder::MatchResult &Result) {
5757
bool IsNDRange = false;
5858
if (MatchedDecl->hasAttr<ReqdWorkGroupSizeAttr>()) {
5959
const auto *Attribute = MatchedDecl->getAttr<ReqdWorkGroupSizeAttr>();
60-
if (Attribute->getXDim() > 1 || Attribute->getYDim() > 1 ||
61-
Attribute->getZDim() > 1)
60+
if (*Attribute->getXDimVal(*Result.Context) > 1 ||
61+
*Attribute->getYDimVal(*Result.Context) > 1 ||
62+
*Attribute->getZDimVal(*Result.Context) > 1)
6263
IsNDRange = true;
6364
}
6465
if (IsNDRange) // No warning if kernel is treated as an NDRange.

‎clang/include/clang/Basic/Attr.td

Lines changed: 18 additions & 15 deletions
Original file line numberDiff line numberDiff line change
@@ -1149,7 +1149,6 @@ def SYCLDevice : InheritableAttr {
11491149
let Subjects = SubjectList<[Function]>;
11501150
let LangOpts = [SYCLIsDevice];
11511151
let Documentation = [SYCLDeviceDocs];
1152-
let PragmaAttributeSupport = 0;
11531152
}
11541153

11551154
def SYCLKernel : InheritableAttr {
@@ -1167,7 +1166,6 @@ def SYCLSimd : InheritableAttr {
11671166
let Subjects = SubjectList<[Function]>;
11681167
let LangOpts = [SYCLExplicitSIMD];
11691168
let Documentation = [SYCLSimdDocs];
1170-
let PragmaAttributeSupport = 0;
11711169
}
11721170

11731171
// Available in SYCL explicit SIMD extension. Binds a file scope private
@@ -1180,7 +1178,6 @@ def SYCLRegisterNum : InheritableAttr {
11801178
// for the host device as well
11811179
let LangOpts = [SYCLExplicitSIMD];
11821180
let Documentation = [SYCLRegisterNumDocs];
1183-
let PragmaAttributeSupport = 0;
11841181
}
11851182

11861183
// Used to mark ESIMD kernel pointer parameters originating from accessors.
@@ -1190,7 +1187,6 @@ def SYCLSimdAccessorPtr : InheritableAttr {
11901187
let Subjects = SubjectList<[ParmVar]>;
11911188
let LangOpts = [SYCLExplicitSIMD];
11921189
let Documentation = [SYCLSimdAccessorPtrDocs];
1193-
let PragmaAttributeSupport = 0;
11941190
}
11951191

11961192
def SYCLScope : Attr {
@@ -1219,7 +1215,6 @@ def SYCLDeviceIndirectlyCallable : InheritableAttr {
12191215
let Subjects = SubjectList<[Function]>;
12201216
let LangOpts = [SYCLIsDevice];
12211217
let Documentation = [SYCLDeviceIndirectlyCallableDocs];
1222-
let PragmaAttributeSupport = 0;
12231218
}
12241219

12251220
def SYCLIntelBufferLocation : InheritableAttr {
@@ -1244,7 +1239,6 @@ def SYCLIntelKernelArgsRestrict : InheritableAttr {
12441239
let LangOpts = [ SYCLIsDevice, SYCLIsHost ];
12451240
let Documentation = [ SYCLIntelKernelArgsRestrictDocs ];
12461241
let SimpleHandler = 1;
1247-
let PragmaAttributeSupport = 0;
12481242
}
12491243

12501244
def SYCLIntelNumSimdWorkItems : InheritableAttr {
@@ -1254,7 +1248,6 @@ def SYCLIntelNumSimdWorkItems : InheritableAttr {
12541248
let LangOpts = [SYCLIsDevice, SYCLIsHost];
12551249
let Subjects = SubjectList<[Function], ErrorDiag>;
12561250
let Documentation = [SYCLIntelNumSimdWorkItemsAttrDocs];
1257-
let PragmaAttributeSupport = 0;
12581251
}
12591252

12601253
def SYCLIntelUseStallEnableClusters : InheritableAttr {
@@ -1267,7 +1260,6 @@ def SYCLIntelUseStallEnableClusters : InheritableAttr {
12671260
}
12681261
}];
12691262
let Documentation = [SYCLIntelUseStallEnableClustersAttrDocs];
1270-
let PragmaAttributeSupport = 0;
12711263
}
12721264

12731265
def SYCLIntelSchedulerTargetFmaxMhz : InheritableAttr {
@@ -1277,7 +1269,6 @@ def SYCLIntelSchedulerTargetFmaxMhz : InheritableAttr {
12771269
let LangOpts = [SYCLIsDevice, SYCLIsHost];
12781270
let Subjects = SubjectList<[Function], ErrorDiag>;
12791271
let Documentation = [SYCLIntelSchedulerTargetFmaxMhzAttrDocs];
1280-
let PragmaAttributeSupport = 0;
12811272
let AdditionalMembers = [{
12821273
static unsigned getMinValue() {
12831274
return 0;
@@ -1286,7 +1277,6 @@ def SYCLIntelSchedulerTargetFmaxMhz : InheritableAttr {
12861277
return 1024*1024;
12871278
}
12881279
}];
1289-
12901280
}
12911281

12921282
def SYCLIntelMaxWorkGroupSize : InheritableAttr {
@@ -1297,11 +1287,19 @@ def SYCLIntelMaxWorkGroupSize : InheritableAttr {
12971287
ExprArgument<"ZDim">];
12981288
let LangOpts = [SYCLIsDevice, SYCLIsHost];
12991289
let Subjects = SubjectList<[Function], ErrorDiag>;
1300-
let PragmaAttributeSupport = 0;
13011290
let AdditionalMembers = [{
13021291
ArrayRef<const Expr *> dimensions() const {
13031292
return {getXDim(), getYDim(), getZDim()};
13041293
}
1294+
Optional<llvm::APSInt> getXDimVal(ASTContext &Ctx) const {
1295+
return getXDim()->getIntegerConstantExpr(Ctx);
1296+
}
1297+
Optional<llvm::APSInt> getYDimVal(ASTContext &Ctx) const {
1298+
return getYDim()->getIntegerConstantExpr(Ctx);
1299+
}
1300+
Optional<llvm::APSInt> getZDimVal(ASTContext &Ctx) const {
1301+
return getZDim()->getIntegerConstantExpr(Ctx);
1302+
}
13051303
}];
13061304
let Documentation = [SYCLIntelMaxWorkGroupSizeAttrDocs];
13071305
}
@@ -1313,7 +1311,6 @@ def SYCLIntelMaxGlobalWorkDim : InheritableAttr {
13131311
let LangOpts = [SYCLIsDevice, SYCLIsHost];
13141312
let Subjects = SubjectList<[Function], ErrorDiag>;
13151313
let Documentation = [SYCLIntelMaxGlobalWorkDimAttrDocs];
1316-
let PragmaAttributeSupport = 0;
13171314
}
13181315

13191316
def SYCLIntelNoGlobalWorkOffset : InheritableAttr {
@@ -1323,7 +1320,6 @@ def SYCLIntelNoGlobalWorkOffset : InheritableAttr {
13231320
let LangOpts = [SYCLIsDevice, SYCLIsHost];
13241321
let Subjects = SubjectList<[Function], ErrorDiag>;
13251322
let Documentation = [SYCLIntelNoGlobalWorkOffsetAttrDocs];
1326-
let PragmaAttributeSupport = 0;
13271323
}
13281324

13291325
def SYCLIntelLoopFuse : InheritableAttr {
@@ -1404,7 +1400,6 @@ def IntelReqdSubGroupSize: InheritableAttr {
14041400
let Subjects = SubjectList<[Function, CXXMethod], ErrorDiag>;
14051401
let Documentation = [IntelReqdSubGroupSizeDocs];
14061402
let LangOpts = [OpenCL, SYCLIsDevice, SYCLIsHost];
1407-
let PragmaAttributeSupport = 0;
14081403
}
14091404

14101405
// This attribute is both a type attribute, and a declaration attribute (for
@@ -2124,7 +2119,6 @@ def SYCLIntelPipeIO : Attr {
21242119
let LangOpts = [SYCLIsDevice, SYCLIsHost];
21252120
let Subjects = SubjectList<[Var]>;
21262121
let Documentation = [SYCLIntelPipeIOAttrDocs];
2127-
let PragmaAttributeSupport = 0;
21282122
}
21292123

21302124
// Variadic integral arguments.
@@ -2853,6 +2847,15 @@ def ReqdWorkGroupSize : InheritableAttr {
28532847
ArrayRef<const Expr *> dimensions() const {
28542848
return {getXDim(), getYDim(), getZDim()};
28552849
}
2850+
Optional<llvm::APSInt> getXDimVal(ASTContext &Ctx) const {
2851+
return getXDim()->getIntegerConstantExpr(Ctx);
2852+
}
2853+
Optional<llvm::APSInt> getYDimVal(ASTContext &Ctx) const {
2854+
return getYDim()->getIntegerConstantExpr(Ctx);
2855+
}
2856+
Optional<llvm::APSInt> getZDimVal(ASTContext &Ctx) const {
2857+
return getZDim()->getIntegerConstantExpr(Ctx);
2858+
}
28562859
}];
28572860
let Documentation = [ReqdWorkGroupSizeAttrDocs];
28582861
}

‎clang/include/clang/Sema/Sema.h

Lines changed: 17 additions & 3 deletions
Original file line numberDiff line numberDiff line change
@@ -346,8 +346,12 @@ class SYCLIntegrationHeader {
346346
/// Registers a specialization constant to emit info for it into the header.
347347
void addSpecConstant(StringRef IDName, QualType IDType);
348348

349-
/// Notes that this_item is called within the kernel.
349+
/// Note which free functions (this_id, this_item, etc) are called within the
350+
/// kernel
351+
void setCallsThisId(bool B);
350352
void setCallsThisItem(bool B);
353+
void setCallsThisNDItem(bool B);
354+
void setCallsThisGroup(bool B);
351355

352356
private:
353357
// Kernel actual parameter descriptor.
@@ -366,6 +370,15 @@ class SYCLIntegrationHeader {
366370
KernelParamDesc() = default;
367371
};
368372

373+
// there are four free functions the kernel may call (this_id, this_item,
374+
// this_nd_item, this_group)
375+
struct KernelCallsSYCLFreeFunction {
376+
bool CallsThisId;
377+
bool CallsThisItem;
378+
bool CallsThisNDItem;
379+
bool CallsThisGroup;
380+
};
381+
369382
// Kernel invocation descriptor
370383
struct KernelDesc {
371384
/// Kernel name.
@@ -385,8 +398,9 @@ class SYCLIntegrationHeader {
385398
/// Descriptor of kernel actual parameters.
386399
SmallVector<KernelParamDesc, 8> Params;
387400

388-
// Whether kernel calls this_item()
389-
bool CallsThisItem;
401+
// Whether kernel calls any of the SYCL free functions (this_item(),
402+
// this_id(), etc)
403+
KernelCallsSYCLFreeFunction FreeFunctionCalls;
390404

391405
KernelDesc() = default;
392406
};

‎clang/lib/CodeGen/CGExprAgg.cpp

Lines changed: 6 additions & 0 deletions
Original file line numberDiff line numberDiff line change
@@ -499,6 +499,12 @@ void AggExprEmitter::EmitArrayInit(Address DestPtr, llvm::ArrayType *AType,
499499
CodeGen::CodeGenModule &CGM = CGF.CGM;
500500
ConstantEmitter Emitter(CGF);
501501
LangAS AS = ArrayQTy.getAddressSpace();
502+
if (CGM.getLangOpts().SYCLIsDevice && AS == LangAS::Default) {
503+
// SYCL's default AS is 'generic', which can't be used to define constant
504+
// initializer data in. It is reasonable to keep it in the same AS
505+
// as string literals.
506+
AS = CGM.getStringLiteralAddressSpace();
507+
}
502508
if (llvm::Constant *C = Emitter.tryEmitForInitializer(E, AS, ArrayQTy)) {
503509
auto GV = new llvm::GlobalVariable(
504510
CGM.getModule(), C->getType(),

‎clang/lib/CodeGen/CodeGenFunction.cpp

Lines changed: 8 additions & 12 deletions
Original file line numberDiff line numberDiff line change
@@ -621,12 +621,10 @@ void CodeGenFunction::EmitOpenCLKernelMetadata(const FunctionDecl *FD,
621621

622622
if (const ReqdWorkGroupSizeAttr *A = FD->getAttr<ReqdWorkGroupSizeAttr>()) {
623623
llvm::LLVMContext &Context = getLLVMContext();
624-
Optional<llvm::APSInt> XDimVal =
625-
A->getXDim()->getIntegerConstantExpr(FD->getASTContext());
626-
Optional<llvm::APSInt> YDimVal =
627-
A->getYDim()->getIntegerConstantExpr(FD->getASTContext());
628-
Optional<llvm::APSInt> ZDimVal =
629-
A->getZDim()->getIntegerConstantExpr(FD->getASTContext());
624+
ASTContext &ClangCtx = FD->getASTContext();
625+
Optional<llvm::APSInt> XDimVal = A->getXDimVal(ClangCtx);
626+
Optional<llvm::APSInt> YDimVal = A->getYDimVal(ClangCtx);
627+
Optional<llvm::APSInt> ZDimVal = A->getZDimVal(ClangCtx);
630628

631629
// For a SYCLDevice ReqdWorkGroupSizeAttr arguments are reversed.
632630
if (getLangOpts().SYCLIsDevice)
@@ -701,12 +699,10 @@ void CodeGenFunction::EmitOpenCLKernelMetadata(const FunctionDecl *FD,
701699
if (const SYCLIntelMaxWorkGroupSizeAttr *A =
702700
FD->getAttr<SYCLIntelMaxWorkGroupSizeAttr>()) {
703701
llvm::LLVMContext &Context = getLLVMContext();
704-
Optional<llvm::APSInt> XDimVal =
705-
A->getXDim()->getIntegerConstantExpr(FD->getASTContext());
706-
Optional<llvm::APSInt> YDimVal =
707-
A->getYDim()->getIntegerConstantExpr(FD->getASTContext());
708-
Optional<llvm::APSInt> ZDimVal =
709-
A->getZDim()->getIntegerConstantExpr(FD->getASTContext());
702+
ASTContext &ClangCtx = FD->getASTContext();
703+
Optional<llvm::APSInt> XDimVal = A->getXDimVal(ClangCtx);
704+
Optional<llvm::APSInt> YDimVal = A->getYDimVal(ClangCtx);
705+
Optional<llvm::APSInt> ZDimVal = A->getZDimVal(ClangCtx);
710706

711707
// For a SYCLDevice SYCLIntelMaxWorkGroupSizeAttr arguments are reversed.
712708
if (getLangOpts().SYCLIsDevice)

‎clang/lib/CodeGen/TargetInfo.cpp

Lines changed: 10 additions & 24 deletions
Original file line numberDiff line numberDiff line change
@@ -8108,15 +8108,10 @@ void TCETargetCodeGenInfo::setTargetAttributes(
81088108

81098109
SmallVector<llvm::Metadata *, 5> Operands;
81108110
Operands.push_back(llvm::ConstantAsMetadata::get(F));
8111-
unsigned XDim = Attr->getXDim()
8112-
->EvaluateKnownConstInt(M.getContext())
8113-
.getZExtValue();
8114-
unsigned YDim = Attr->getYDim()
8115-
->EvaluateKnownConstInt(M.getContext())
8116-
.getZExtValue();
8117-
unsigned ZDim = Attr->getZDim()
8118-
->EvaluateKnownConstInt(M.getContext())
8119-
.getZExtValue();
8111+
ASTContext &Ctx = M.getContext();
8112+
unsigned XDim = Attr->getXDimVal(Ctx)->getZExtValue();
8113+
unsigned YDim = Attr->getYDimVal(Ctx)->getZExtValue();
8114+
unsigned ZDim = Attr->getZDimVal(Ctx)->getZExtValue();
81208115

81218116
Operands.push_back(llvm::ConstantAsMetadata::get(
81228117
llvm::Constant::getIntegerValue(M.Int32Ty, llvm::APInt(32, XDim))));
@@ -9006,24 +9001,15 @@ void AMDGPUTargetCodeGenInfo::setTargetAttributes(
90069001
unsigned XDim = 0;
90079002
unsigned YDim = 0;
90089003
unsigned ZDim = 0;
9004+
ASTContext &Ctx = M.getContext();
90099005
if (FlatWGS) {
9010-
Min = FlatWGS->getMin()
9011-
->EvaluateKnownConstInt(M.getContext())
9012-
.getExtValue();
9013-
Max = FlatWGS->getMax()
9014-
->EvaluateKnownConstInt(M.getContext())
9015-
.getExtValue();
9006+
Min = FlatWGS->getMin()->EvaluateKnownConstInt(Ctx).getExtValue();
9007+
Max = FlatWGS->getMax()->EvaluateKnownConstInt(Ctx).getExtValue();
90169008
}
90179009
if (ReqdWGS) {
9018-
XDim = ReqdWGS->getXDim()
9019-
->EvaluateKnownConstInt(M.getContext())
9020-
.getZExtValue();
9021-
YDim = ReqdWGS->getYDim()
9022-
->EvaluateKnownConstInt(M.getContext())
9023-
.getZExtValue();
9024-
ZDim = ReqdWGS->getZDim()
9025-
->EvaluateKnownConstInt(M.getContext())
9026-
.getZExtValue();
9010+
XDim = ReqdWGS->getXDimVal(Ctx)->getZExtValue();
9011+
YDim = ReqdWGS->getYDimVal(Ctx)->getZExtValue();
9012+
ZDim = ReqdWGS->getZDimVal(Ctx)->getZExtValue();
90279013
}
90289014
if (ReqdWGS && Min == 0 && Max == 0)
90299015
Min = Max = XDim * YDim * ZDim;

‎clang/lib/Frontend/CompilerInvocation.cpp

Lines changed: 4 additions & 1 deletion
Original file line numberDiff line numberDiff line change
@@ -968,7 +968,10 @@ static bool ParseCodeGenArgs(CodeGenOptions &Opts, ArgList &Args, InputKind IK,
968968
Args.getLastArg(OPT_emit_llvm_uselists, OPT_no_emit_llvm_uselists))
969969
Opts.EmitLLVMUseLists = A->getOption().getID() == OPT_emit_llvm_uselists;
970970

971-
Opts.DisableLLVMPasses = Args.hasArg(OPT_disable_llvm_passes);
971+
Opts.DisableLLVMPasses =
972+
Args.hasArg(OPT_disable_llvm_passes) ||
973+
(Args.hasArg(OPT_fsycl_is_device) && Triple.isSPIR() &&
974+
Args.hasArg(OPT_fno_sycl_early_optimizations));
972975
Opts.DisableLifetimeMarkers = Args.hasArg(OPT_disable_lifetimemarkers);
973976

974977
const llvm::Triple::ArchType DebugEntryValueArchs[] = {

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