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Merge commit 'c7fa409bcad' into sycl-web
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8 files changed

+431
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‎clang/lib/Sema/UsedDeclVisitor.h

Lines changed: 70 additions & 0 deletions
Original file line numberDiff line numberDiff line change
@@ -0,0 +1,70 @@
1+
//===- UsedDeclVisitor.h - ODR-used declarations visitor --------*- C++ -*-===//
2+
//
3+
// Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions.
4+
// See https://llvm.org/LICENSE.txt for license information.
5+
// SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception
6+
//===----------------------------------------------------------------------===//
7+
//
8+
// This file defines UsedDeclVisitor, a CRTP class which visits all the
9+
// declarations that are ODR-used by an expression or statement.
10+
//
11+
//===----------------------------------------------------------------------===//
12+
13+
#ifndef LLVM_CLANG_LIB_SEMA_USEDDECLVISITOR_H
14+
#define LLVM_CLANG_LIB_SEMA_USEDDECLVISITOR_H
15+
16+
#include "clang/AST/EvaluatedExprVisitor.h"
17+
#include "clang/Sema/SemaInternal.h"
18+
19+
namespace clang {
20+
template <class Derived>
21+
class UsedDeclVisitor : public EvaluatedExprVisitor<Derived> {
22+
protected:
23+
Sema &S;
24+
25+
public:
26+
typedef EvaluatedExprVisitor<Derived> Inherited;
27+
28+
UsedDeclVisitor(Sema &S) : Inherited(S.Context), S(S) {}
29+
30+
Derived &asImpl() { return *static_cast<Derived *>(this); }
31+
32+
void VisitCXXBindTemporaryExpr(CXXBindTemporaryExpr *E) {
33+
asImpl().visitUsedDecl(
34+
E->getBeginLoc(),
35+
const_cast<CXXDestructorDecl *>(E->getTemporary()->getDestructor()));
36+
asImpl().Visit(E->getSubExpr());
37+
}
38+
39+
void VisitCXXNewExpr(CXXNewExpr *E) {
40+
if (E->getOperatorNew())
41+
asImpl().visitUsedDecl(E->getBeginLoc(), E->getOperatorNew());
42+
if (E->getOperatorDelete())
43+
asImpl().visitUsedDecl(E->getBeginLoc(), E->getOperatorDelete());
44+
Inherited::VisitCXXNewExpr(E);
45+
}
46+
47+
void VisitCXXDeleteExpr(CXXDeleteExpr *E) {
48+
if (E->getOperatorDelete())
49+
asImpl().visitUsedDecl(E->getBeginLoc(), E->getOperatorDelete());
50+
QualType Destroyed = S.Context.getBaseElementType(E->getDestroyedType());
51+
if (const RecordType *DestroyedRec = Destroyed->getAs<RecordType>()) {
52+
CXXRecordDecl *Record = cast<CXXRecordDecl>(DestroyedRec->getDecl());
53+
asImpl().visitUsedDecl(E->getBeginLoc(), S.LookupDestructor(Record));
54+
}
55+
56+
Inherited::VisitCXXDeleteExpr(E);
57+
}
58+
59+
void VisitCXXConstructExpr(CXXConstructExpr *E) {
60+
asImpl().visitUsedDecl(E->getBeginLoc(), E->getConstructor());
61+
Inherited::VisitCXXConstructExpr(E);
62+
}
63+
64+
void VisitCXXDefaultArgExpr(CXXDefaultArgExpr *E) {
65+
asImpl().Visit(E->getExpr());
66+
}
67+
};
68+
} // end namespace clang
69+
70+
#endif // LLVM_CLANG_LIB_SEMA_USEDDECLVISITOR_H

‎llvm/lib/Target/AMDGPU/AMDGPULegalizerInfo.cpp

Lines changed: 16 additions & 15 deletions
Original file line numberDiff line numberDiff line change
@@ -178,6 +178,20 @@ static LegalityPredicate isWideScalarTruncStore(unsigned TypeIdx) {
178178
};
179179
}
180180

181+
static LegalityPredicate smallerThan(unsigned TypeIdx0, unsigned TypeIdx1) {
182+
return [=](const LegalityQuery &Query) {
183+
return Query.Types[TypeIdx0].getSizeInBits() <
184+
Query.Types[TypeIdx1].getSizeInBits();
185+
};
186+
}
187+
188+
static LegalityPredicate greaterThan(unsigned TypeIdx0, unsigned TypeIdx1) {
189+
return [=](const LegalityQuery &Query) {
190+
return Query.Types[TypeIdx0].getSizeInBits() >
191+
Query.Types[TypeIdx1].getSizeInBits();
192+
};
193+
};
194+
181195
AMDGPULegalizerInfo::AMDGPULegalizerInfo(const GCNSubtarget &ST_,
182196
const GCNTargetMachine &TM)
183197
: ST(ST_) {
@@ -480,7 +494,8 @@ AMDGPULegalizerInfo::AMDGPULegalizerInfo(const GCNSubtarget &ST_,
480494
if (ST.has16BitInsts())
481495
IToFP.legalFor({{S16, S16}});
482496
IToFP.clampScalar(1, S32, S64)
483-
.scalarize(0);
497+
.scalarize(0)
498+
.widenScalarToNextPow2(1);
484499

485500
auto &FPToI = getActionDefinitionsBuilder({G_FPTOSI, G_FPTOUI})
486501
.legalFor({{S32, S32}, {S32, S64}, {S32, S16}})
@@ -647,20 +662,6 @@ AMDGPULegalizerInfo::AMDGPULegalizerInfo(const GCNSubtarget &ST_,
647662
.scalarize(0);
648663
}
649664

650-
auto smallerThan = [](unsigned TypeIdx0, unsigned TypeIdx1) {
651-
return [=](const LegalityQuery &Query) {
652-
return Query.Types[TypeIdx0].getSizeInBits() <
653-
Query.Types[TypeIdx1].getSizeInBits();
654-
};
655-
};
656-
657-
auto greaterThan = [](unsigned TypeIdx0, unsigned TypeIdx1) {
658-
return [=](const LegalityQuery &Query) {
659-
return Query.Types[TypeIdx0].getSizeInBits() >
660-
Query.Types[TypeIdx1].getSizeInBits();
661-
};
662-
};
663-
664665
getActionDefinitionsBuilder(G_INTTOPTR)
665666
// List the common cases
666667
.legalForCartesianProduct(AddrSpaces64, {S64})

‎llvm/lib/Target/X86/X86ISelLowering.cpp

Lines changed: 0 additions & 3 deletions
Original file line numberDiff line numberDiff line change
@@ -22226,9 +22226,6 @@ SDValue X86TargetLowering::LowerSETCC(SDValue Op, SelectionDAG &DAG) const {
2222622226
if (Op0.getSimpleValueType().isInteger()) {
2222722227
SDValue X86CC;
2222822228
SDValue EFLAGS = emitFlagsForSetcc(Op0, Op1, CC, dl, DAG, X86CC);
22229-
if (!EFLAGS)
22230-
return SDValue();
22231-
2223222229
SDValue Res = DAG.getNode(X86ISD::SETCC, dl, MVT::i8, X86CC, EFLAGS);
2223322230
return IsStrict ? DAG.getMergeValues({Res, Chain}, dl) : Res;
2223422231
}

‎llvm/test/CodeGen/AMDGPU/GlobalISel/legalize-icmp.mir

Lines changed: 98 additions & 0 deletions
Original file line numberDiff line numberDiff line change
@@ -161,6 +161,62 @@ body: |
161161
$vgpr0 = COPY %5
162162
...
163163

164+
---
165+
name: test_icmp_s24
166+
body: |
167+
bb.0:
168+
liveins: $vgpr0
169+
; GFX7-LABEL: name: test_icmp_s24
170+
; GFX7: [[C:%[0-9]+]]:_(s32) = G_CONSTANT i32 0
171+
; GFX7: [[COPY:%[0-9]+]]:_(s32) = COPY $vgpr0
172+
; GFX7: [[C1:%[0-9]+]]:_(s32) = G_CONSTANT i32 16777215
173+
; GFX7: [[COPY1:%[0-9]+]]:_(s32) = COPY [[C]](s32)
174+
; GFX7: [[AND:%[0-9]+]]:_(s32) = G_AND [[COPY1]], [[C1]]
175+
; GFX7: [[COPY2:%[0-9]+]]:_(s32) = COPY [[COPY]](s32)
176+
; GFX7: [[AND1:%[0-9]+]]:_(s32) = G_AND [[COPY2]], [[C1]]
177+
; GFX7: [[ICMP:%[0-9]+]]:_(s1) = G_ICMP intpred(ne), [[AND]](s32), [[AND1]]
178+
; GFX7: [[COPY3:%[0-9]+]]:_(s32) = COPY [[C]](s32)
179+
; GFX7: [[COPY4:%[0-9]+]]:_(s32) = COPY [[COPY]](s32)
180+
; GFX7: [[SELECT:%[0-9]+]]:_(s32) = G_SELECT [[ICMP]](s1), [[COPY3]], [[COPY4]]
181+
; GFX7: [[COPY5:%[0-9]+]]:_(s32) = COPY [[SELECT]](s32)
182+
; GFX7: $vgpr0 = COPY [[COPY5]](s32)
183+
; GFX8-LABEL: name: test_icmp_s24
184+
; GFX8: [[C:%[0-9]+]]:_(s32) = G_CONSTANT i32 0
185+
; GFX8: [[COPY:%[0-9]+]]:_(s32) = COPY $vgpr0
186+
; GFX8: [[C1:%[0-9]+]]:_(s32) = G_CONSTANT i32 16777215
187+
; GFX8: [[COPY1:%[0-9]+]]:_(s32) = COPY [[C]](s32)
188+
; GFX8: [[AND:%[0-9]+]]:_(s32) = G_AND [[COPY1]], [[C1]]
189+
; GFX8: [[COPY2:%[0-9]+]]:_(s32) = COPY [[COPY]](s32)
190+
; GFX8: [[AND1:%[0-9]+]]:_(s32) = G_AND [[COPY2]], [[C1]]
191+
; GFX8: [[ICMP:%[0-9]+]]:_(s1) = G_ICMP intpred(ne), [[AND]](s32), [[AND1]]
192+
; GFX8: [[COPY3:%[0-9]+]]:_(s32) = COPY [[C]](s32)
193+
; GFX8: [[COPY4:%[0-9]+]]:_(s32) = COPY [[COPY]](s32)
194+
; GFX8: [[SELECT:%[0-9]+]]:_(s32) = G_SELECT [[ICMP]](s1), [[COPY3]], [[COPY4]]
195+
; GFX8: [[COPY5:%[0-9]+]]:_(s32) = COPY [[SELECT]](s32)
196+
; GFX8: $vgpr0 = COPY [[COPY5]](s32)
197+
; GFX9-LABEL: name: test_icmp_s24
198+
; GFX9: [[C:%[0-9]+]]:_(s32) = G_CONSTANT i32 0
199+
; GFX9: [[COPY:%[0-9]+]]:_(s32) = COPY $vgpr0
200+
; GFX9: [[C1:%[0-9]+]]:_(s32) = G_CONSTANT i32 16777215
201+
; GFX9: [[COPY1:%[0-9]+]]:_(s32) = COPY [[C]](s32)
202+
; GFX9: [[AND:%[0-9]+]]:_(s32) = G_AND [[COPY1]], [[C1]]
203+
; GFX9: [[COPY2:%[0-9]+]]:_(s32) = COPY [[COPY]](s32)
204+
; GFX9: [[AND1:%[0-9]+]]:_(s32) = G_AND [[COPY2]], [[C1]]
205+
; GFX9: [[ICMP:%[0-9]+]]:_(s1) = G_ICMP intpred(ne), [[AND]](s32), [[AND1]]
206+
; GFX9: [[COPY3:%[0-9]+]]:_(s32) = COPY [[C]](s32)
207+
; GFX9: [[COPY4:%[0-9]+]]:_(s32) = COPY [[COPY]](s32)
208+
; GFX9: [[SELECT:%[0-9]+]]:_(s32) = G_SELECT [[ICMP]](s1), [[COPY3]], [[COPY4]]
209+
; GFX9: [[COPY5:%[0-9]+]]:_(s32) = COPY [[SELECT]](s32)
210+
; GFX9: $vgpr0 = COPY [[COPY5]](s32)
211+
%0:_(s24) = G_CONSTANT i24 0
212+
%1:_(s32) = COPY $vgpr0
213+
%2:_(s24) = G_TRUNC %1
214+
%3:_(s1) = G_ICMP intpred(ne), %0, %2
215+
%4:_(s24) = G_SELECT %3, %0, %2
216+
%5:_(s32) = G_ANYEXT %4
217+
$vgpr0 = COPY %5
218+
...
219+
164220
---
165221
name: test_icmp_v2s32
166222
body: |
@@ -780,3 +836,45 @@ body: |
780836
%5:_(<2 x s32>) = G_SELECT %4, %2, %3
781837
$vgpr0_vgpr1 = COPY %5
782838
...
839+
840+
---
841+
name: test_icmp_s33
842+
body: |
843+
bb.0:
844+
liveins: $vgpr0_vgpr1
845+
; GFX7-LABEL: name: test_icmp_s33
846+
; GFX7: [[COPY:%[0-9]+]]:_(s64) = COPY $vgpr0_vgpr1
847+
; GFX7: [[C:%[0-9]+]]:_(s64) = G_CONSTANT i64 0
848+
; GFX7: [[C1:%[0-9]+]]:_(s64) = G_CONSTANT i64 8589934591
849+
; GFX7: [[COPY1:%[0-9]+]]:_(s64) = COPY [[C]](s64)
850+
; GFX7: [[AND:%[0-9]+]]:_(s64) = G_AND [[COPY1]], [[C1]]
851+
; GFX7: [[COPY2:%[0-9]+]]:_(s64) = COPY [[C]](s64)
852+
; GFX7: [[AND1:%[0-9]+]]:_(s64) = G_AND [[COPY2]], [[C1]]
853+
; GFX7: [[ICMP:%[0-9]+]]:_(s1) = G_ICMP intpred(ne), [[AND]](s64), [[AND1]]
854+
; GFX7: S_ENDPGM 0, implicit [[ICMP]](s1)
855+
; GFX8-LABEL: name: test_icmp_s33
856+
; GFX8: [[COPY:%[0-9]+]]:_(s64) = COPY $vgpr0_vgpr1
857+
; GFX8: [[C:%[0-9]+]]:_(s64) = G_CONSTANT i64 0
858+
; GFX8: [[C1:%[0-9]+]]:_(s64) = G_CONSTANT i64 8589934591
859+
; GFX8: [[COPY1:%[0-9]+]]:_(s64) = COPY [[C]](s64)
860+
; GFX8: [[AND:%[0-9]+]]:_(s64) = G_AND [[COPY1]], [[C1]]
861+
; GFX8: [[COPY2:%[0-9]+]]:_(s64) = COPY [[C]](s64)
862+
; GFX8: [[AND1:%[0-9]+]]:_(s64) = G_AND [[COPY2]], [[C1]]
863+
; GFX8: [[ICMP:%[0-9]+]]:_(s1) = G_ICMP intpred(ne), [[AND]](s64), [[AND1]]
864+
; GFX8: S_ENDPGM 0, implicit [[ICMP]](s1)
865+
; GFX9-LABEL: name: test_icmp_s33
866+
; GFX9: [[COPY:%[0-9]+]]:_(s64) = COPY $vgpr0_vgpr1
867+
; GFX9: [[C:%[0-9]+]]:_(s64) = G_CONSTANT i64 0
868+
; GFX9: [[C1:%[0-9]+]]:_(s64) = G_CONSTANT i64 8589934591
869+
; GFX9: [[COPY1:%[0-9]+]]:_(s64) = COPY [[C]](s64)
870+
; GFX9: [[AND:%[0-9]+]]:_(s64) = G_AND [[COPY1]], [[C1]]
871+
; GFX9: [[COPY2:%[0-9]+]]:_(s64) = COPY [[C]](s64)
872+
; GFX9: [[AND1:%[0-9]+]]:_(s64) = G_AND [[COPY2]], [[C1]]
873+
; GFX9: [[ICMP:%[0-9]+]]:_(s1) = G_ICMP intpred(ne), [[AND]](s64), [[AND1]]
874+
; GFX9: S_ENDPGM 0, implicit [[ICMP]](s1)
875+
%0:_(s64) = COPY $vgpr0_vgpr1
876+
%1:_(s33) = G_TRUNC %0
877+
%2:_(s33) = G_CONSTANT i33 0
878+
%3:_(s1) = G_ICMP intpred(ne), %2, %2
879+
S_ENDPGM 0, implicit %3
880+
...

‎llvm/test/CodeGen/AMDGPU/GlobalISel/legalize-inttoptr.mir

Lines changed: 37 additions & 0 deletions
Original file line numberDiff line numberDiff line change
@@ -160,3 +160,40 @@ body: |
160160
%1:_(<2 x p0>) = G_INTTOPTR %0
161161
$vgpr0_vgpr1_vgpr2_vgpr3 = COPY %1
162162
...
163+
164+
---
165+
name: test_inttoptr_s29_to_p3
166+
body: |
167+
bb.0:
168+
liveins: $vgpr0
169+
170+
; CHECK-LABEL: name: test_inttoptr_s29_to_p3
171+
; CHECK: [[COPY:%[0-9]+]]:_(s32) = COPY $vgpr0
172+
; CHECK: [[C:%[0-9]+]]:_(s32) = G_CONSTANT i32 536870911
173+
; CHECK: [[COPY1:%[0-9]+]]:_(s32) = COPY [[COPY]](s32)
174+
; CHECK: [[AND:%[0-9]+]]:_(s32) = G_AND [[COPY1]], [[C]]
175+
; CHECK: [[INTTOPTR:%[0-9]+]]:_(p3) = G_INTTOPTR [[AND]](s32)
176+
; CHECK: S_ENDPGM 0, implicit [[INTTOPTR]](p3)
177+
%0:_(s32) = COPY $vgpr0
178+
%1:_(s29) = G_TRUNC %0
179+
%2:_(p3) = G_INTTOPTR %1
180+
S_ENDPGM 0, implicit %2
181+
...
182+
183+
---
184+
name: test_inttoptr_s33_to_p3
185+
body: |
186+
bb.0:
187+
liveins: $vgpr0_vgpr1
188+
189+
; CHECK-LABEL: name: test_inttoptr_s33_to_p3
190+
; CHECK: [[COPY:%[0-9]+]]:_(s64) = COPY $vgpr0_vgpr1
191+
; CHECK: [[TRUNC:%[0-9]+]]:_(s33) = G_TRUNC [[COPY]](s64)
192+
; CHECK: [[TRUNC1:%[0-9]+]]:_(s32) = G_TRUNC [[TRUNC]](s33)
193+
; CHECK: [[INTTOPTR:%[0-9]+]]:_(p3) = G_INTTOPTR [[TRUNC1]](s32)
194+
; CHECK: S_ENDPGM 0, implicit [[INTTOPTR]](p3)
195+
%0:_(s64) = COPY $vgpr0_vgpr1
196+
%1:_(s33) = G_TRUNC %0
197+
%2:_(p3) = G_INTTOPTR %1
198+
S_ENDPGM 0, implicit %2
199+
...

‎llvm/test/CodeGen/AMDGPU/GlobalISel/legalize-ptrtoint.mir

Lines changed: 32 additions & 0 deletions
Original file line numberDiff line numberDiff line change
@@ -161,3 +161,35 @@ body: |
161161
%1:_(<2 x s32>) = G_PTRTOINT %0
162162
$vgpr0_vgpr1 = COPY %1
163163
...
164+
165+
---
166+
name: test_ptrtoint_p3_to_s29
167+
body: |
168+
bb.0:
169+
liveins: $vgpr0
170+
171+
; CHECK-LABEL: name: test_ptrtoint_p3_to_s29
172+
; CHECK: [[COPY:%[0-9]+]]:_(p3) = COPY $vgpr0
173+
; CHECK: [[PTRTOINT:%[0-9]+]]:_(s32) = G_PTRTOINT [[COPY]](p3)
174+
; CHECK: [[TRUNC:%[0-9]+]]:_(s29) = G_TRUNC [[PTRTOINT]](s32)
175+
; CHECK: S_ENDPGM 0, implicit [[TRUNC]](s29)
176+
%0:_(p3) = COPY $vgpr0
177+
%1:_(s29) = G_PTRTOINT %0
178+
S_ENDPGM 0, implicit %1
179+
...
180+
181+
---
182+
name: test_ptrtoint_p3_to_s33
183+
body: |
184+
bb.0:
185+
liveins: $vgpr0
186+
187+
; CHECK-LABEL: name: test_ptrtoint_p3_to_s33
188+
; CHECK: [[COPY:%[0-9]+]]:_(p3) = COPY $vgpr0
189+
; CHECK: [[PTRTOINT:%[0-9]+]]:_(s32) = G_PTRTOINT [[COPY]](p3)
190+
; CHECK: [[ZEXT:%[0-9]+]]:_(s33) = G_ZEXT [[PTRTOINT]](s32)
191+
; CHECK: S_ENDPGM 0, implicit [[ZEXT]](s33)
192+
%0:_(p3) = COPY $vgpr0
193+
%1:_(s33) = G_PTRTOINT %0
194+
S_ENDPGM 0, implicit %1
195+
...

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