Merge from 'sycl' to 'sycl-web'

Author: iclsrc

CONTRIBUTING.md

@@ -24,24 +24,25 @@ for more information.
   - For the DPC++ Compiler project, use **sycl** branch as baseline for your
     changes. See [Get Started Guide](sycl/doc/GetStartedGuide.md).
 - Prepare your patch
-    - follow [LLVM coding standards](https://llvm.org/docs/CodingStandards.html)
-    - [clang-format](https://clang.llvm.org/docs/ClangFormat.html) and
-      [clang-tidy](https://clang.llvm.org/extra/clang-tidy/) tools can be
-      integrated into your workflow to ensure formatting and stylistic
-      compliance of your changes.
-    - use
-      ```
-      ./clang/tools/clang-format/git-clang-format `git merge-base origin/sycl HEAD`
-      ```
-      to check the format of your current changes against the `origin/sycl`
-      branch.
-        - `-f` to also correct unstaged changes
-        - `--diff` to only print the diff without applying
-- Build the project and run all tests.
-    - complete test suite: `python buildbot/check.py`
-    - sycl test suite `python buildbot/check.py -t test-sycl`
-    - run only "mytest" test `python buildbot/check.py -t test-sycl-mytest`
-    - if necessary, use `-o $LLVM_BUILD_DIR` to specify the llvm build directory
+  - follow [LLVM coding standards](https://llvm.org/docs/CodingStandards.html)
+  - [clang-format](https://clang.llvm.org/docs/ClangFormat.html) and
+    [clang-tidy](https://clang.llvm.org/extra/clang-tidy/) tools can be
+    integrated into your workflow to ensure formatting and stylistic
+    compliance of your changes.
+  - use
+
+    ```bash
+    ./clang/tools/clang-format/git-clang-format `git merge-base origin/sycl HEAD`
+    ```
+
+    to check the format of your current changes against the `origin/sycl`
+    branch.
+    - `-f` to also correct unstaged changes
+    - `--diff` to only print the diff without applying
+- Build the project following
+[Get Started Guide instructions](sycl/doc/GetStartedGuide.md#build-dpc-toolchain).
+- Run regression tests -
+[instructions](sycl/doc/GetStartedGuide.md#test-dpc-toolchain).
 
 ### Commit message
 
@@ -67,6 +68,7 @@ ready for merge.
 ### Merge
 
 Project maintainers merge pull requests using one of the following options:
+
 - [Rebase and merge] The preferable choice for PRs containing a single commit
 - [Squash and merge] Used when there are multiple commits in the PR
   - Squashing is done to make sure that the project is buildable on any commit

buildbot/configure.py

@@ -38,6 +38,10 @@ def do_configure(args):
         libclc_targets_to_build = 'nvptx64--;nvptx64--nvidiacl'
         sycl_build_pi_cuda = 'ON'
 
+    # replace not append, so ARM ^ X86
+    if args.arm:
+        llvm_targets_to_build = 'ARM;AArch64'
+
     if args.no_werror:
         sycl_werror = 'OFF'
 
@@ -128,6 +132,7 @@ def main():
     parser.add_argument("-t", "--build-type",
                         metavar="BUILD_TYPE", default="Release", help="build type: Debug, Release")
     parser.add_argument("--cuda", action='store_true', help="switch from OpenCL to CUDA")
+    parser.add_argument("--arm", action='store_true', help="build ARM support rather than x86")
     parser.add_argument("--no-assertions", action='store_true', help="build without assertions")
     parser.add_argument("--docs", action='store_true', help="build Doxygen documentation")
     parser.add_argument("--system-ocl", action='store_true', help="use OpenCL deps from system (no download)")

buildbot/dependency.conf

@@ -31,3 +31,16 @@ fpga_driver_win=2020.10.7.0.15
 # NVidia CUDA driver
 # TODO provide URL for CUDA driver
 nvidia_gpu_driver_lin=435.21
+
+[DEPS ROOT]
+ocl_cpu_root={DEPS_ROOT}/opencl/runtime/linux/oclcpu
+ocl_gpu_root={DEPS_ROOT}/opencl/runtime/linux/oclgpu
+fpga_root={ARCHIVE_ROOT}/comp/oclfpga/linux
+ocl_fpga_emu_root={DEPS_ROOT}/opencl/runtime/linux/oclfpgaemu
+tbb_root={DEPS_ROOT}/tbb/lin
+
+ocl_cpu_root_win={DEPS_ROOT}/opencl/runtime/win/oclcpu
+ocl_gpu_root_win=
+fpga_root_win={ARCHIVE_ROOT}/comp/oclfpga/win
+ocl_fpga_emu_root_win={DEPS_ROOT}/opencl/runtime/win/oclfpgaemu
+tbb_root_win={DEPS_ROOT}/tbb/win

buildbot/linux.vrd

@@ -0,0 +1,26 @@
+# For TBB
+:eadb LD_LIBRARY_PATH={TBBROOT}/{TBBVER}/lib/intel64/gcc4.8
+
+# For CPU
+:eadb LD_LIBRARY_PATH={OCLCPUROOT}/{OCLCPUVER}/intel64_lin
+:eadb OCL_ICD_FILENAMES={OCLCPUROOT}/{OCLCPUVER}/intel64_lin/libintelocl.so
+
+# For GPU
+:eade LD_LIBRARY_PATH={OCLGPUROOT}/{OCLGPUVER}
+:eade PATH={OCLGPUROOT}/{OCLGPUVER}
+:eade OCL_ICD_FILENAMES={OCLGPUROOT}/{OCLGPUVER}/libigdrcl.so
+
+# For FPGA
+:eadb PATH={OCLFPGAROOT}/{OCLFPGAVER}/build/bin
+
+# For FPGA EMU
+:eadb LD_LIBRARY_PATH={OCLFPGAEMUROOT}/{OCLFPGAEMUVER}
+:eadb LD_LIBRARY_PATH={OCLFPGAEMUROOT}/{OCLFPGAEMUVER}/intel64_lin
+:eadb PATH={OCLFPGAEMUROOT}/{OCLFPGAEMUVER}/bin
+:eadb OCL_ICD_FILENAMES={OCLFPGAEMUROOT}/{OCLFPGAEMUVER}/libintelocl_emu.so
+
+# For Compiler
+:eadb PATH={COMP_ROOT}/bin
+:eadb LD_LIBRARY_PATH={COMP_ROOT}/lib
+:eadb PATH={COMP_ROOT}/install/bin
+:eadb LD_LIBRARY_PATH={COMP_ROOT}/install/lib

buildbot/windows.vrd

@@ -0,0 +1,23 @@
+# For TBB
+:eadb PATH={TBBROOT}/{TBBVER}/redist/intel64/vc14
+:eadb LIB={TBBROOT}/{TBBVER}/lib/intel64/vc14
+:eadb INCLUDE={TBBROOT}/{TBBVER}/include
+:eadb CPATH={TBBROOT}/{TBBVER}/include
+
+# For CPU
+:eadb PATH={OCLCPUROOT}/{OCLCPUVER}/intel64_win
+:eadb OCL_ICD_FILENAMES={OCLCPUROOT}/{OCLCPUVER}/intel64_win/intelocl64.dll
+
+# For FPGA
+:eadb PATH={OCLFPGAROOT}/{OCLFPGAVER}/build/bin
+
+# For FPGA EMU
+:eadb PATH={OCLFPGAEMUROOT}/{OCLFPGAEMUVER}/bin
+:eadb PATH={OCLFPGAEMUROOT}/{OCLFPGAEMUVER}/intel64_win
+:eadb OCL_ICD_FILENAMES={OCLFPGAEMUROOT}/{OCLFPGAEMUVER}/intelocl64_emu.dll
+
+# For Compiler
+:eadb PATH={COMP_ROOT}/bin
+:eadb PATH={COMP_ROOT}/lib
+:eadb PATH={COMP_ROOT}/install/bin
+:eadb PATH={COMP_ROOT}/install/lib

clang/include/clang/Basic/LangOptions.def

@@ -252,6 +252,11 @@ LANGOPT(SYCLVersion       , 32, 0, "Version of the SYCL standard used")
 LANGOPT(DeclareSPIRVBuiltins, 1, 0, "Declare SPIR-V builtin functions")
 LANGOPT(SYCLExplicitSIMD  , 1, 0, "SYCL compilation with explicit SIMD extension")
 LANGOPT(EnableDAEInSpirKernels , 1, 0, "Enable Dead Argument Elimination in SPIR kernels")
+LANGOPT(
+    SYCLValueFitInMaxInt, 1, 0,
+    "SYCL compiler assumes value fits within MAX_INT for member function of "
+    "get/operator[], get_id/operator[] and get_global_id/get_global_linear_id "
+    "in SYCL class id, iterm and nd_iterm")
 
 LANGOPT(HIPUseNewLaunchAPI, 1, 0, "Use new kernel launching API for HIP")
 

clang/include/clang/Driver/Options.td

@@ -1881,6 +1881,12 @@ def fsycl_device_code_split_EQ : Joined<["-"], "fsycl-device-code-split=">,
 def fsycl_device_code_split : Flag<["-"], "fsycl-device-code-split">, Alias<fsycl_device_code_split_EQ>,
   AliasArgs<["per_source"]>, Flags<[CC1Option, CoreOption]>,
   HelpText<"Perform SYCL device code split in the per_source mode i.e. create a device code module for each source (translation unit)">;
+def fsycl_id_queries_fit_in_int : Flag<["-"], "fsycl-id-queries-fit-in-int">,
+  Flags<[CC1Option, CoreOption]>, HelpText<"Assume that SYCL ID queries fit "
+  "within MAX_INT.">;
+def fno_sycl_id_queries_fit_in_int : Flag<["-"], "fno-sycl-id-queries-fit-in-int">,
+  Flags<[CC1Option, CoreOption]>, HelpText<"Do not assume that SYCL ID queries "
+  "fit within MAX_INT.">;
 def fsycl_use_bitcode : Flag<["-"], "fsycl-use-bitcode">,
   Flags<[CC1Option, CoreOption]>, HelpText<"Use LLVM bitcode instead of SPIR-V in fat objects">;
 def fno_sycl_use_bitcode : Flag<["-"], "fno-sycl-use-bitcode">,
@@ -3544,7 +3550,7 @@ def fsycl_esimd : Flag<["-"], "fsycl-explicit-simd">, Group<sycl_Group>, Flags<[
   HelpText<"Enable SYCL explicit SIMD extension">;
 def fno_sycl_esimd : Flag<["-"], "fno-sycl-explicit-simd">, Group<sycl_Group>,
   HelpText<"Disable SYCL explicit SIMD extension">, Flags<[NoArgumentUnused, CoreOption]>;
-defm sycl_std_optimizations : OptOutFFlag<"sycl-std-optimizations", "Enable", "Disable", " standard optimization pipeline for SYCL device compiler">;
+defm sycl_early_optimizations : OptOutFFlag<"sycl-early-optimizations", "Enable", "Disable", " standard optimization pipeline for SYCL device compiler">;
 
 //===----------------------------------------------------------------------===//
 // CC1 Options

clang/lib/Driver/Driver.cpp

@@ -4080,7 +4080,8 @@ class OffloadingActionBuilder final {
         A->claim();
         auto ParsedArg = Opts.ParseOneArg(Args, Index);
         // TODO: Support --no-cuda-gpu-arch, --{,no-}cuda-gpu-arch=all.
-        if (ParsedArg->getOption().matches(options::OPT_offload_arch_EQ)) {
+        if (ParsedArg &&
+            ParsedArg->getOption().matches(options::OPT_offload_arch_EQ)) {
           ParsedArg->claim();
           GpuArchList.push_back(StringToCudaArch(ParsedArg->getValue(0)));
         }

clang/lib/Driver/ToolChains/Clang.cpp

@@ -4113,9 +4113,9 @@ void Clang::ConstructJob(Compilation &C, const JobAction &JA,
                      false))
       CmdArgs.push_back("-fsycl-explicit-simd");
 
-    if (!Args.hasFlag(options::OPT_fsycl_std_optimizations,
-                      options::OPT_fno_sycl_std_optimizations, true))
-      CmdArgs.push_back("-fno-sycl-std-optimizations");
+    if (!Args.hasFlag(options::OPT_fsycl_early_optimizations,
+                      options::OPT_fno_sycl_early_optimizations, true))
+      CmdArgs.push_back("-fno-sycl-early-optimizations");
     else if (RawTriple.isSPIR()) {
       // Set `sycl-opt` option to configure LLVM passes for SPIR target
       CmdArgs.push_back("-mllvm");
@@ -4157,6 +4157,12 @@ void Clang::ConstructJob(Compilation &C, const JobAction &JA,
       CmdArgs.push_back("-Wno-sycl-strict");
     }
   }
+  if (IsSYCL || UseSYCLTriple) {
+    // Set options for both host and device
+    if (Arg *A = Args.getLastArg(options::OPT_fsycl_id_queries_fit_in_int,
+                                 options::OPT_fno_sycl_id_queries_fit_in_int))
+      A->render(Args, CmdArgs);
+  }
 
   if (IsSYCL) {
     if (SYCLStdArg) {

clang/lib/Frontend/CompilerInvocation.cpp

@@ -824,7 +824,7 @@ static bool ParseCodeGenArgs(CodeGenOptions &Opts, ArgList &Args, InputKind IK,
   Opts.DisableLLVMPasses =
       Args.hasArg(OPT_disable_llvm_passes) ||
       (Args.hasArg(OPT_fsycl_is_device) && Triple.isSPIR() &&
-       Args.hasArg(OPT_fno_sycl_std_optimizations) && !IsSyclESIMD);
+       Args.hasArg(OPT_fno_sycl_early_optimizations) && !IsSyclESIMD);
   Opts.DisableLifetimeMarkers = Args.hasArg(OPT_disable_lifetimemarkers);
 
   const llvm::Triple::ArchType DebugEntryValueArchs[] = {
@@ -2597,6 +2597,9 @@ static void ParseLangArgs(LangOptions &Opts, ArgList &Args, InputKind IK,
     }
     Opts.SYCLExplicitSIMD = Args.hasArg(options::OPT_fsycl_esimd);
     Opts.EnableDAEInSpirKernels = Args.hasArg(options::OPT_fenable_sycl_dae);
+    Opts.SYCLValueFitInMaxInt =
+        Args.hasFlag(options::OPT_fsycl_id_queries_fit_in_int,
+                     options::OPT_fno_sycl_id_queries_fit_in_int, false);
   }
 
   Opts.IncludeDefaultHeader = Args.hasArg(OPT_finclude_default_header);

clang/lib/Frontend/InitPreprocessor.cpp

@@ -465,6 +465,8 @@ static void InitializeStandardPredefinedMacros(const TargetInfo &TI,
     // SYCL Version is set to a value when building SYCL applications
     if (LangOpts.SYCLVersion == 2017)
       Builder.defineMacro("CL_SYCL_LANGUAGE_VERSION", "121");
+    if (LangOpts.SYCLValueFitInMaxInt)
+      Builder.defineMacro("__SYCL_ID_QUERIES_FIT_IN_INT__", "1");
   }
 
   if (LangOpts.DeclareSPIRVBuiltins) {

clang/lib/Sema/SemaSYCL.cpp

@@ -1210,6 +1210,8 @@ class SyclKernelDeclCreator : public SyclKernelFieldHandler {
   // Holds the last handled field's first parameter. This doesn't store an
   // iterator as push_back invalidates iterators.
   size_t LastParamIndex = 0;
+  // Keeps track of whether we are currently handling fields inside a struct.
+  int StructDepth = 0;
 
   void addParam(const FieldDecl *FD, QualType FieldTy) {
     const ConstantArrayType *CAT =
@@ -1362,6 +1364,16 @@ class SyclKernelDeclCreator : public SyclKernelFieldHandler {
     SemaRef.addSyclDeviceDecl(KernelDecl);
   }
 
+  bool enterStruct(const CXXRecordDecl *, FieldDecl *) final {
+    ++StructDepth;
+    return true;
+  }
+
+  bool leaveStruct(const CXXRecordDecl *, FieldDecl *) final {
+    --StructDepth;
+    return true;
+  }
+
   bool handleSyclAccessorType(const CXXBaseSpecifier &BS,
                               QualType FieldTy) final {
     const auto *RecordDecl = FieldTy->getAsCXXRecordDecl();
@@ -1390,6 +1402,22 @@ class SyclKernelDeclCreator : public SyclKernelFieldHandler {
     return handleSpecialType(FD, FieldTy);
   }
 
+  RecordDecl *wrapField(FieldDecl *Field, QualType FieldTy) {
+    RecordDecl *WrapperClass =
+        SemaRef.getASTContext().buildImplicitRecord("__wrapper_class");
+    WrapperClass->startDefinition();
+    Field = FieldDecl::Create(
+        SemaRef.getASTContext(), WrapperClass, SourceLocation(),
+        SourceLocation(), /*Id=*/nullptr, FieldTy,
+        SemaRef.getASTContext().getTrivialTypeSourceInfo(FieldTy,
+                                                         SourceLocation()),
+        /*BW=*/nullptr, /*Mutable=*/false, /*InitStyle=*/ICIS_NoInit);
+    Field->setAccess(AS_public);
+    WrapperClass->addDecl(Field);
+    WrapperClass->completeDefinition();
+    return WrapperClass;
+  };
+
   bool handlePointerType(FieldDecl *FD, QualType FieldTy) final {
     // USM allows to use raw pointers instead of buffers/accessors, but these
     // pointers point to the specially allocated memory. For pointer fields we
@@ -1405,6 +1433,17 @@ class SyclKernelDeclCreator : public SyclKernelFieldHandler {
     PointeeTy = SemaRef.getASTContext().getQualifiedType(
         PointeeTy.getUnqualifiedType(), Quals);
     QualType ModTy = SemaRef.getASTContext().getPointerType(PointeeTy);
+    // When the kernel is generated, struct type kernel arguments are
+    // decomposed; i.e. the parameters of the kernel are the fields of the
+    // struct, and not the struct itself. This causes an error in the backend
+    // when the struct field is a pointer, since non-USM pointers cannot be
+    // passed directly. To work around this issue, all pointers inside the
+    // struct are wrapped in a generated '__wrapper_class'.
+    if (StructDepth) {
+      RecordDecl *WrappedPointer = wrapField(FD, ModTy);
+      ModTy = SemaRef.getASTContext().getRecordType(WrappedPointer);
+    }
+
     addParam(FD, ModTy);
     return true;
   }
@@ -1440,6 +1479,9 @@ class SyclKernelDeclCreator : public SyclKernelFieldHandler {
   }
   using SyclKernelFieldHandler::handleSyclHalfType;
   using SyclKernelFieldHandler::handleSyclSamplerType;
+  // Required to handle pointers inside structs
+  using SyclKernelFieldHandler::enterStruct;
+  using SyclKernelFieldHandler::leaveStruct;
 };
 
 class SyclKernelBodyCreator : public SyclKernelFieldHandler {
@@ -1530,12 +1572,26 @@ class SyclKernelBodyCreator : public SyclKernelFieldHandler {
     QualType ParamType = KernelParameter->getOriginalType();
     Expr *DRE = SemaRef.BuildDeclRefExpr(KernelParameter, ParamType, VK_LValue,
                                          SourceLocation());
-    if (FD->getType()->isPointerType() &&
-        FD->getType()->getPointeeType().getAddressSpace() !=
-            ParamType->getPointeeType().getAddressSpace())
-      DRE = ImplicitCastExpr::Create(SemaRef.Context, FD->getType(),
-                                     CK_AddressSpaceConversion, DRE, nullptr,
-                                     VK_RValue);
+
+    if (FD->getType()->isPointerType()) {
+      QualType ModifiedType = ParamType;
+      // Struct Type kernel arguments are decomposed. The pointer fields are
+      // then wrapped inside a compiler generated struct. Therefore when
+      // generating the initializers, we have to 'unwrap' the pointer.
+      if (MemberExprBases.size() > 2) {
+        CXXRecordDecl *WrapperStruct = ParamType->getAsCXXRecordDecl();
+        // Pointer field wrapped inside __wrapper_class
+        FieldDecl *Pointer = *(WrapperStruct->field_begin());
+        DRE = BuildMemberExpr(DRE, Pointer);
+        ModifiedType = Pointer->getType();
+      }
+
+      if (FD->getType()->getPointeeType().getAddressSpace() !=
+          ModifiedType->getPointeeType().getAddressSpace())
+        DRE = ImplicitCastExpr::Create(SemaRef.Context, FD->getType(),
+                                       CK_AddressSpaceConversion, DRE, nullptr,
+                                       VK_RValue);
+    }
     return DRE;
   }
 
@@ -1867,6 +1923,7 @@ class SyclKernelBodyCreator : public SyclKernelFieldHandler {
 class SyclKernelIntHeaderCreator : public SyclKernelFieldHandler {
   SYCLIntegrationHeader &Header;
   int64_t CurOffset = 0;
+  int StructDepth = 0;
 
   void addParam(const FieldDecl *FD, QualType ArgTy,
                 SYCLIntegrationHeader::kernel_param_kind_t Kind) {
@@ -1944,7 +2001,9 @@ class SyclKernelIntHeaderCreator : public SyclKernelFieldHandler {
   }
 
   bool handlePointerType(FieldDecl *FD, QualType FieldTy) final {
-    addParam(FD, FieldTy, SYCLIntegrationHeader::kind_pointer);
+    addParam(FD, FieldTy,
+             ((StructDepth) ? SYCLIntegrationHeader::kind_std_layout
+                            : SYCLIntegrationHeader::kind_pointer));
     return true;
   }
 
@@ -1970,6 +2029,16 @@ class SyclKernelIntHeaderCreator : public SyclKernelFieldHandler {
     return true;
   }
 
+  bool enterStruct(const CXXRecordDecl *, FieldDecl *) final {
+    ++StructDepth;
+    return true;
+  }
+
+  bool leaveStruct(const CXXRecordDecl *, FieldDecl *) final {
+    --StructDepth;
+    return true;
+  }
+
   bool enterField(const CXXRecordDecl *RD, FieldDecl *FD) final {
     CurOffset += SemaRef.getASTContext().getFieldOffset(FD) / 8;
     return true;
@@ -2010,8 +2079,10 @@ class SyclKernelIntHeaderCreator : public SyclKernelFieldHandler {
     CurOffset -= ArraySize;
     return true;
   }
+  using SyclKernelFieldHandler::enterStruct;
   using SyclKernelFieldHandler::handleSyclHalfType;
   using SyclKernelFieldHandler::handleSyclSamplerType;
+  using SyclKernelFieldHandler::leaveStruct;
 };
 
 } // namespace