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| 1 | +// UNSUPPORTED: system-windows |
| 2 | + |
| 3 | +/// -fintelfpga static lib (aoco) |
| 4 | +// RUN: echo "Dummy AOCO image" > %t.aoco |
| 5 | +// RUN: echo "void foo() {}" > %t.c |
| 6 | +// RUN: echo "void foo2() {}" > %t2.c |
| 7 | +// RUN: %clang -c -o %t.o %t.c |
| 8 | +// RUN: %clang -fsycl -c -o %t2.o %t2.c |
| 9 | +// RUN: %clang_cl -fsycl -c -o %t2_cl.o %t2.c |
| 10 | +// RUN: clang-offload-wrapper -o %t-aoco.bc -host=x86_64-unknown-linux-gnu -kind=sycl -target=fpga_aoco-intel-unknown-sycldevice %t.aoco |
| 11 | +// RUN: llc -filetype=obj -o %t-aoco.o %t-aoco.bc |
| 12 | +// RUN: clang-offload-wrapper -o %t-aoco_cl.bc -host=x86_64-unknown-linux-gnu -kind=sycl -target=fpga_aoco-intel-unknown-sycldevice %t.aoco |
| 13 | +// RUN: llc -filetype=obj -o %t-aoco_cl.o %t-aoco_cl.bc |
| 14 | +// RUN: llvm-ar crv %t_aoco.a %t.o %t2.o %t-aoco.o |
| 15 | +// RUN: llvm-ar crv %t_aoco_cl.a %t.o %t2_cl.o %t-aoco_cl.o |
| 16 | +// RUN: %clangxx -target x86_64-unknown-linux-gnu -fsycl -fno-sycl-device-lib=all -fintelfpga %t_aoco.a %s -### -ccc-print-phases 2>&1 \ |
| 17 | +// RUN: | FileCheck -check-prefix=CHK-FPGA-AOCO-PHASES %s |
| 18 | +// CHK-FPGA-AOCO-PHASES: 0: input, "[[INPUTA:.+\.a]]", object, (host-sycl) |
| 19 | +// CHK-FPGA-AOCO-PHASES: 1: input, "[[INPUTCPP:.+\.cpp]]", c++, (host-sycl) |
| 20 | +// CHK-FPGA-AOCO-PHASES: 2: preprocessor, {1}, c++-cpp-output, (host-sycl) |
| 21 | +// CHK-FPGA-AOCO-PHASES: 3: input, "[[INPUTCPP]]", c++, (device-sycl) |
| 22 | +// CHK-FPGA-AOCO-PHASES: 4: preprocessor, {3}, c++-cpp-output, (device-sycl) |
| 23 | +// CHK-FPGA-AOCO-PHASES: 5: compiler, {4}, sycl-header, (device-sycl) |
| 24 | +// CHK-FPGA-AOCO-PHASES: 6: offload, "host-sycl (x86_64-unknown-linux-gnu)" {2}, "device-sycl (spir64_fpga-unknown-unknown-sycldevice)" {5}, c++-cpp-output |
| 25 | +// CHK-FPGA-AOCO-PHASES: 7: compiler, {6}, ir, (host-sycl) |
| 26 | +// CHK-FPGA-AOCO-PHASES: 8: backend, {7}, assembler, (host-sycl) |
| 27 | +// CHK-FPGA-AOCO-PHASES: 9: assembler, {8}, object, (host-sycl) |
| 28 | +// CHK-FPGA-AOCO-PHASES: 10: linker, {0, 9}, image, (host-sycl) |
| 29 | +// CHK-FPGA-AOCO-PHASES: 11: compiler, {4}, ir, (device-sycl) |
| 30 | +// CHK-FPGA-AOCO-PHASES: 12: input, "[[INPUTA]]", archive |
| 31 | +// CHK-FPGA-AOCO-PHASES: 13: partial-link, {9, 12}, object |
| 32 | +// CHK-FPGA-AOCO-PHASES: 14: clang-offload-unbundler, {13}, object |
| 33 | +// CHK-FPGA-AOCO-PHASES: 15: linker, {11, 14}, ir, (device-sycl) |
| 34 | +// CHK-FPGA-AOCO-PHASES: 16: sycl-post-link, {15}, ir, (device-sycl) |
| 35 | +// CHK-FPGA-AOCO-PHASES: 17: llvm-spirv, {16}, spirv, (device-sycl) |
| 36 | +// CHK-FPGA-AOCO-PHASES: 18: input, "[[INPUTA]]", archive |
| 37 | +// CHK-FPGA-AOCO-PHASES: 19: clang-offload-unbundler, {18}, fpga_dependencies_list |
| 38 | +// CHK-FPGA-AOCO-PHASES: 20: input, "[[INPUTA]]", fpga_aoco |
| 39 | +// CHK-FPGA-AOCO-PHASES: 21: clang-offload-unbundler, {20}, fpga_aoco |
| 40 | +// CHK-FPGA-AOCO-PHASES: 22: backend-compiler, {17, 19, 21}, fpga_aocx, (device-sycl) |
| 41 | +// CHK-FPGA-AOCO-PHASES: 23: clang-offload-wrapper, {22}, object, (device-sycl) |
| 42 | +// CHK-FPGA-AOCO-PHASES: 24: offload, "host-sycl (x86_64-unknown-linux-gnu)" {10}, "device-sycl (spir64_fpga-unknown-unknown-sycldevice)" {23}, image |
| 43 | + |
| 44 | +/// FPGA AOCO Windows phases check |
| 45 | +// RUN: %clang_cl -fsycl -fno-sycl-device-lib=all -fintelfpga -foffload-static-lib=%t_aoco_cl.a %s -### -ccc-print-phases 2>&1 \ |
| 46 | +// RUN: | FileCheck -check-prefixes=CHK-FPGA-AOCO-PHASES-WIN %s |
| 47 | +// CHK-FPGA-AOCO-PHASES-WIN: 0: input, "{{.*}}", object, (host-sycl) |
| 48 | +// CHK-FPGA-AOCO-PHASES-WIN: 1: input, "[[INPUTSRC:.+\.cpp]]", c++, (host-sycl) |
| 49 | +// CHK-FPGA-AOCO-PHASES-WIN: 2: preprocessor, {1}, c++-cpp-output, (host-sycl) |
| 50 | +// CHK-FPGA-AOCO-PHASES-WIN: 3: input, "[[INPUTSRC]]", c++, (device-sycl) |
| 51 | +// CHK-FPGA-AOCO-PHASES-WIN: 4: preprocessor, {3}, c++-cpp-output, (device-sycl) |
| 52 | +// CHK-FPGA-AOCO-PHASES-WIN: 5: compiler, {4}, sycl-header, (device-sycl) |
| 53 | +// CHK-FPGA-AOCO-PHASES-WIN: 6: offload, "host-sycl (x86_64-pc-windows-msvc)" {2}, "device-sycl (spir64_fpga-unknown-unknown-sycldevice)" {5}, c++-cpp-output |
| 54 | +// CHK-FPGA-AOCO-PHASES-WIN: 7: compiler, {6}, ir, (host-sycl) |
| 55 | +// CHK-FPGA-AOCO-PHASES-WIN: 8: backend, {7}, assembler, (host-sycl) |
| 56 | +// CHK-FPGA-AOCO-PHASES-WIN: 9: assembler, {8}, object, (host-sycl) |
| 57 | +// CHK-FPGA-AOCO-PHASES-WIN: 10: linker, {0, 9}, image, (host-sycl) |
| 58 | +// CHK-FPGA-AOCO-PHASES-WIN: 11: compiler, {4}, ir, (device-sycl) |
| 59 | +// CHK-FPGA-AOCO-PHASES-WIN: 12: input, "[[INPUTA:.+\.a]]", archive |
| 60 | +// CHK-FPGA-AOCO-PHASES-WIN: 13: clang-offload-unbundler, {12}, archive |
| 61 | +// CHK-FPGA-AOCO-PHASES-WIN: 14: linker, {11, 13}, ir, (device-sycl) |
| 62 | +// CHK-FPGA-AOCO-PHASES-WIN: 15: sycl-post-link, {14}, ir, (device-sycl) |
| 63 | +// CHK-FPGA-AOCO-PHASES-WIN: 16: llvm-spirv, {15}, spirv, (device-sycl) |
| 64 | +// CHK-FPGA-AOCO-PHASES-WIN: 17: input, "[[INPUTA]]", archive |
| 65 | +// CHK-FPGA-AOCO-PHASES-WIN: 18: clang-offload-unbundler, {17}, fpga_dependencies_list |
| 66 | +// CHK-FPGA-AOCO-PHASES-WIN: 19: input, "[[INPUTA]]", fpga_aoco |
| 67 | +// CHK-FPGA-AOCO-PHASES-WIN: 20: clang-offload-unbundler, {19}, fpga_aoco |
| 68 | +// CHK-FPGA-AOCO-PHASES-WIN: 21: backend-compiler, {16, 18, 20}, fpga_aocx, (device-sycl) |
| 69 | +// CHK-FPGA-AOCO-PHASES-WIN: 22: clang-offload-wrapper, {21}, object, (device-sycl) |
| 70 | +// CHK-FPGA-AOCO-PHASES-WIN: 23: offload, "host-sycl (x86_64-pc-windows-msvc)" {10}, "device-sycl (spir64_fpga-unknown-unknown-sycldevice)" {22}, image |
| 71 | + |
| 72 | +/// aoco test, checking tools |
| 73 | +// RUN: %clangxx -target x86_64-unknown-linux-gnu -fsycl -fno-sycl-device-lib=all -fintelfpga -foffload-static-lib=%t_aoco.a -### %s 2>&1 \ |
| 74 | +// RUN: | FileCheck -check-prefixes=CHK-FPGA-AOCO,CHK-FPGA-AOCO-LIN %s |
| 75 | +// RUN: %clangxx -target x86_64-unknown-linux-gnu -fsycl -fno-sycl-device-lib=all -fintelfpga %t_aoco.a -### %s 2>&1 \ |
| 76 | +// RUN: | FileCheck -check-prefixes=CHK-FPGA-AOCO,CHK-FPGA-AOCO-LIN %s |
| 77 | +// RUN: %clang_cl -fsycl -fno-sycl-device-lib=all -fintelfpga -foffload-static-lib=%t_aoco_cl.a -### %s 2>&1 \ |
| 78 | +// RUN: | FileCheck -check-prefixes=CHK-FPGA-AOCO,CHK-FPGA-AOCO-WIN %s |
| 79 | +// RUN: %clang_cl -fsycl -fno-sycl-device-lib=all -fintelfpga %t_aoco_cl.a -### %s 2>&1 \ |
| 80 | +// RUN: | FileCheck -check-prefixes=CHK-FPGA-AOCO,CHK-FPGA-AOCO-WIN %s |
| 81 | +// CHK-FPGA-AOCO-LIN: clang-offload-bundler{{.*}} "-type=ao" "-targets=sycl-fpga_aoco-intel-unknown-sycldevice" "-inputs=[[INPUTLIB:.+\.a]]" "-check-section" |
| 82 | +// CHK-FPGA-AOCO-LIN: clang{{.*}} "-emit-obj" {{.*}} "-o" "[[HOSTOBJ:.+\.o]]" |
| 83 | +// CHK-FPGA-AOCO-LIN: ld{{.*}} "-r" "-o" "[[PARTLINKOBJ:.+\.o]]" "{{.*}}crt1.o" "{{.*}}crti.o" {{.*}} "[[HOSTOBJ]]" "[[INPUTLIB]]" "{{.*}}crtn.o" |
| 84 | +// CHK-FPGA-AOCO-LIN: clang-offload-bundler{{.*}} "-type=oo" "-targets=sycl-spir64_fpga-unknown-unknown-sycldevice" "-inputs=[[PARTLINKOBJ]]" "-outputs={{.*}}" "-unbundle" |
| 85 | +// CHK-FPGA-AOCO-WIN: clang-offload-bundler{{.*}} "-type=aoo" "-targets=sycl-spir64_fpga-unknown-unknown-sycldevice" "-inputs=[[INPUTLIB:.+\.a]]" "-outputs={{.*}}" "-unbundle" |
| 86 | +// CHK-FPGA-AOCO: llvm-link{{.*}} "@{{.*}}" "-o" "[[LINKEDBC:.+\.bc]]" |
| 87 | +// CHK-FPGA-AOCO: sycl-post-link{{.*}} "-ir-output-only" "-spec-const=default" "-o" "[[PLINKEDBC:.+\.bc]]" "[[LINKEDBC]]" |
| 88 | +// CHK-FPGA-AOCO: llvm-spirv{{.*}} "-o" "[[TARGSPV:.+\.spv]]" {{.*}} "[[PLINKEDBC]]" |
| 89 | +// CHK-FPGA-AOCO: clang-offload-bundler{{.*}} "-type=aoo" "-targets=sycl-fpga_aoco-intel-unknown-sycldevice" "-inputs=[[INPUTLIB]]" "-outputs=[[AOCOLIST:.+\.txt]]" "-unbundle" |
| 90 | +// CHK-FPGA-AOCO: aoc{{.*}} "-o" "[[AOCXOUT:.+\.aocx]]" "[[TARGSPV]]" "-library-list=[[AOCOLIST]]" "-sycl" |
| 91 | +// CHK-FPGA-AOCO: clang-offload-wrapper{{.*}} "-o=[[FINALBC:.+\.bc]]" {{.*}} "-target=spir64_fpga" "-kind=sycl" "[[AOCXOUT]]" |
| 92 | +// CHK-FPGA-AOCO-LIN: llc{{.*}} "-filetype=obj" "-o" "[[FINALOBJL:.+\.o]]" "[[FINALBC]]" |
| 93 | +// CHK-FPGA-AOCO-WIN: llc{{.*}} "-filetype=obj" "-o" "[[FINALOBJW:.+\.obj]]" "[[FINALBC]]" |
| 94 | +// CHK-FPGA-AOCO-LIN: ld{{.*}} "[[INPUTLIB]]" {{.*}} "[[FINALOBJL]]" |
| 95 | +// CHK-FPGA-AOCO-WIN: link.exe{{.*}} "{{.*}}[[INPUTLIB]]" {{.*}} "[[FINALOBJW]]" |
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