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[X86] getFauxShuffleMask - merge insertelement paths
Merge the INSERT_VECTOR_ELT/SCALAR_TO_VECTOR and PINSRW/PINSRB shuffle mask paths - they both do the same thing (find source vector + handle implicit zero extension). The PINSRW/PINSRB path also handled in the insertion of zero case which needed to be added to the general case as well.
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llvm/lib/Target/X86/X86ISelLowering.cpp

Lines changed: 22 additions & 50 deletions
Original file line numberDiff line numberDiff line change
@@ -7373,15 +7373,34 @@ static bool getFauxShuffleMask(SDValue N, const APInt &DemandedElts,
73737373
}
73747374
return true;
73757375
}
7376+
case X86ISD::PINSRB:
7377+
case X86ISD::PINSRW:
73767378
case ISD::SCALAR_TO_VECTOR:
73777379
case ISD::INSERT_VECTOR_ELT: {
73787380
// Match against a insert_vector_elt/scalar_to_vector of an extract from a
73797381
// vector, for matching src/dst vector types.
7380-
// TODO: Merge with PINSRB/PINSRW cases below.
7381-
// TODO: Handle truncate/zext/shift of scalars.
73827382
SDValue Scl = N.getOperand(Opcode == ISD::SCALAR_TO_VECTOR ? 0 : 1);
7383-
SDValue SrcExtract;
73847383

7384+
unsigned DstIdx = 0;
7385+
if (Opcode != ISD::SCALAR_TO_VECTOR) {
7386+
// Check we have an in-range constant insertion index.
7387+
if (!isa<ConstantSDNode>(N.getOperand(2)) ||
7388+
N.getConstantOperandAPInt(2).uge(NumElts))
7389+
return false;
7390+
DstIdx = N.getConstantOperandVal(2);
7391+
7392+
// Attempt to recognise an INSERT*(VEC, 0, DstIdx) shuffle pattern.
7393+
if (X86::isZeroNode(Scl)) {
7394+
Ops.push_back(N.getOperand(0));
7395+
for (unsigned i = 0; i != NumElts; ++i)
7396+
Mask.push_back(i == DstIdx ? SM_SentinelZero : (int)i);
7397+
return true;
7398+
}
7399+
}
7400+
7401+
// Attempt to find the source vector the scalar was extracted from.
7402+
// TODO: Handle truncate/zext/shift of scalars.
7403+
SDValue SrcExtract;
73857404
if ((Scl.getOpcode() == ISD::EXTRACT_VECTOR_ELT &&
73867405
Scl.getOperand(0).getValueType() == VT) ||
73877406
(Scl.getOpcode() == X86ISD::PEXTRW &&
@@ -7390,12 +7409,8 @@ static bool getFauxShuffleMask(SDValue N, const APInt &DemandedElts,
73907409
Scl.getOperand(0).getValueType() == MVT::v16i8)) {
73917410
SrcExtract = Scl;
73927411
}
7393-
73947412
if (!SrcExtract || !isa<ConstantSDNode>(SrcExtract.getOperand(1)))
73957413
return false;
7396-
if (Opcode != ISD::SCALAR_TO_VECTOR &&
7397-
!isa<ConstantSDNode>(N.getOperand(2)))
7398-
return false;
73997414

74007415
SDValue SrcVec = SrcExtract.getOperand(0);
74017416
EVT SrcVT = SrcVec.getValueType();
@@ -7411,11 +7426,6 @@ static bool getFauxShuffleMask(SDValue N, const APInt &DemandedElts,
74117426
if (NumSrcElts <= SrcIdx)
74127427
return false;
74137428

7414-
unsigned DstIdx =
7415-
Opcode == ISD::SCALAR_TO_VECTOR ? 0 : N.getConstantOperandVal(2);
7416-
if (NumElts <= DstIdx)
7417-
return false;
7418-
74197429
if (Opcode == ISD::SCALAR_TO_VECTOR) {
74207430
Ops.push_back(SrcVec);
74217431
Mask.append(NumSrcElts, SM_SentinelUndef);
@@ -7432,44 +7442,6 @@ static bool getFauxShuffleMask(SDValue N, const APInt &DemandedElts,
74327442
Mask[(Scale * DstIdx) + i + 1] = SM_SentinelZero;
74337443
return true;
74347444
}
7435-
case X86ISD::PINSRB:
7436-
case X86ISD::PINSRW: {
7437-
SDValue InVec = N.getOperand(0);
7438-
SDValue InScl = N.getOperand(1);
7439-
SDValue InIndex = N.getOperand(2);
7440-
if (!isa<ConstantSDNode>(InIndex) ||
7441-
cast<ConstantSDNode>(InIndex)->getAPIntValue().uge(NumElts))
7442-
return false;
7443-
uint64_t InIdx = N.getConstantOperandVal(2);
7444-
7445-
// Attempt to recognise a PINSR*(VEC, 0, Idx) shuffle pattern.
7446-
if (X86::isZeroNode(InScl)) {
7447-
Ops.push_back(InVec);
7448-
for (unsigned i = 0; i != NumElts; ++i)
7449-
Mask.push_back(i == InIdx ? SM_SentinelZero : (int)i);
7450-
return true;
7451-
}
7452-
7453-
// Attempt to recognise a PINSR*(PEXTR*) shuffle pattern.
7454-
// TODO: Expand this to support INSERT_VECTOR_ELT/etc.
7455-
unsigned ExOp =
7456-
(X86ISD::PINSRB == Opcode ? X86ISD::PEXTRB : X86ISD::PEXTRW);
7457-
if (InScl.getOpcode() != ExOp)
7458-
return false;
7459-
7460-
SDValue ExVec = InScl.getOperand(0);
7461-
SDValue ExIndex = InScl.getOperand(1);
7462-
if (!isa<ConstantSDNode>(ExIndex) ||
7463-
cast<ConstantSDNode>(ExIndex)->getAPIntValue().uge(NumElts))
7464-
return false;
7465-
uint64_t ExIdx = InScl.getConstantOperandVal(1);
7466-
7467-
Ops.push_back(InVec);
7468-
Ops.push_back(ExVec);
7469-
for (unsigned i = 0; i != NumElts; ++i)
7470-
Mask.push_back(i == InIdx ? NumElts + ExIdx : i);
7471-
return true;
7472-
}
74737445
case X86ISD::PACKSS:
74747446
case X86ISD::PACKUS: {
74757447
SDValue N0 = N.getOperand(0);

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