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[AArch64] Teach the AArch64 backend patterns to generate the RAX1 instruction.
Differential Revision: https://reviews.llvm.org/D147887
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llvm/lib/Target/AArch64/AArch64InstrInfo.td

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@@ -1273,6 +1273,8 @@ def : Pat<(v2i64 (int_aarch64_crypto_rax1 (v2i64 V128:$Vn), (v2i64 V128:$Vm))),
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def : Pat<(v2i64 (int_aarch64_crypto_xar (v2i64 V128:$Vn), (v2i64 V128:$Vm), (i64 timm0_63:$imm))),
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(XAR (v2i64 V128:$Vn), (v2i64 V128:$Vm), (timm0_63:$imm))>;
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def : Pat<(xor (v2i64 V128:$Vn), (or (AArch64vlshr (v2i64 V128:$Vm), (i32 63)), (AArch64vshl (v2i64 V128:$Vm), (i32 1)))),
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(RAX1 (v2i64 V128:$Vn), (v2i64 V128:$Vm))>;
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} // HasSHA3
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llvm/test/CodeGen/AArch64/rax1.ll

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; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py UTC_ARGS: --version 2
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; RUN: llc -mtriple=aarch64-none-eabi -mattr=+sha3 < %s | FileCheck --check-prefix=SHA3 %s
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; RUN: llc -mtriple=aarch64-none-eabi -mattr=-sha3 < %s | FileCheck --check-prefix=NOSHA3 %s
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define <2 x i64> @rax1(<2 x i64> %x, <2 x i64> %y) {
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; SHA3-LABEL: rax1:
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; SHA3: // %bb.0:
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; SHA3-NEXT: rax1 v0.2d, v0.2d, v1.2d
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; SHA3-NEXT: ret
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;
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; NOSHA3-LABEL: rax1:
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; NOSHA3: // %bb.0:
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; NOSHA3-NEXT: ushr v2.2d, v1.2d, #63
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; NOSHA3-NEXT: shl v1.2d, v1.2d, #1
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; NOSHA3-NEXT: orr v1.16b, v1.16b, v2.16b
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; NOSHA3-NEXT: eor v0.16b, v0.16b, v1.16b
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; NOSHA3-NEXT: ret
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%a = call <2 x i64> @llvm.fshl.v2i64(<2 x i64> %y, <2 x i64> %y, <2 x i64> <i64 1, i64 1>)
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%b = xor <2 x i64> %x, %a
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ret <2 x i64> %b
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}
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declare <2 x i64> @llvm.fshl.v2i64(<2 x i64>, <2 x i64>, <2 x i64>)

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