Move additional register names to their own lookup, separate from

register aliases. Fixes unnecessary renames of clobbers.

Fixes part of rdar://9425559

llvm-svn: 133485

Author: echristo

clang/include/clang/Basic/TargetInfo.h

@@ -396,6 +396,11 @@ class TargetInfo : public llvm::RefCountedBase<TargetInfo> {
     const char * const Register;
   };
 
+  struct AddlRegName {
+    const char * const Names[5];
+    const unsigned RegNum;
+  };
+
   virtual bool useGlobalsForAutomaticVariables() const { return false; }
 
   /// getCFStringSection - Return the section to use for CFString
@@ -566,6 +571,11 @@ class TargetInfo : public llvm::RefCountedBase<TargetInfo> {
                               unsigned &NumNames) const = 0;
   virtual void getGCCRegAliases(const GCCRegAlias *&Aliases,
                                 unsigned &NumAliases) const = 0;
+  virtual void getGCCAddlRegNames(const AddlRegName *&Addl,
+				  unsigned &NumAddl) const {
+    Addl = 0;
+    NumAddl = 0;
+  }
   virtual bool validateAsmConstraint(const char *&Name,
                                      TargetInfo::ConstraintInfo &info) const= 0;
 };

clang/lib/Basic/TargetInfo.cpp

@@ -212,6 +212,20 @@ bool TargetInfo::isValidGCCRegisterName(llvm::StringRef Name) const {
       return true;
   }
 
+  // Check any additional names that we have.
+  const AddlRegName *AddlNames;
+  unsigned NumAddlNames;
+  getGCCAddlRegNames(AddlNames, NumAddlNames);
+  for (unsigned i = 0; i < NumAddlNames; i++)
+    for (unsigned j = 0; j < llvm::array_lengthof(AddlNames[i].Names); j++) {
+      if (!AddlNames[i].Names[j])
+	break;
+      // Make sure the register that the additional name is for is within
+      // the bounds of the register names from above.
+      if (AddlNames[i].Names[j] == Name && AddlNames[i].RegNum < NumNames)
+	return true;
+  }
+
   // Now check aliases.
   const GCCRegAlias *Aliases;
   unsigned NumAliases;
@@ -251,6 +265,20 @@ TargetInfo::getNormalizedGCCRegisterName(llvm::StringRef Name) const {
     }
   }
 
+  // Check any additional names that we have.
+  const AddlRegName *AddlNames;
+  unsigned NumAddlNames;
+  getGCCAddlRegNames(AddlNames, NumAddlNames);
+  for (unsigned i = 0; i < NumAddlNames; i++)
+    for (unsigned j = 0; j < llvm::array_lengthof(AddlNames[i].Names); j++) {
+      if (!AddlNames[i].Names[j])
+	break;
+      // Make sure the register that the additional name is for is within
+      // the bounds of the register names from above.
+      if (AddlNames[i].Names[j] == Name && AddlNames[i].RegNum < NumNames)
+	return Name;
+    }
+
   // Now check aliases.
   const GCCRegAlias *Aliases;
   unsigned NumAliases;

clang/lib/Basic/Targets.cpp

@@ -526,7 +526,6 @@ class PPCTargetInfo : public TargetInfo {
   static const Builtin::Info BuiltinInfo[];
   static const char * const GCCRegNames[];
   static const TargetInfo::GCCRegAlias GCCRegAliases[];
-
 public:
   PPCTargetInfo(const std::string& triple) : TargetInfo(triple) {}
 
@@ -1085,18 +1084,18 @@ static const char* const GCCRegNames[] = {
   "xmm0", "xmm1", "xmm2", "xmm3", "xmm4", "xmm5", "xmm6", "xmm7",
   "mm0", "mm1", "mm2", "mm3", "mm4", "mm5", "mm6", "mm7",
   "r8", "r9", "r10", "r11", "r12", "r13", "r14", "r15",
-  "xmm8", "xmm9", "xmm10", "xmm11", "xmm12", "xmm13", "xmm14", "xmm15"
+  "xmm8", "xmm9", "xmm10", "xmm11", "xmm12", "xmm13", "xmm14", "xmm15",
 };
 
-const TargetInfo::GCCRegAlias GCCRegAliases[] = {
-  { { "al", "ah", "eax", "rax" }, "ax" },
-  { { "bl", "bh", "ebx", "rbx" }, "bx" },
-  { { "cl", "ch", "ecx", "rcx" }, "cx" },
-  { { "dl", "dh", "edx", "rdx" }, "dx" },
-  { { "esi", "rsi" }, "si" },
-  { { "edi", "rdi" }, "di" },
-  { { "esp", "rsp" }, "sp" },
-  { { "ebp", "rbp" }, "bp" },
+const TargetInfo::AddlRegName AddlRegNames[] = {
+  { { "al", "ah", "eax", "rax" }, 0 },
+  { { "bl", "bh", "ebx", "rbx" }, 3 },
+  { { "cl", "ch", "ecx", "rcx" }, 2 },
+  { { "dl", "dh", "edx", "rdx" }, 1 },
+  { { "esi", "rsi" }, 4 },
+  { { "edi", "rdi" }, 5 },
+  { { "esp", "rsp" }, 7 },
+  { { "ebp", "rbp" }, 6 },
 };
 
 // X86 target abstract base class; x86-32 and x86-64 are very close, so
@@ -1130,8 +1129,13 @@ class X86TargetInfo : public TargetInfo {
   }
   virtual void getGCCRegAliases(const GCCRegAlias *&Aliases,
                                 unsigned &NumAliases) const {
-    Aliases = GCCRegAliases;
-    NumAliases = llvm::array_lengthof(GCCRegAliases);
+    Aliases = 0;
+    NumAliases = 0;
+  }
+  virtual void getGCCAddlRegNames(const AddlRegName *&Names,
+				  unsigned &NumNames) const {
+    Names = AddlRegNames;
+    NumNames = llvm::array_lengthof(AddlRegNames);
   }
   virtual bool validateAsmConstraint(const char *&Name,
                                      TargetInfo::ConstraintInfo &info) const;

clang/test/CodeGen/asm-inout.c

@@ -21,7 +21,7 @@ void test2() {
 // PR7338
 void test3(int *vout, int vin)
 {
-  // CHECK: call void asm "opr $0,$1", "=*r|m|r,r|m|r,~{di},~{dirflag},~{fpsr},~{flags}"
+  // CHECK: call void asm "opr $0,$1", "=*r|m|r,r|m|r,~{edi},~{dirflag},~{fpsr},~{flags}"
 asm(
 		"opr %[vout],%[vin]"
 		: [vout] "=r,=m,=r" (*vout)
@@ -37,4 +37,3 @@ int test4(volatile int *addr) {
   return (int)oldval;
 // CHECK: call i8 asm "frob $0", "=r,0{{.*}}"(i8 -1)
 }
-