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[RISCV] Support 'generic' as a valid CPU name.
Most other targets support 'generic', but RISCV issues an error. This can require a special case in tools that use LLVM that aren't clang. This patch treats "generic" the same as an empty string and remaps it to generic-rv/rv64 based on the triple. Unfortunately, it has to be added to RISCV.td because MCSubtargetInfo is constructed and parses the CPU before RISCVSubtarget's constructor gets a chance to remap it. The CPU will then reparsed and the state in the MCSubtargetInfo subclass will be updated again. Fixes PR54146. Reviewed By: khchen Differential Revision: https://reviews.llvm.org/D121149
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llvm/lib/Target/RISCV/MCTargetDesc/RISCVMCTargetDesc.cpp

Lines changed: 1 addition & 4 deletions
Original file line numberDiff line numberDiff line change
@@ -77,11 +77,8 @@ createRISCVMCObjectFileInfo(MCContext &Ctx, bool PIC,
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static MCSubtargetInfo *createRISCVMCSubtargetInfo(const Triple &TT,
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StringRef CPU, StringRef FS) {
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if (CPU.empty())
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if (CPU.empty() || CPU == "generic")
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CPU = TT.isArch64Bit() ? "generic-rv64" : "generic-rv32";
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if (CPU == "generic")
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report_fatal_error(Twine("CPU 'generic' is not supported. Use ") +
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(TT.isArch64Bit() ? "generic-rv64" : "generic-rv32"));
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return createRISCVMCSubtargetInfoImpl(TT, CPU, /*TuneCPU*/ CPU, FS);
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}
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llvm/lib/Target/RISCV/RISCV.td

Lines changed: 3 additions & 0 deletions
Original file line numberDiff line numberDiff line change
@@ -452,6 +452,9 @@ include "RISCVSchedSiFive7.td"
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def : ProcessorModel<"generic-rv32", NoSchedModel, []>;
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def : ProcessorModel<"generic-rv64", NoSchedModel, [Feature64Bit]>;
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// Support generic for compatibility with other targets. The triple will be used
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// to change to the appropriate rv32/rv64 version.
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def : ProcessorModel<"generic", NoSchedModel, []>;
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def : ProcessorModel<"rocket-rv32", RocketModel, []>;
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def : ProcessorModel<"rocket-rv64", RocketModel, [Feature64Bit]>;

llvm/lib/Target/RISCV/RISCVSubtarget.cpp

Lines changed: 1 addition & 4 deletions
Original file line numberDiff line numberDiff line change
@@ -69,11 +69,8 @@ RISCVSubtarget::initializeSubtargetDependencies(const Triple &TT, StringRef CPU,
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StringRef ABIName) {
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// Determine default and user-specified characteristics
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bool Is64Bit = TT.isArch64Bit();
72-
if (CPU.empty())
72+
if (CPU.empty() || CPU == "generic")
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CPU = Is64Bit ? "generic-rv64" : "generic-rv32";
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if (CPU == "generic")
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report_fatal_error(Twine("CPU 'generic' is not supported. Use ") +
76-
(Is64Bit ? "generic-rv64" : "generic-rv32"));
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7875
if (TuneCPU.empty())
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TuneCPU = CPU;

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