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This repository was archived by the owner on Aug 9, 2022. It is now read-only.

Commit 12630be

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arjanmelsarjanmels
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Updated prelude & timer example
1 parent 9f2fcd8 commit 12630be

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+68
-77
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2 files changed

+68
-77
lines changed

‎examples/timer.rs

Lines changed: 64 additions & 77 deletions
Original file line numberDiff line numberDiff line change
@@ -1,43 +1,34 @@
11
#![no_std]
22
#![no_main]
33

4-
use core::fmt::Write;
5-
use core::panic::PanicInfo;
6-
7-
use esp32_hal::prelude::*;
8-
9-
use core::cell::RefCell;
10-
use core::ops::DerefMut;
11-
use embedded_hal::timer::{Cancel, CountDown};
12-
use esp32_hal::clock_control::sleep;
13-
use esp32_hal::dport::Split;
14-
use esp32_hal::dprintln;
15-
use esp32_hal::interrupt::{Interrupt, InterruptLevel};
16-
use esp32_hal::serial::{config::Config, NoRx, NoTx, Serial};
17-
use esp32_hal::target;
18-
use esp32_hal::timer::watchdog::{self, WatchDogResetDuration, WatchdogAction, WatchdogConfig};
19-
use esp32_hal::timer::{Timer, Timer0, Timer1, TimerLact, TimerWithInterrupt};
20-
use esp32_hal::Core::PRO;
21-
use spin::Mutex;
4+
use core::{fmt::Write, panic::PanicInfo};
5+
6+
use esp32_hal::{
7+
clock_control::sleep,
8+
dport::Split,
9+
dprintln,
10+
interrupt::{Interrupt, InterruptLevel},
11+
prelude::*,
12+
serial::{config::Config, NoRx, NoTx, Serial},
13+
timer::{
14+
watchdog::{self, WatchDogResetDuration, WatchdogAction, WatchdogConfig},
15+
Timer, Timer0, Timer1, TimerLact, TimerWithInterrupt,
16+
},
17+
Core::PRO,
18+
};
2219

2320
const BLINK_HZ: Hertz = Hertz(2);
2421

25-
static TIMER0: Mutex<RefCell<Option<Timer<target::TIMG0, Timer0>>>> =
26-
Mutex::new(RefCell::new(None));
27-
static TIMER2: Mutex<RefCell<Option<Timer<target::TIMG0, TimerLact>>>> =
28-
Mutex::new(RefCell::new(None));
29-
static TIMER3: Mutex<RefCell<Option<Timer<target::TIMG1, Timer0>>>> =
30-
Mutex::new(RefCell::new(None));
31-
static TIMER4: Mutex<RefCell<Option<Timer<target::TIMG1, Timer1>>>> =
32-
Mutex::new(RefCell::new(None));
33-
static TIMER5: Mutex<RefCell<Option<Timer<target::TIMG1, TimerLact>>>> =
34-
Mutex::new(RefCell::new(None));
35-
36-
static WATCHDOG1: Mutex<RefCell<Option<watchdog::Watchdog<target::TIMG1>>>> =
37-
Mutex::new(RefCell::new(None));
38-
static TX: Mutex<Option<esp32_hal::serial::Tx<target::UART0>>> = spin::Mutex::new(None);
39-
40-
#[no_mangle]
22+
static TIMER0: MPMutex<Option<Timer<esp32::TIMG0, Timer0>>> = MPMutex::new(None);
23+
static TIMER1: MPMutex<Option<Timer<esp32::TIMG0, Timer1>>> = MPMutex::new(None);
24+
static TIMER2: MPMutex<Option<Timer<esp32::TIMG0, TimerLact>>> = MPMutex::new(None);
25+
static TIMER3: MPMutex<Option<Timer<esp32::TIMG1, Timer0>>> = MPMutex::new(None);
26+
static TIMER4: MPMutex<Option<Timer<esp32::TIMG1, Timer1>>> = MPMutex::new(None);
27+
static TIMER5: MPMutex<Option<Timer<esp32::TIMG1, TimerLact>>> = MPMutex::new(None);
28+
static WATCHDOG1: MPMutex<Option<watchdog::Watchdog<esp32::TIMG1>>> = MPMutex::new(None);
29+
static TX: MPMutex<Option<esp32_hal::serial::Tx<esp32::UART0>>> = MPMutex::new(None);
30+
31+
#[entry]
4132
fn main() -> ! {
4233
let dp = target::Peripherals::take().unwrap();
4334

@@ -74,7 +65,7 @@ fn main() -> ! {
7465

7566
watchdog1.set_config(&wdconfig).unwrap();
7667

77-
*WATCHDOG1.lock().borrow_mut() = Some(watchdog1);
68+
(&WATCHDOG1).lock(|data| *data = Some(watchdog1));
7869

7970
let config = Config {
8071
baudrate: Hertz(115_200),
@@ -98,7 +89,6 @@ fn main() -> ! {
9889

9990
writeln!(tx, "Waiting for timer0").unwrap();
10091
nb::block!(timer0.wait()).unwrap();
101-
10292
writeln!(tx, "Finished waiting for timer0").unwrap();
10393

10494
timer0.listen(esp32_hal::timer::Event::TimeOut);
@@ -111,12 +101,14 @@ fn main() -> ! {
111101
timer4.listen(esp32_hal::timer::Event::TimeOut);
112102
timer5.listen(esp32_hal::timer::Event::TimeOut);
113103

114-
*TIMER0.lock().borrow_mut() = Some(timer0);
115-
*TIMER2.lock().borrow_mut() = Some(timer2);
116-
*TIMER3.lock().borrow_mut() = Some(timer3);
117-
*TIMER4.lock().borrow_mut() = Some(timer4);
118-
*TIMER5.lock().borrow_mut() = Some(timer5);
119-
*TX.lock() = Some(tx);
104+
(&TIMER0).lock(|data| *data = Some(timer0));
105+
(&TIMER1).lock(|data| *data = Some(timer1));
106+
(&TIMER2).lock(|data| *data = Some(timer2));
107+
(&TIMER3).lock(|data| *data = Some(timer3));
108+
(&TIMER4).lock(|data| *data = Some(timer4));
109+
(&TIMER5).lock(|data| *data = Some(timer5));
110+
111+
(&TX).lock(|data| *data = Some(tx));
120112

121113
interrupt::enable_with_priority(PRO, Interrupt::TG0_T0_LEVEL_INTR, InterruptLevel(1)).unwrap();
122114
interrupt::enable_with_priority(PRO, Interrupt::TG0_T0_EDGE_INTR, InterruptLevel(1)).unwrap();
@@ -136,28 +128,25 @@ fn main() -> ! {
136128
let mut x = 0;
137129
loop {
138130
x = x + 1;
139-
interrupt::free(|_| {
140-
if let Some(ref mut timer0) = TIMER0.lock().borrow_mut().deref_mut() {
141-
if let Some(ref mut timer2) = TIMER2.lock().borrow_mut().deref_mut() {
142-
if let Some(ref mut tx) = TX.lock().deref_mut() {
143-
writeln!(
144-
tx,
145-
"Loop: {} {:.3} {} {} {} {}",
146-
x,
147-
u64::from(clkcntrl_config.rtc_nanoseconds()) as f64 / 1000000000.0,
148-
timer0.get_value(),
149-
timer1.get_value(),
150-
timer2.get_value(),
151-
xtensa_lx6::timer::get_cycle_count()
152-
)
153-
.unwrap();
154-
if let Ok(_) = timer1.wait() {
155-
writeln!(tx, "CANCELLING Timers").unwrap();
156-
timer0.cancel().unwrap();
157-
timer1.cancel().unwrap();
158-
}
159-
}
160-
}
131+
(&TX, &TIMER0, &TIMER1, &TIMER2).lock(|tx, timer0, timer1, timer2| {
132+
let tx = tx.as_mut().unwrap();
133+
let timer0 = timer0.as_mut().unwrap();
134+
let timer1 = timer1.as_mut().unwrap();
135+
let timer2 = timer2.as_mut().unwrap();
136+
writeln!(
137+
tx,
138+
"Loop: {} {} {} {} {}",
139+
x,
140+
timer0.get_value(),
141+
timer1.get_value(),
142+
timer2.get_value(),
143+
xtensa_lx6::get_cycle_count()
144+
)
145+
.unwrap();
146+
if let Ok(_) = timer1.wait() {
147+
writeln!(tx, "CANCELLING Timers").unwrap();
148+
timer0.cancel().unwrap();
149+
timer1.cancel().unwrap();
161150
}
162151
});
163152

@@ -166,18 +155,17 @@ fn main() -> ! {
166155
}
167156

168157
fn locked_print(str: &str) {
169-
interrupt::free(|_| {
170-
if let Some(ref mut tx) = TX.lock().deref_mut() {
171-
writeln!(tx, "{}", str).unwrap();
172-
}
158+
(&TX).lock(|tx| {
159+
let tx = tx.as_mut().unwrap();
160+
161+
writeln!(tx, "{}", str).unwrap();
173162
});
174163
}
175164

176-
fn locked_clear(timer_mutex: &Mutex<RefCell<Option<impl TimerWithInterrupt>>>) {
177-
interrupt::free(|_| {
178-
if let Some(ref mut timer) = timer_mutex.lock().borrow_mut().deref_mut() {
179-
timer.clear_interrupt();
180-
}
165+
fn locked_clear(mut timer_mutex: &MPMutex<Option<impl TimerWithInterrupt>>) {
166+
timer_mutex.lock(|timer| {
167+
let timer = timer.as_mut().unwrap();
168+
timer.clear_interrupt();
181169
});
182170
}
183171

@@ -225,10 +213,9 @@ fn TG1_LACT_LEVEL_INTR() {
225213
fn TG1_WDT_LEVEL_INTR() {
226214
locked_print(" TG1_WDT_LEVEL_INTR");
227215

228-
interrupt::free(|_| {
229-
if let Some(ref mut watchdog1) = WATCHDOG1.lock().borrow_mut().deref_mut() {
230-
watchdog1.clear_interrupt();
231-
}
216+
(&WATCHDOG1).lock(|watchdog1| {
217+
let watchdog1 = watchdog1.as_mut().unwrap();
218+
watchdog1.clear_interrupt();
232219
});
233220
}
234221

‎src/prelude.rs

Lines changed: 4 additions & 0 deletions
Original file line numberDiff line numberDiff line change
@@ -20,3 +20,7 @@ pub use embedded_hal::digital::v2::OutputPin as _embedded_hal_digital_v2_OutputP
2020
pub use embedded_hal::digital::v2::StatefulOutputPin as _embedded_hal_digital_v2_StatefulOutputPin;
2121
pub use embedded_hal::digital::v2::ToggleableOutputPin as _embedded_hal_digital_v2_ToggleableOutputPin;
2222
pub use embedded_hal::prelude::*;
23+
pub use embedded_hal::timer::{Cancel, CountDown, Periodic};
24+
25+
pub use xtensa_lx6::mutex::mutex_trait::prelude::*;
26+
pub use xtensa_lx6::mutex::CriticalSectionSpinLockMutex as MPMutex;

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