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Merge pull request #38 from reitermarkus/no-rt
Add `rt` feature to allow usage without runtime.
2 parents 845676e + 1ac198e commit 7e1953e

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5 files changed

+21
-16
lines changed

5 files changed

+21
-16
lines changed

Cargo.toml

Lines changed: 15 additions & 12 deletions
Original file line numberDiff line numberDiff line change
@@ -5,33 +5,36 @@ authors = ["Scott Mabin <[email protected]>", "Arjan Mels <[email protected]>"]
55
edition = "2018"
66

77

8-
# Allow overriding of memcpy, memset, etc.
8+
# Allow overriding of `memcpy`, `memset`, etc.
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[package.metadata.cargo-xbuild]
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memcpy = false
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1212

1313
[features]
14-
default=["mem"]
14+
default = ["mem", "rt"]
1515

16-
# Place program completely in ram (needed when e.g. using only ROM bootloader, or for debugging)
17-
all_in_ram=[]
16+
# Place program completely in RAM (needed when e.g. using only ROM bootloader, or for debugging).
17+
all_in_ram = []
1818

19-
# Allow use of external ram. Needs customized bootloader.
20-
external_ram=["esp32-hal-proc-macros/external_ram"]
19+
# Allow use of external RAM. (Needs customized bootloader.)
20+
external_ram = ["esp32-hal-proc-macros/external_ram"]
2121

22-
# Add support for Global Allocator
23-
alloc=["linked_list_allocator"]
22+
# Add support for global allocator.
23+
alloc = ["linked_list_allocator"]
2424

25-
# Define memcpy, memset etc. as replacement of standard functions
26-
mem=[]
25+
# Define `memcpy`, `memset`, etc. as replacement of standard functions.
26+
mem = []
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28+
# Enable the `rt` feature of the `esp32` crate.
29+
rt = ["esp32/rt", "xtensa-lx6-rt"]
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[dependencies]
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esp32-hal-proc-macros = { path = "procmacros" }
3134

32-
xtensa-lx6-rt = "0.2.0"
35+
xtensa-lx6-rt = { version = "0.2.0", optional = true }
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xtensa-lx6 = "0.1.0"
34-
esp32 = "0.5.0"
37+
esp32 = { version = "0.5.0", default-features = false }
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bare-metal = "0.2"
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nb = "0.1.2"
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spin = "0.5.2"

src/lib.rs

Lines changed: 2 additions & 0 deletions
Original file line numberDiff line numberDiff line change
@@ -33,6 +33,7 @@ pub mod efuse;
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#[cfg(feature = "external_ram")]
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pub mod external_ram;
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pub mod gpio;
36+
#[cfg(feature = "rt")]
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pub mod interrupt;
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pub mod prelude;
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pub mod serial;
@@ -54,6 +55,7 @@ pub mod mem;
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/// ENTRY point is defined in memory.x
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/// *Note: the pre_init function is called in the original reset handler
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/// after the initializations done in this function*
58+
#[cfg(feature = "rt")]
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#[doc(hidden)]
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#[no_mangle]
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pub unsafe extern "C" fn ESP32Reset() -> ! {

src/prelude.rs

Lines changed: 2 additions & 2 deletions
Original file line numberDiff line numberDiff line change
@@ -6,8 +6,8 @@
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//!
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//! This can be imported as use `esp32_hal::prelude::*`.
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9-
pub use xtensa_lx6_rt::entry;
10-
pub use xtensa_lx6_rt::exception;
9+
#[cfg(feature = "rt")]
10+
pub use xtensa_lx6_rt::{entry, exception};
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1212
pub use crate::analog::SensExt;
1313
pub use crate::gpio::GpioExt;

src/timer/mod.rs

Lines changed: 1 addition & 1 deletion
Original file line numberDiff line numberDiff line change
@@ -170,7 +170,7 @@ macro_rules! timer {
170170
Event::TimeOutEdge => self.enable_edge_interrupt(true),
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};
172172
unsafe {
173-
interrupt::free(|_| {
173+
xtensa_lx6::interrupt::free(|_| {
174174
TIMER_MUTEX.lock();
175175
(*(self.timg))
176176
.int_ena_timers

src/timer/watchdog.rs

Lines changed: 1 addition & 1 deletion
Original file line numberDiff line numberDiff line change
@@ -182,7 +182,7 @@ impl<TIMG: TimerGroup> Watchdog<TIMG> {
182182
timg.wdtconfig4.write(|w| unsafe { w.bits(per3) });
183183
timg.wdtconfig5.write(|w| unsafe { w.bits(per4) });
184184

185-
interrupt::free(|_| {
185+
xtensa_lx6::interrupt::free(|_| {
186186
super::TIMER_MUTEX.lock();
187187
timg.int_ena_timers.modify(|_, w| w.wdt_int_ena().set_bit());
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});

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