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Commit 9285d4a

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arjanmelsarjanmels
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‎src/serial.rs

Lines changed: 94 additions & 88 deletions
Original file line numberDiff line numberDiff line change
@@ -10,19 +10,14 @@
1010
//! - Add all extra features esp32 supports (eg rs485, etc. etc.)
1111
//! - Free APB lock when TX is idle (and no RX used)
1212
13-
use core::convert::Infallible;
14-
use core::marker::PhantomData;
15-
use core::ops::Deref;
13+
use core::{convert::Infallible, marker::PhantomData};
1614

17-
use crate::gpio::{InputSignal, OutputSignal};
15+
use crate::gpio::{InputPin, OutputPin};
16+
use crate::prelude::*;
1817
use crate::target;
19-
use crate::target::{uart, UART0, UART1, UART2};
2018

21-
use crate::prelude::*;
2219
use embedded_hal::serial;
2320

24-
use crate::gpio::{InputPin, OutputPin};
25-
2621
const UART_FIFO_SIZE: u8 = 128;
2722

2823
/// Serial error
@@ -153,6 +148,8 @@ pub struct Pins<
153148
pub rts: Option<RTS>,
154149
}
155150

151+
use private::Instance;
152+
156153
/// Serial abstraction
157154
///
158155
pub struct Serial<
@@ -506,96 +503,105 @@ where
506503
}
507504
}
508505

509-
pub trait Instance: Deref<Target = uart::RegisterBlock> {
510-
fn ptr() -> *const uart::RegisterBlock;
511-
/// Enable peripheral
512-
fn enable(&mut self, dport: &mut target::DPORT) -> &mut Self;
513-
/// Disable peripheral
514-
fn disable(&mut self, dport: &mut target::DPORT) -> &mut Self;
515-
/// Reset peripheral
516-
fn reset(&mut self, dport: &mut target::DPORT) -> &mut Self;
517-
518-
/// Initialize pins
519-
fn init_pins<TX: OutputPin, RX: InputPin, CTS: InputPin, RTS: OutputPin>(
520-
&mut self,
521-
pins: &mut Pins<TX, RX, CTS, RTS>,
522-
) -> &mut Self;
523-
}
506+
mod private {
507+
508+
use super::Pins;
509+
use crate::gpio::{InputPin, InputSignal, OutputPin, OutputSignal};
510+
use crate::prelude::*;
511+
use crate::target::{self, uart, UART0, UART1, UART2};
512+
use core::ops::Deref;
513+
514+
pub trait Instance: Deref<Target = uart::RegisterBlock> {
515+
fn ptr() -> *const uart::RegisterBlock;
516+
/// Enable peripheral
517+
fn enable(&mut self, dport: &mut target::DPORT) -> &mut Self;
518+
/// Disable peripheral
519+
fn disable(&mut self, dport: &mut target::DPORT) -> &mut Self;
520+
/// Reset peripheral
521+
fn reset(&mut self, dport: &mut target::DPORT) -> &mut Self;
522+
523+
/// Initialize pins
524+
fn init_pins<TX: OutputPin, RX: InputPin, CTS: InputPin, RTS: OutputPin>(
525+
&mut self,
526+
pins: &mut Pins<TX, RX, CTS, RTS>,
527+
) -> &mut Self;
528+
}
529+
530+
static UART_MEM_LOCK: CriticalSectionSpinLockMutex<()> = CriticalSectionSpinLockMutex::new(());
531+
532+
macro_rules! halUart {
533+
($(
534+
$UARTX:ident: ($uartX:ident, $txd:ident, $rxd:ident, $cts:ident, $rts:ident),
535+
)+) => {
536+
$(
537+
impl Instance for $UARTX {
538+
fn ptr() -> *const uart::RegisterBlock {
539+
$UARTX::ptr()
540+
}
524541

525-
static UART_MEM_LOCK: CriticalSectionSpinLockMutex<()> = CriticalSectionSpinLockMutex::new(());
542+
fn reset(&mut self, dport: &mut target::DPORT) -> &mut Self {
543+
dport.perip_rst_en.modify(|_, w| w.$uartX().set_bit());
544+
dport.perip_rst_en.modify(|_, w| w.$uartX().clear_bit());
545+
self
546+
}
526547

527-
macro_rules! halUart {
528-
($(
529-
$UARTX:ident: ($uartX:ident, $txd:ident, $rxd:ident, $cts:ident, $rts:ident),
530-
)+) => {
531-
$(
532-
impl Instance for $UARTX {
533-
fn ptr() -> *const uart::RegisterBlock {
534-
$UARTX::ptr()
535-
}
548+
fn enable(&mut self, dport: &mut target::DPORT) -> &mut Self {
549+
dport.perip_clk_en.modify(|_, w| w.uart_mem().set_bit());
550+
dport.perip_clk_en.modify(|_, w| w.$uartX().set_bit());
551+
dport.perip_rst_en.modify(|_, w| w.$uartX().clear_bit());
552+
self
553+
}
536554

537-
fn reset(&mut self, dport: &mut target::DPORT) -> &mut Self {
538-
dport.perip_rst_en.modify(|_, w| w.$uartX().set_bit());
539-
dport.perip_rst_en.modify(|_, w| w.$uartX().clear_bit());
540-
self
541-
}
555+
fn disable(&mut self, dport: &mut target::DPORT) -> &mut Self {
556+
dport.perip_clk_en.modify(|_, w| w.$uartX().clear_bit());
557+
dport.perip_rst_en.modify(|_, w| w.$uartX().set_bit());
542558

543-
fn enable(&mut self, dport: &mut target::DPORT) -> &mut Self {
544-
dport.perip_clk_en.modify(|_, w| w.uart_mem().set_bit());
545-
dport.perip_clk_en.modify(|_, w| w.$uartX().set_bit());
546-
dport.perip_rst_en.modify(|_, w| w.$uartX().clear_bit());
547-
self
548-
}
559+
(&UART_MEM_LOCK).lock(|_| {
560+
if dport.perip_clk_en.read().uart0().bit_is_clear()
561+
&& dport.perip_clk_en.read().uart1().bit_is_clear()
562+
&& dport.perip_clk_en.read().uart2().bit_is_clear()
563+
{
564+
dport.perip_clk_en.modify(|_, w| w.uart_mem().clear_bit());
565+
}
566+
});
567+
self
549568

550-
fn disable(&mut self, dport: &mut target::DPORT) -> &mut Self {
551-
dport.perip_clk_en.modify(|_, w| w.$uartX().clear_bit());
552-
dport.perip_rst_en.modify(|_, w| w.$uartX().set_bit());
569+
}
553570

554-
(&UART_MEM_LOCK).lock(|_| {
555-
if dport.perip_clk_en.read().uart0().bit_is_clear()
556-
&& dport.perip_clk_en.read().uart1().bit_is_clear()
557-
&& dport.perip_clk_en.read().uart2().bit_is_clear()
558-
{
559-
dport.perip_clk_en.modify(|_, w| w.uart_mem().clear_bit());
571+
fn init_pins<TX: OutputPin, RX: InputPin, CTS: InputPin, RTS: OutputPin>(
572+
&mut self, pins: &mut Pins<TX,RX,CTS,RTS>
573+
) -> &mut Self {
574+
pins
575+
.tx
576+
.set_to_push_pull_output()
577+
.connect_peripheral_to_output(OutputSignal::$txd);
578+
579+
pins
580+
.rx
581+
.set_to_input()
582+
.connect_input_to_peripheral(InputSignal::$rxd);
583+
584+
if let Some(cts) = pins.cts.as_mut() {
585+
cts
586+
.set_to_input()
587+
.connect_input_to_peripheral(InputSignal::$cts);
560588
}
561-
});
562-
self
563-
564-
}
565-
566-
fn init_pins<TX: OutputPin, RX: InputPin, CTS: InputPin, RTS: OutputPin>(
567-
&mut self, pins: &mut Pins<TX,RX,CTS,RTS>
568-
) -> &mut Self {
569-
pins
570-
.tx
571-
.set_to_push_pull_output()
572-
.connect_peripheral_to_output(OutputSignal::$txd);
573-
574-
pins
575-
.rx
576-
.set_to_input()
577-
.connect_input_to_peripheral(InputSignal::$rxd);
578-
579-
if let Some(cts) = pins.cts.as_mut() {
580-
cts
581-
.set_to_input()
582-
.connect_input_to_peripheral(InputSignal::$cts);
583-
}
584589

585-
if let Some(rts) = pins.rts.as_mut() {
586-
rts
587-
.set_to_push_pull_output()
588-
.connect_peripheral_to_output(OutputSignal::$rts);
590+
if let Some(rts) = pins.rts.as_mut() {
591+
rts
592+
.set_to_push_pull_output()
593+
.connect_peripheral_to_output(OutputSignal::$rts);
594+
}
595+
self
589596
}
590-
self
591597
}
592-
}
593-
)+
598+
)+
599+
}
594600
}
595-
}
596601

597-
halUart! {
598-
UART0: (uart0, U0TXD, U0RXD, U0CTS, U0RTS),
599-
UART1: (uart1, U1TXD, U1RXD, U1CTS, U1RTS),
600-
UART2: (uart2, U2TXD, U2RXD, U2CTS, U2RTS),
602+
halUart! {
603+
UART0: (uart0, U0TXD, U0RXD, U0CTS, U0RTS),
604+
UART1: (uart1, U1TXD, U1RXD, U1CTS, U1RTS),
605+
UART2: (uart2, U2TXD, U2RXD, U2CTS, U2RTS),
606+
}
601607
}

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