Merge from master

Author: hanhossain

.vscode/settings.json

@@ -0,0 +1,3 @@
+{
+    "rust-analyzer.cargo.target": "x86_64-unknown-linux-gnu"
+}

CHANGELOG.md

@@ -0,0 +1,23 @@
+# Change Log
+
+All notable changes to this project will be documented in this file.
+This project adheres to [Semantic Versioning](http://semver.org/).
+
+## [Unreleased]
+
+## v0.2.0 - 2020-09-23
+
+### Changed
+  - Replace `xtenxa-lx6` with `xtensa-lx`, a silicon agnostic craate for the runtime and peripheral access of xtensa CPU's.
+
+### Fixed
+  - Update alloc to support the new `alloc_ref` nightly changes.
+  - Clean up examples
+
+## v0.1.0 - 2020-09-15
+
+- Initial release
+
+[Unreleased]: https://github.com/esp-rs/esp32-hal/compare/v0.2.0...HEAD
+[v0.2.0]: https://github.com/esp-rs/esp32-hal/compare/v0.1.0...v0.2.0
+[v0.1.0]: https://github.com/esp-rs/esp32-hal/tree/v0.1.0

Cargo.toml

@@ -1,7 +1,13 @@
 [package]
 name = "esp32-hal"
-version = "0.1.0"
+version = "0.2.0"
+description = "A Hardware abstraction layer for Espressif's ESP32 WiFi microcontroller."
 authors = ["Scott Mabin <[email protected]>", "Arjan Mels <[email protected]>"]
+categories = ["embedded", "hardware-support", "no-std"]
+keywords = ["xtensa", "esp32", "hal", "esp"]
+license = "MIT OR Apache-2.0"
+readme = "README.md"
+repository = "https://github.com/esp-rs/esp32-hal"
 edition = "2018"
 
 
@@ -26,23 +32,24 @@ alloc = ["linked_list_allocator"]
 mem = []
 
 # Enable the `rt` feature of the `esp32` crate.
-rt = ["esp32/rt", "xtensa-lx6-rt"]
+rt = ["esp32/rt", "xtensa-lx-rt"]
 
 
 [dependencies]
-esp32-hal-proc-macros = { path = "procmacros" }
+esp32-hal-proc-macros = { version = "=0.2.0", path = "procmacros" }
 
-xtensa-lx6-rt = { version = "0.3.0", optional = true }
-xtensa-lx6 = "0.2.0"
-esp32 = { version = "0.6.0", default-features = false }
+xtensa-lx-rt = { version = "0.5.0", optional = true, features = ["lx6"] }
+xtensa-lx = { version = "0.3.0", features = ["lx6"]}
+esp32 = "0.10.0"
 bare-metal = "0.2"
 nb = "0.1.2"
 embedded-hal = { version = "0.2.3", features = ["unproven"] }
-linked_list_allocator = { version = "0.8.4", optional = true, default-features = false, features = ["alloc_ref"] }
+linked_list_allocator = { version = "=0.8.11", optional = true, default-features = false, features = ["alloc_ref"] }
 void = { version = "1.0.2", default-features = false }
 
 [dev-dependencies]
 panic-halt = "0.2.0"
+ili9341 = { version = "0.3.0", features = ["graphics"] }
 ssd1306 = "0.3.1"
 embedded-graphics = "0.6.2"
 mpu6050 = "0.1.3"

README.md

@@ -1,11 +1,28 @@
 # esp32-hal
 
-A experimental hardware abstraction layer for the [esp32](https://en.wikipedia.org/wiki/ESP32) written in Rust.
+A hardware abstraction layer for the [esp32](https://en.wikipedia.org/wiki/ESP32) written in Rust.
 
 Contributions are welcome :)
 
 Join in on the discussion: https://matrix.to/#/#esp-rs:matrix.org!
 
+## Running examples
+
+There are currently two ways to flash the esp32:
+
+  * The `flash` script using `esptool` 
+    - If you are familiar with the esp ecosystem, there is a `flash` script in this repo which utilizes the espressif esptool to flash the esp32 over usb.
+    Example usage:
+     ```rust
+        ./flash -p /dev/ttyUSB0 -e blinky --release
+     ```
+  
+  * The [`espflash`](https://github.com/icewind1991/espflash) cargo subcommand
+    - A Rust rewrite of the esptool, with a cargo subcommand. Example usage:
+     ```rust
+        cargo espflash --example blinky --release /dev/ttyUSB0
+     ```
+
 ## License
 
 Licensed under either of

examples/adc.rs

@@ -20,7 +20,7 @@ fn main() -> ! {
     let mut timg0 = dp.TIMG0;
     let mut timg1 = dp.TIMG1;
 
-    let (mut dport, dport_clock_control) = dp.DPORT.split();
+    let (_, dport_clock_control) = dp.DPORT.split();
 
     // (https://github.com/espressif/openocd-esp32/blob/97ba3a6bb9eaa898d91df923bbedddfeaaaf28c9/src/target/esp32.c#L431)
     // openocd disables the watchdog timer on halt
@@ -50,7 +50,6 @@ fn main() -> ! {
         },
         Config::default(),
         clkcntrl_config,
-        &mut dport,
     )
     .unwrap();
 

examples/alloc.rs

@@ -18,7 +18,7 @@ use esp32_hal::alloc::{
 use esp32_hal::clock_control::{sleep, ClockControl};
 use esp32_hal::dport::Split;
 use esp32_hal::dprintln;
-use esp32_hal::serial::{config::Config, NoRx, NoTx, Serial};
+use esp32_hal::serial::{config::Config, Serial};
 use esp32_hal::target;
 
 #[macro_use]
@@ -59,7 +59,7 @@ fn main() -> ! {
     // we will do it manually on startup
     disable_timg_wdts(&mut timg0, &mut timg1);
 
-    let (mut dport, dport_clock_control) = dp.DPORT.split();
+    let (_, dport_clock_control) = dp.DPORT.split();
 
     // setup clocks & watchdog
     let clock_control = ClockControl::new(
@@ -74,13 +74,19 @@ fn main() -> ! {
 
     watchdog.start(15.s());
 
+    let gpios = dp.GPIO.split();
+
     // setup serial controller
-    let mut uart0 = Serial::uart0(
+    let mut uart0: Serial<_, _, _> = Serial::new(
         dp.UART0,
-        (NoTx, NoRx),
+        esp32_hal::serial::Pins {
+            tx: gpios.gpio1,
+            rx: gpios.gpio3,
+            cts: None,
+            rts: None,
+        },
         Config::default(),
         clock_control_config,
-        &mut dport,
     )
     .unwrap();
 

examples/blinky.rs

@@ -1,21 +1,19 @@
 #![no_std]
 #![no_main]
 
-extern crate esp32_hal as hal;
-extern crate panic_halt;
-extern crate xtensa_lx6_rt;
-
 use esp32_hal::target;
 use hal::prelude::*;
-use xtensa_lx6::timer::get_cycle_count;
+use xtensa_lx::timer::get_cycle_count;
+use panic_halt as _;
+use esp32_hal as hal;
 
 /// The default clock source is the onboard crystal
 /// In most cases 40mhz (but can be as low as 2mhz depending on the board)
 const CORE_HZ: u32 = 40_000_000;
 
 const WDT_WKEY_VALUE: u32 = 0x50D83AA1;
 
-#[no_mangle]
+#[entry]
 fn main() -> ! {
     let dp = target::Peripherals::take().expect("Failed to obtain Peripherals");
 
@@ -30,7 +28,7 @@ fn main() -> ! {
     disable_rtc_wdt(&mut rtccntl);
 
     let pins = dp.GPIO.split();
-    let mut led = pins.gpio2.into_open_drain_output();
+    let mut led = pins.gpio2.into_push_pull_output();
 
     loop {
         led.set_high().unwrap();

examples/exception.rs

@@ -19,8 +19,8 @@ use esp32_hal::Core::PRO;
 // !!! Cannot use CriticalSectionSpinLockMutex here, because an NMI is fires from within a locked
 // section which leads to a deadlock in the NMI interrupt handler. This is not a problem in this
 // case as this is a single threaded example. !!!
-static TX: xtensa_lx6::mutex::CriticalSectionMutex<Option<esp32_hal::serial::Tx<esp32::UART0>>> =
-    xtensa_lx6::mutex::CriticalSectionMutex::new(None);
+static TX: xtensa_lx::mutex::CriticalSectionMutex<Option<esp32_hal::serial::Tx<esp32::UART0>>> =
+    xtensa_lx::mutex::CriticalSectionMutex::new(None);
 
 fn locked_print(str: &str) {
     (&TX).lock(|tx| {
@@ -30,7 +30,7 @@ fn locked_print(str: &str) {
             tx,
             "    {}, Level: {}",
             str,
-            xtensa_lx6::interrupt::get_level()
+            xtensa_lx::interrupt::get_level()
         )
         .unwrap();
     });
@@ -78,8 +78,8 @@ fn random_name() {
 #[exception]
 #[ram]
 fn other_exception(
-    cause: xtensa_lx6_rt::exception::ExceptionCause,
-    frame: xtensa_lx6_rt::exception::Context,
+    cause: xtensa_lx_rt::exception::ExceptionCause,
+    frame: xtensa_lx_rt::exception::Context,
 ) {
     (&TX).lock(|tx| {
         let tx = tx.as_mut().unwrap();
@@ -100,7 +100,7 @@ fn main() -> ! {
     // we will do it manually on startup
     disable_timg_wdts(&mut timg0, &mut timg1);
 
-    let (mut dport, dport_clock_control) = dp.DPORT.split();
+    let (_, dport_clock_control) = dp.DPORT.split();
 
     // setup clocks & watchdog
     let mut clock_control = ClockControl::new(
@@ -132,7 +132,6 @@ fn main() -> ! {
         },
         Config::default(),
         clock_control_config,
-        &mut dport,
     )
     .unwrap();