Teach rustc about the Xtensa arch.

Author: MabezDev

compiler/rustc_llvm/build.rs

@@ -22,6 +22,7 @@ const OPTIONAL_COMPONENTS: &[&str] = &[
     "nvptx",
     "hexagon",
     "riscv",
+    "xtensa",
     "bpf",
 ];
 

compiler/rustc_llvm/llvm-wrapper/PassWrapper.cpp

@@ -140,6 +140,12 @@ extern "C" void LLVMTimeTraceProfilerFinish(const char* FileName) {
 #define SUBTARGET_SPARC
 #endif
 
+#ifdef LLVM_COMPONENT_XTENSA
+#define SUBTARGET_XTENSA SUBTARGET(XTENSA)
+#else
+#define SUBTARGET_XTENSA
+#endif
+
 #ifdef LLVM_COMPONENT_HEXAGON
 #define SUBTARGET_HEXAGON SUBTARGET(Hexagon)
 #else
@@ -164,6 +170,7 @@ extern "C" void LLVMTimeTraceProfilerFinish(const char* FileName) {
   SUBTARGET_MSP430                                                             \
   SUBTARGET_SPARC                                                              \
   SUBTARGET_HEXAGON                                                            \
+  SUBTARGET_XTENSA                                                             \
   SUBTARGET_RISCV                                                              \
   SUBTARGET_LOONGARCH                                                          \
 

compiler/rustc_llvm/src/lib.rs

@@ -179,6 +179,14 @@ pub fn initialize_available_targets() {
         LLVMInitializeHexagonAsmPrinter,
         LLVMInitializeHexagonAsmParser
     );
+    init_target!(
+        llvm_component = "xtensa",
+        LLVMInitializeXtensaTargetInfo,
+        LLVMInitializeXtensaTarget,
+        LLVMInitializeXtensaTargetMC,
+        LLVMInitializeXtensaAsmPrinter,
+        LLVMInitializeXtensaAsmParser
+    );
     init_target!(
         llvm_component = "webassembly",
         LLVMInitializeWebAssemblyTargetInfo,