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Enable Xtensa codegen for rustc_codegen_gcc
* Updates uses of object::Architecture within the compiler
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2 files changed

+11
-1
lines changed

2 files changed

+11
-1
lines changed

compiler/rustc_codegen_gcc/src/asm.rs

Lines changed: 10 additions & 1 deletion
Original file line numberDiff line numberDiff line change
@@ -638,6 +638,9 @@ fn reg_to_gcc(reg: InlineAsmRegOrRegClass) -> ConstraintOrRegister {
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InlineAsmRegClass::Wasm(WasmInlineAsmRegClass::local) => "r",
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InlineAsmRegClass::S390x(S390xInlineAsmRegClass::reg) => "r",
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InlineAsmRegClass::S390x(S390xInlineAsmRegClass::freg) => "f",
641+
InlineAsmRegClass::Xtensa(XtensaInlineAsmRegClass::reg) => unimplemented!(),
642+
InlineAsmRegClass::Xtensa(XtensaInlineAsmRegClass::freg) => unimplemented!(),
643+
InlineAsmRegClass::Xtensa(XtensaInlineAsmRegClass::breg) => unimplemented!(),
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InlineAsmRegClass::Err => unreachable!(),
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}
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};
@@ -707,6 +710,9 @@ fn dummy_output_type<'gcc, 'tcx>(cx: &CodegenCx<'gcc, 'tcx>, reg: InlineAsmRegCl
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},
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InlineAsmRegClass::S390x(S390xInlineAsmRegClass::reg) => cx.type_i32(),
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InlineAsmRegClass::S390x(S390xInlineAsmRegClass::freg) => cx.type_f64(),
713+
InlineAsmRegClass::Xtensa(XtensaInlineAsmRegClass::reg) => cx.type_i32(),
714+
InlineAsmRegClass::Xtensa(XtensaInlineAsmRegClass::freg) => cx.type_f32(),
715+
InlineAsmRegClass::Xtensa(XtensaInlineAsmRegClass::breg) => cx.type_i8(), // FIXME: should this be i1?
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InlineAsmRegClass::Err => unreachable!(),
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}
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}
@@ -863,7 +869,10 @@ fn modifier_to_gcc(arch: InlineAsmArch, reg: InlineAsmRegClass, modifier: Option
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InlineAsmRegClass::M68k(_) => None,
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InlineAsmRegClass::SpirV(SpirVInlineAsmRegClass::reg) => {
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bug!("LLVM backend does not support SPIR-V")
866-
}
872+
},
873+
InlineAsmRegClass::Xtensa(XtensaInlineAsmRegClass::reg) => unimplemented!(),
874+
InlineAsmRegClass::Xtensa(XtensaInlineAsmRegClass::freg) => unimplemented!(),
875+
InlineAsmRegClass::Xtensa(XtensaInlineAsmRegClass::breg) => unimplemented!(),
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InlineAsmRegClass::Err => unreachable!(),
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}
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}

compiler/rustc_codegen_ssa/src/back/metadata.rs

Lines changed: 1 addition & 0 deletions
Original file line numberDiff line numberDiff line change
@@ -174,6 +174,7 @@ pub(crate) fn create_object_file(sess: &Session) -> Option<write::Object<'static
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"avr" => Architecture::Avr,
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"msp430" => Architecture::Msp430,
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"hexagon" => Architecture::Hexagon,
177+
"xtensa" => Architecture::Xtensa,
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"bpf" => Architecture::Bpf,
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"loongarch64" => Architecture::LoongArch64,
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// Unsupported architecture.

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