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gerekongerekon
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[Xtensa] Add fp16 conversion support
Close #91
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2 files changed

+178
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2 files changed

+178
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‎llvm/lib/Target/Xtensa/XtensaISelLowering.cpp

Lines changed: 12 additions & 1 deletion
Original file line numberDiff line numberDiff line change
@@ -379,11 +379,22 @@ XtensaTargetLowering::XtensaTargetLowering(const TargetMachine &tm,
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// Needed so that we don't try to implement f128 constant loads using
380380
// a load-and-extend of a f80 constant (in cases where the constant
381381
// would fit in an f80).
382-
for (MVT VT : MVT::fp_valuetypes())
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for (MVT VT : MVT::fp_valuetypes()) {
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setLoadExtAction(ISD::EXTLOAD, VT, MVT::f16, Expand);
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setLoadExtAction(ISD::EXTLOAD, VT, MVT::f32, Expand);
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setLoadExtAction(ISD::EXTLOAD, VT, MVT::f64, Expand);
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setLoadExtAction(ISD::EXTLOAD, VT, MVT::f80, Expand);
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}
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setOperationAction(ISD::FP16_TO_FP, MVT::f64, Expand);
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setOperationAction(ISD::FP_TO_FP16, MVT::f64, Expand);
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setOperationAction(ISD::FP16_TO_FP, MVT::f32, Expand);
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setOperationAction(ISD::FP_TO_FP16, MVT::f32, Expand);
384393

385394
// Floating-point truncation and stores need to be done separately.
386395
setTruncStoreAction(MVT::f64, MVT::f32, Expand);
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setTruncStoreAction(MVT::f64, MVT::f16, Expand);
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setTruncStoreAction(MVT::f32, MVT::f16, Expand);
387398

388399
// Implement custom stack allocations
389400
setOperationAction(ISD::DYNAMIC_STACKALLOC, PtrVT, Custom);

‎llvm/test/CodeGen/Xtensa/fp16.ll

Lines changed: 166 additions & 0 deletions
Original file line numberDiff line numberDiff line change
@@ -0,0 +1,166 @@
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; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py UTC_ARGS: --version 2
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; RUN: llc -mtriple=xtensa -mcpu=esp32 < %s | FileCheck --check-prefix=CHECK-ESP32 %s
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; RUN: llc -mtriple=xtensa -mcpu=esp32s3 < %s | FileCheck --check-prefix=CHECK-ESP32S3 %s
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; RUN: llc -mtriple=xtensa -mcpu=esp32s2 < %s | FileCheck --check-prefix=CHECK-ESP32S2 %s
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target datalayout = "e-m:e-p:32:32-v1:8:8-i64:64-i128:128-n32"
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target triple = "xtensa"
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@x = global i16 12902
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@y = global i16 0
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@z = common global i16 0
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define void @foo() nounwind {
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; CHECK-ESP32-LABEL: foo:
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; CHECK-ESP32: entry a1, 32
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; CHECK-ESP32-NEXT: l32r a6, .LCPI0_0
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; CHECK-ESP32-NEXT: l16ui a10, a6, 0
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; CHECK-ESP32-NEXT: l32r a5, .LCPI0_1
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; CHECK-ESP32-NEXT: callx8 a5
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; CHECK-ESP32-NEXT: mov.n a7, a10
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; CHECK-ESP32-NEXT: l32r a8, .LCPI0_2
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; CHECK-ESP32-NEXT: l16ui a10, a8, 0
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; CHECK-ESP32-NEXT: callx8 a5
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; CHECK-ESP32-NEXT: wfr f8, a10
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; CHECK-ESP32-NEXT: wfr f9, a7
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; CHECK-ESP32-NEXT: add.s f8, f9, f8
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; CHECK-ESP32-NEXT: rfr a10, f8
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; CHECK-ESP32-NEXT: l32r a8, .LCPI0_3
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; CHECK-ESP32-NEXT: callx8 a8
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; CHECK-ESP32-NEXT: s16i a10, a6, 0
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; CHECK-ESP32-NEXT: retw.n
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;
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; CHECK-ESP32S3-LABEL: foo:
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; CHECK-ESP32S3: entry a1, 32
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; CHECK-ESP32S3-NEXT: l32r a6, .LCPI0_0
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; CHECK-ESP32S3-NEXT: l16ui a10, a6, 0
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; CHECK-ESP32S3-NEXT: l32r a5, .LCPI0_1
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; CHECK-ESP32S3-NEXT: callx8 a5
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; CHECK-ESP32S3-NEXT: mov.n a7, a10
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; CHECK-ESP32S3-NEXT: l32r a8, .LCPI0_2
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; CHECK-ESP32S3-NEXT: l16ui a10, a8, 0
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; CHECK-ESP32S3-NEXT: callx8 a5
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; CHECK-ESP32S3-NEXT: wfr f8, a10
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; CHECK-ESP32S3-NEXT: wfr f9, a7
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; CHECK-ESP32S3-NEXT: add.s f8, f9, f8
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; CHECK-ESP32S3-NEXT: rfr a10, f8
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; CHECK-ESP32S3-NEXT: l32r a8, .LCPI0_3
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; CHECK-ESP32S3-NEXT: callx8 a8
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; CHECK-ESP32S3-NEXT: s16i a10, a6, 0
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; CHECK-ESP32S3-NEXT: retw.n
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;
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; CHECK-ESP32S2-LABEL: foo:
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; CHECK-ESP32S2: entry a1, 32
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; CHECK-ESP32S2-NEXT: l32r a6, .LCPI0_0
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; CHECK-ESP32S2-NEXT: l16ui a10, a6, 0
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; CHECK-ESP32S2-NEXT: l32r a5, .LCPI0_1
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; CHECK-ESP32S2-NEXT: callx8 a5
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; CHECK-ESP32S2-NEXT: mov.n a7, a10
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; CHECK-ESP32S2-NEXT: l32r a8, .LCPI0_2
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; CHECK-ESP32S2-NEXT: l16ui a10, a8, 0
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; CHECK-ESP32S2-NEXT: callx8 a5
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; CHECK-ESP32S2-NEXT: mov.n a11, a10
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; CHECK-ESP32S2-NEXT: l32r a8, .LCPI0_3
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; CHECK-ESP32S2-NEXT: mov.n a10, a7
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; CHECK-ESP32S2-NEXT: callx8 a8
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; CHECK-ESP32S2-NEXT: l32r a7, .LCPI0_4
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; CHECK-ESP32S2-NEXT: callx8 a7
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; CHECK-ESP32S2-NEXT: l32r a8, .LCPI0_5
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; CHECK-ESP32S2-NEXT: and a10, a10, a8
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; CHECK-ESP32S2-NEXT: callx8 a5
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; CHECK-ESP32S2-NEXT: callx8 a7
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; CHECK-ESP32S2-NEXT: s16i a10, a6, 0
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; CHECK-ESP32S2-NEXT: retw.n
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entry:
75+
%0 = load i16, ptr @x, align 2
76+
%1 = load i16, ptr @y, align 2
77+
%2 = tail call float @llvm.convert.from.fp16.f32(i16 %0)
78+
%3 = tail call float @llvm.convert.from.fp16.f32(i16 %1)
79+
%4 = fadd float %2, %3
80+
%5 = tail call i16 @llvm.convert.to.fp16.f32(float %4)
81+
store i16 %5, ptr @x, align 2
82+
ret void
83+
}
84+
85+
define double @test_from_fp16(i16 %in) {
86+
; CHECK-ESP32-LABEL: test_from_fp16:
87+
; CHECK-ESP32: entry a1, 32
88+
; CHECK-ESP32-NEXT: l32r a8, .LCPI1_0
89+
; CHECK-ESP32-NEXT: mov.n a10, a2
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; CHECK-ESP32-NEXT: callx8 a8
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; CHECK-ESP32-NEXT: l32r a8, .LCPI1_1
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; CHECK-ESP32-NEXT: callx8 a8
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; CHECK-ESP32-NEXT: mov.n a2, a10
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; CHECK-ESP32-NEXT: mov.n a3, a11
95+
; CHECK-ESP32-NEXT: retw.n
96+
;
97+
; CHECK-ESP32S3-LABEL: test_from_fp16:
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; CHECK-ESP32S3: entry a1, 32
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; CHECK-ESP32S3-NEXT: l32r a8, .LCPI1_0
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; CHECK-ESP32S3-NEXT: mov.n a10, a2
101+
; CHECK-ESP32S3-NEXT: callx8 a8
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; CHECK-ESP32S3-NEXT: l32r a8, .LCPI1_1
103+
; CHECK-ESP32S3-NEXT: callx8 a8
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; CHECK-ESP32S3-NEXT: mov.n a2, a10
105+
; CHECK-ESP32S3-NEXT: mov.n a3, a11
106+
; CHECK-ESP32S3-NEXT: retw.n
107+
;
108+
; CHECK-ESP32S2-LABEL: test_from_fp16:
109+
; CHECK-ESP32S2: entry a1, 32
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; CHECK-ESP32S2-NEXT: l32r a8, .LCPI1_0
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; CHECK-ESP32S2-NEXT: and a10, a2, a8
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; CHECK-ESP32S2-NEXT: l32r a8, .LCPI1_1
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; CHECK-ESP32S2-NEXT: callx8 a8
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; CHECK-ESP32S2-NEXT: l32r a8, .LCPI1_2
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; CHECK-ESP32S2-NEXT: callx8 a8
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; CHECK-ESP32S2-NEXT: mov.n a2, a10
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; CHECK-ESP32S2-NEXT: mov.n a3, a11
118+
; CHECK-ESP32S2-NEXT: retw.n
119+
%val = call double @llvm.convert.from.fp16.f64(i16 %in)
120+
ret double %val
121+
}
122+
123+
define i16 @test_to_fp16(double %in) {
124+
; CHECK-ESP32-LABEL: test_to_fp16:
125+
; CHECK-ESP32: entry a1, 32
126+
; CHECK-ESP32-NEXT: l32r a8, .LCPI2_0
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; CHECK-ESP32-NEXT: mov.n a10, a2
128+
; CHECK-ESP32-NEXT: mov.n a11, a3
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; CHECK-ESP32-NEXT: callx8 a8
130+
; CHECK-ESP32-NEXT: l32r a8, .LCPI2_1
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; CHECK-ESP32-NEXT: and a2, a10, a8
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; CHECK-ESP32-NEXT: retw.n
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;
134+
; CHECK-ESP32S3-LABEL: test_to_fp16:
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; CHECK-ESP32S3: entry a1, 32
136+
; CHECK-ESP32S3-NEXT: l32r a8, .LCPI2_0
137+
; CHECK-ESP32S3-NEXT: mov.n a10, a2
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; CHECK-ESP32S3-NEXT: mov.n a11, a3
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; CHECK-ESP32S3-NEXT: callx8 a8
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; CHECK-ESP32S3-NEXT: l32r a8, .LCPI2_1
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; CHECK-ESP32S3-NEXT: and a2, a10, a8
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; CHECK-ESP32S3-NEXT: retw.n
143+
;
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; CHECK-ESP32S2-LABEL: test_to_fp16:
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; CHECK-ESP32S2: entry a1, 32
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; CHECK-ESP32S2-NEXT: l32r a8, .LCPI2_0
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; CHECK-ESP32S2-NEXT: mov.n a10, a2
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; CHECK-ESP32S2-NEXT: mov.n a11, a3
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; CHECK-ESP32S2-NEXT: callx8 a8
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; CHECK-ESP32S2-NEXT: l32r a8, .LCPI2_1
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; CHECK-ESP32S2-NEXT: and a10, a10, a8
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; CHECK-ESP32S2-NEXT: l32r a8, .LCPI2_2
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; CHECK-ESP32S2-NEXT: callx8 a8
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; CHECK-ESP32S2-NEXT: l32r a8, .LCPI2_3
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; CHECK-ESP32S2-NEXT: callx8 a8
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; CHECK-ESP32S2-NEXT: mov.n a2, a10
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; CHECK-ESP32S2-NEXT: retw.n
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%val = call i16 @llvm.convert.to.fp16.f64(double %in)
159+
ret i16 %val
160+
}
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162+
declare float @llvm.convert.from.fp16.f32(i16) nounwind readnone
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declare double @llvm.convert.from.fp16.f64(i16) nounwind readnone
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165+
declare i16 @llvm.convert.to.fp16.f32(float) nounwind readnone
166+
declare i16 @llvm.convert.to.fp16.f64(double) nounwind readnone

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