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[Test] add biquad test case for CustomLICM Pass
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  • llvm/test/CodeGen/RISCV/RISCVCustomLICM

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; NOTE: Assertions have been autogenerated by utils/update_test_checks.py UTC_ARGS: --version 4
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; RUN: opt -S -mtriple=riscv32-esp-unknown-elf -passes=riscv-custom-licm -riscv-custom-licm=false < %s | FileCheck %s
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define dso_local noundef i32 @dsps_biquad_f32_ansi(ptr nocapture noundef readonly %input, ptr nocapture noundef writeonly %output, i32 noundef %len, ptr nocapture noundef readonly %coef, ptr nocapture noundef %w) local_unnamed_addr {
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; CHECK-LABEL: define dso_local noundef i32 @dsps_biquad_f32_ansi(
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; CHECK-SAME: ptr nocapture noundef readonly [[INPUT:%.*]], ptr nocapture noundef writeonly [[OUTPUT:%.*]], i32 noundef [[LEN:%.*]], ptr nocapture noundef readonly [[COEF:%.*]], ptr nocapture noundef [[W:%.*]]) local_unnamed_addr {
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; CHECK-NEXT: entry:
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; CHECK-NEXT: [[TMP0:%.*]] = icmp sgt i32 [[LEN]], 2
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; CHECK-NEXT: br i1 [[TMP0]], label [[FOR_COND_PREHEADER:%.*]], label [[FOR_BODY_LR_PH_CLONE:%.*]]
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; CHECK: for.cond.preheader:
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; CHECK-NEXT: [[CMP30:%.*]] = icmp sgt i32 [[LEN]], 0
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; CHECK-NEXT: br i1 [[CMP30]], label [[FOR_BODY_LR_PH:%.*]], label [[IF_END:%.*]]
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; CHECK: for.body.lr.ph:
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; CHECK-NEXT: [[ARRAYIDX1:%.*]] = getelementptr inbounds float, ptr [[COEF]], i32 3
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; CHECK-NEXT: [[ARRAYIDX3:%.*]] = getelementptr inbounds float, ptr [[COEF]], i32 4
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; CHECK-NEXT: [[ARRAYIDX4:%.*]] = getelementptr inbounds float, ptr [[W]], i32 1
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; CHECK-NEXT: [[ARRAYIDX7:%.*]] = getelementptr inbounds float, ptr [[COEF]], i32 1
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; CHECK-NEXT: [[ARRAYIDX10:%.*]] = getelementptr inbounds float, ptr [[COEF]], i32 2
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; CHECK-NEXT: [[DOTPRE:%.*]] = load float, ptr [[W]], align 4
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; CHECK-NEXT: [[DOTPRE32:%.*]] = load float, ptr [[ARRAYIDX4]], align 4
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; CHECK-NEXT: br label [[FOR_BODY:%.*]]
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; CHECK: if.end:
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; CHECK-NEXT: ret i32 0
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; CHECK: for.body:
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; CHECK-NEXT: [[TMP1:%.*]] = phi float [ [[DOTPRE32]], [[FOR_BODY_LR_PH]] ], [ [[TMP13:%.*]], [[FOR_BODY]] ]
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; CHECK-NEXT: [[TMP2:%.*]] = phi float [ [[DOTPRE]], [[FOR_BODY_LR_PH]] ], [ [[TMP7:%.*]], [[FOR_BODY]] ]
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; CHECK-NEXT: [[I_031:%.*]] = phi i32 [ 0, [[FOR_BODY_LR_PH]] ], [ [[INC:%.*]], [[FOR_BODY]] ]
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; CHECK-NEXT: [[ARRAYIDX:%.*]] = getelementptr inbounds float, ptr [[INPUT]], i32 [[I_031]]
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; CHECK-NEXT: [[TMP3:%.*]] = load float, ptr [[ARRAYIDX]], align 4
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; CHECK-NEXT: [[TMP4:%.*]] = load float, ptr [[ARRAYIDX1]], align 4
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; CHECK-NEXT: [[NEG:%.*]] = fneg float [[TMP4]]
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; CHECK-NEXT: [[TMP5:%.*]] = tail call float @llvm.fmuladd.f32(float [[NEG]], float [[TMP2]], float [[TMP3]])
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; CHECK-NEXT: [[TMP6:%.*]] = load float, ptr [[ARRAYIDX3]], align 4
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; CHECK-NEXT: [[NEG5:%.*]] = fneg float [[TMP6]]
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; CHECK-NEXT: [[TMP7]] = tail call float @llvm.fmuladd.f32(float [[NEG5]], float [[TMP1]], float [[TMP5]])
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; CHECK-NEXT: [[TMP8:%.*]] = load float, ptr [[COEF]], align 4
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; CHECK-NEXT: [[TMP9:%.*]] = load float, ptr [[ARRAYIDX7]], align 4
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; CHECK-NEXT: [[MUL9:%.*]] = fmul float [[TMP2]], [[TMP9]]
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; CHECK-NEXT: [[TMP10:%.*]] = tail call float @llvm.fmuladd.f32(float [[TMP8]], float [[TMP7]], float [[MUL9]])
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; CHECK-NEXT: [[TMP11:%.*]] = load float, ptr [[ARRAYIDX10]], align 4
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; CHECK-NEXT: [[TMP12:%.*]] = tail call float @llvm.fmuladd.f32(float [[TMP11]], float [[TMP1]], float [[TMP10]])
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; CHECK-NEXT: [[ARRAYIDX12:%.*]] = getelementptr inbounds float, ptr [[OUTPUT]], i32 [[I_031]]
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; CHECK-NEXT: store float [[TMP12]], ptr [[ARRAYIDX12]], align 4
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; CHECK-NEXT: [[TMP13]] = load float, ptr [[W]], align 4
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; CHECK-NEXT: store float [[TMP13]], ptr [[ARRAYIDX4]], align 4
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; CHECK-NEXT: store float [[TMP7]], ptr [[W]], align 4
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; CHECK-NEXT: [[INC]] = add nuw nsw i32 [[I_031]], 1
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; CHECK-NEXT: [[EXITCOND_NOT:%.*]] = icmp eq i32 [[INC]], [[LEN]]
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; CHECK-NEXT: br i1 [[EXITCOND_NOT]], label [[IF_END]], label [[FOR_BODY]]
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; CHECK: for.body.lr.ph.clone:
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; CHECK-NEXT: [[ARRAYIDX1_CLONE:%.*]] = getelementptr inbounds float, ptr [[COEF]], i32 3
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; CHECK-NEXT: [[ARRAYIDX3_CLONE:%.*]] = getelementptr inbounds float, ptr [[COEF]], i32 4
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; CHECK-NEXT: [[ARRAYIDX4_CLONE:%.*]] = getelementptr inbounds float, ptr [[W]], i32 1
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; CHECK-NEXT: [[ARRAYIDX7_CLONE:%.*]] = getelementptr inbounds float, ptr [[COEF]], i32 1
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; CHECK-NEXT: [[ARRAYIDX10_CLONE:%.*]] = getelementptr inbounds float, ptr [[COEF]], i32 2
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; CHECK-NEXT: [[DOTPRE_CLONE:%.*]] = load float, ptr [[W]], align 4
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; CHECK-NEXT: [[DOTPRE32_CLONE:%.*]] = load float, ptr [[ARRAYIDX4_CLONE]], align 4
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; CHECK-NEXT: br label [[FOR_BODY_CLONE:%.*]]
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; CHECK: for.body.clone:
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; CHECK-NEXT: [[TMP14:%.*]] = phi float [ [[DOTPRE32_CLONE]], [[FOR_BODY_LR_PH_CLONE]] ], [ [[TMP26:%.*]], [[FOR_BODY_CLONE]] ]
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; CHECK-NEXT: [[TMP15:%.*]] = phi float [ [[DOTPRE_CLONE]], [[FOR_BODY_LR_PH_CLONE]] ], [ [[TMP20:%.*]], [[FOR_BODY_CLONE]] ]
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; CHECK-NEXT: [[I_031_CLONE:%.*]] = phi i32 [ 0, [[FOR_BODY_LR_PH_CLONE]] ], [ [[INC_CLONE:%.*]], [[FOR_BODY_CLONE]] ]
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; CHECK-NEXT: [[ARRAYIDX_CLONE:%.*]] = getelementptr inbounds float, ptr [[INPUT]], i32 [[I_031_CLONE]]
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; CHECK-NEXT: [[TMP16:%.*]] = load float, ptr [[ARRAYIDX_CLONE]], align 4
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; CHECK-NEXT: [[TMP17:%.*]] = load float, ptr [[ARRAYIDX1_CLONE]], align 4
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; CHECK-NEXT: [[NEG_CLONE:%.*]] = fneg float [[TMP17]]
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; CHECK-NEXT: [[TMP18:%.*]] = tail call float @llvm.fmuladd.f32(float [[NEG_CLONE]], float [[TMP15]], float [[TMP16]])
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; CHECK-NEXT: [[TMP19:%.*]] = load float, ptr [[ARRAYIDX3_CLONE]], align 4
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; CHECK-NEXT: [[NEG5_CLONE:%.*]] = fneg float [[TMP19]]
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; CHECK-NEXT: [[TMP20]] = tail call float @llvm.fmuladd.f32(float [[NEG5_CLONE]], float [[TMP14]], float [[TMP18]])
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; CHECK-NEXT: [[TMP21:%.*]] = load float, ptr [[COEF]], align 4
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; CHECK-NEXT: [[TMP22:%.*]] = load float, ptr [[ARRAYIDX7_CLONE]], align 4
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; CHECK-NEXT: [[MUL9_CLONE:%.*]] = fmul float [[TMP15]], [[TMP22]]
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; CHECK-NEXT: [[TMP23:%.*]] = tail call float @llvm.fmuladd.f32(float [[TMP21]], float [[TMP20]], float [[MUL9_CLONE]])
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; CHECK-NEXT: [[TMP24:%.*]] = load float, ptr [[ARRAYIDX10_CLONE]], align 4
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; CHECK-NEXT: [[TMP25:%.*]] = tail call float @llvm.fmuladd.f32(float [[TMP24]], float [[TMP14]], float [[TMP23]])
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; CHECK-NEXT: [[ARRAYIDX12_CLONE:%.*]] = getelementptr inbounds float, ptr [[OUTPUT]], i32 [[I_031_CLONE]]
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; CHECK-NEXT: store float [[TMP25]], ptr [[ARRAYIDX12_CLONE]], align 4
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; CHECK-NEXT: [[TMP26]] = load float, ptr [[W]], align 4
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; CHECK-NEXT: store float [[TMP26]], ptr [[ARRAYIDX4_CLONE]], align 4
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; CHECK-NEXT: store float [[TMP20]], ptr [[W]], align 4
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; CHECK-NEXT: [[INC_CLONE]] = add nuw nsw i32 [[I_031_CLONE]], 1
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; CHECK-NEXT: [[EXITCOND_NOT_CLONE:%.*]] = icmp eq i32 [[INC_CLONE]], [[LEN]]
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; CHECK-NEXT: br i1 [[EXITCOND_NOT_CLONE]], label [[IF_END]], label [[FOR_BODY_CLONE]]
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;
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entry:
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%0 = icmp sgt i32 %len, 2
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br i1 %0, label %for.cond.preheader, label %for.body.lr.ph.clone
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for.cond.preheader: ; preds = %entry
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%cmp30 = icmp sgt i32 %len, 0
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br i1 %cmp30, label %for.body.lr.ph, label %if.end
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for.body.lr.ph: ; preds = %for.cond.preheader
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%arrayidx1 = getelementptr inbounds float, ptr %coef, i32 3
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%arrayidx3 = getelementptr inbounds float, ptr %coef, i32 4
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%arrayidx4 = getelementptr inbounds float, ptr %w, i32 1
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%arrayidx7 = getelementptr inbounds float, ptr %coef, i32 1
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%arrayidx10 = getelementptr inbounds float, ptr %coef, i32 2
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%.pre = load float, ptr %w, align 4
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%.pre32 = load float, ptr %arrayidx4, align 4
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br label %for.body
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if.end: ; preds = %for.body.clone, %for.body, %for.cond.preheader
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ret i32 0
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for.body: ; preds = %for.body, %for.body.lr.ph
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%1 = phi float [ %.pre32, %for.body.lr.ph ], [ %13, %for.body ]
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%2 = phi float [ %.pre, %for.body.lr.ph ], [ %7, %for.body ]
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%i.031 = phi i32 [ 0, %for.body.lr.ph ], [ %inc, %for.body ]
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%arrayidx = getelementptr inbounds float, ptr %input, i32 %i.031
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%3 = load float, ptr %arrayidx, align 4
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%4 = load float, ptr %arrayidx1, align 4
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%neg = fneg float %4
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%5 = tail call float @llvm.fmuladd.f32(float %neg, float %2, float %3)
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%6 = load float, ptr %arrayidx3, align 4
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%neg5 = fneg float %6
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%7 = tail call float @llvm.fmuladd.f32(float %neg5, float %1, float %5)
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%8 = load float, ptr %coef, align 4
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%9 = load float, ptr %arrayidx7, align 4
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%mul9 = fmul float %2, %9
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%10 = tail call float @llvm.fmuladd.f32(float %8, float %7, float %mul9)
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%11 = load float, ptr %arrayidx10, align 4
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%12 = tail call float @llvm.fmuladd.f32(float %11, float %1, float %10)
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%arrayidx12 = getelementptr inbounds float, ptr %output, i32 %i.031
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store float %12, ptr %arrayidx12, align 4
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%13 = load float, ptr %w, align 4
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store float %13, ptr %arrayidx4, align 4
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store float %7, ptr %w, align 4
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%inc = add nuw nsw i32 %i.031, 1
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%exitcond.not = icmp eq i32 %inc, %len
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br i1 %exitcond.not, label %if.end, label %for.body
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for.body.lr.ph.clone: ; preds = %entry
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%arrayidx1.clone = getelementptr inbounds float, ptr %coef, i32 3
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%arrayidx3.clone = getelementptr inbounds float, ptr %coef, i32 4
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%arrayidx4.clone = getelementptr inbounds float, ptr %w, i32 1
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%arrayidx7.clone = getelementptr inbounds float, ptr %coef, i32 1
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%arrayidx10.clone = getelementptr inbounds float, ptr %coef, i32 2
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%.pre.clone = load float, ptr %w, align 4
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%.pre32.clone = load float, ptr %arrayidx4.clone, align 4
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br label %for.body.clone
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for.body.clone: ; preds = %for.body.clone, %for.body.lr.ph.clone
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%14 = phi float [ %.pre32.clone, %for.body.lr.ph.clone ], [ %26, %for.body.clone ]
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%15 = phi float [ %.pre.clone, %for.body.lr.ph.clone ], [ %20, %for.body.clone ]
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%i.031.clone = phi i32 [ 0, %for.body.lr.ph.clone ], [ %inc.clone, %for.body.clone ]
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%arrayidx.clone = getelementptr inbounds float, ptr %input, i32 %i.031.clone
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%16 = load float, ptr %arrayidx.clone, align 4
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%17 = load float, ptr %arrayidx1.clone, align 4
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%neg.clone = fneg float %17
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%18 = tail call float @llvm.fmuladd.f32(float %neg.clone, float %15, float %16)
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%19 = load float, ptr %arrayidx3.clone, align 4
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%neg5.clone = fneg float %19
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%20 = tail call float @llvm.fmuladd.f32(float %neg5.clone, float %14, float %18)
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%21 = load float, ptr %coef, align 4
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%22 = load float, ptr %arrayidx7.clone, align 4
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%mul9.clone = fmul float %15, %22
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%23 = tail call float @llvm.fmuladd.f32(float %21, float %20, float %mul9.clone)
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%24 = load float, ptr %arrayidx10.clone, align 4
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%25 = tail call float @llvm.fmuladd.f32(float %24, float %14, float %23)
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%arrayidx12.clone = getelementptr inbounds float, ptr %output, i32 %i.031.clone
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store float %25, ptr %arrayidx12.clone, align 4
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%26 = load float, ptr %w, align 4
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store float %26, ptr %arrayidx4.clone, align 4
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store float %20, ptr %w, align 4
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%inc.clone = add nuw nsw i32 %i.031.clone, 1
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%exitcond.not.clone = icmp eq i32 %inc.clone, %len
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br i1 %exitcond.not.clone, label %if.end, label %for.body.clone
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}

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