[CodeGen] Make some includes explicit (NFC)

Explicitly include some headers or forward-declare types, in
preparation for removing an include that pulls in many transitive
headers.

Author: nikic

llvm/include/llvm/CodeGen/MIRFormatter.h

@@ -14,6 +14,7 @@
 #define LLVM_CODEGEN_MIRFORMATTER_H
 
 #include "llvm/CodeGen/PseudoSourceValue.h"
+#include "llvm/Support/ErrorHandling.h"
 #include "llvm/Support/raw_ostream.h"
 #include <cstdint>
 #include <optional>
@@ -22,7 +23,10 @@ namespace llvm {
 
 class MachineFunction;
 class MachineInstr;
+class ModuleSlotTracker;
 struct PerFunctionMIParsingState;
+class Twine;
+class Value;
 
 /// MIRFormater - Interface to format MIR operand based on target
 class MIRFormatter {

llvm/include/llvm/CodeGen/MIRParser/MIParser.h

@@ -17,8 +17,10 @@
 #include "llvm/ADT/StringMap.h"
 #include "llvm/CodeGen/MachineMemOperand.h"
 #include "llvm/CodeGen/Register.h"
+#include "llvm/IR/TrackingMDRef.h"
 #include "llvm/Support/Allocator.h"
 #include "llvm/Support/SMLoc.h"
+#include <map>
 #include <utility>
 
 namespace llvm {

llvm/include/llvm/CodeGen/MachineMemOperand.h

@@ -20,6 +20,8 @@
 #include "llvm/CodeGen/LowLevelType.h"
 #include "llvm/CodeGen/PseudoSourceValue.h"
 #include "llvm/IR/DerivedTypes.h"
+#include "llvm/IR/LLVMContext.h"
+#include "llvm/IR/Metadata.h"
 #include "llvm/IR/Value.h" // PointerLikeTypeTraits<Value*>
 #include "llvm/Support/AtomicOrdering.h"
 #include "llvm/Support/DataTypes.h"

llvm/include/llvm/CodeGen/ModuloSchedule.h

@@ -65,6 +65,7 @@
 #include "llvm/CodeGen/TargetInstrInfo.h"
 #include "llvm/CodeGen/TargetSubtargetInfo.h"
 #include <deque>
+#include <map>
 #include <vector>
 
 namespace llvm {

llvm/include/llvm/CodeGen/TargetFrameLowering.h

@@ -13,6 +13,7 @@
 #ifndef LLVM_CODEGEN_TARGETFRAMELOWERING_H
 #define LLVM_CODEGEN_TARGETFRAMELOWERING_H
 
+#include "llvm/ADT/BitVector.h"
 #include "llvm/CodeGen/MachineBasicBlock.h"
 #include "llvm/Support/TypeSize.h"
 #include <vector>

llvm/lib/CodeGen/LiveDebugVariables.cpp

@@ -58,6 +58,7 @@
 #include <algorithm>
 #include <cassert>
 #include <iterator>
+#include <map>
 #include <memory>
 #include <optional>
 #include <utility>

llvm/lib/Target/AArch64/AArch64SIMDInstrOpt.cpp

@@ -50,6 +50,7 @@
 #include "llvm/MC/MCSchedule.h"
 #include "llvm/Pass.h"
 #include <unordered_map>
+#include <map>
 
 using namespace llvm;
 

llvm/lib/Target/AArch64/GISel/AArch64RegisterBankInfo.cpp

@@ -30,6 +30,7 @@
 #include "llvm/CodeGen/TargetSubtargetInfo.h"
 #include "llvm/IR/IntrinsicsAArch64.h"
 #include "llvm/Support/ErrorHandling.h"
+#include "llvm/Support/Threading.h"
 #include <algorithm>
 #include <cassert>
 

llvm/lib/Target/AMDGPU/SIRegisterInfo.h

@@ -14,6 +14,8 @@
 #ifndef LLVM_LIB_TARGET_AMDGPU_SIREGISTERINFO_H
 #define LLVM_LIB_TARGET_AMDGPU_SIREGISTERINFO_H
 
+#include "llvm/ADT/BitVector.h"
+
 #define GET_REGINFO_HEADER
 #include "AMDGPUGenRegisterInfo.inc"
 

llvm/lib/Target/BPF/BPFAbstractMemberAccess.cpp

@@ -89,6 +89,7 @@
 #include "llvm/IR/Type.h"
 #include "llvm/IR/User.h"
 #include "llvm/IR/Value.h"
+#include "llvm/IR/ValueHandle.h"
 #include "llvm/Pass.h"
 #include "llvm/Transforms/Utils/BasicBlockUtils.h"
 #include <stack>

llvm/lib/Target/Hexagon/HexagonExpandCondsets.cpp

@@ -115,6 +115,7 @@
 #include "llvm/Support/raw_ostream.h"
 #include <cassert>
 #include <iterator>
+#include <map>
 #include <set>
 #include <utility>