Merge pull request #238 from flang-compiler/kaph-dprod

Added an implementation for the DPROD intrinsic

Author: AlexisPerry

flang/lib/Lower/IntrinsicCall.cpp

@@ -208,6 +208,7 @@ struct IntrinsicLibrary {
   mlir::Value genCeiling(mlir::Type, llvm::ArrayRef<mlir::Value>);
   mlir::Value genConjg(mlir::Type, llvm::ArrayRef<mlir::Value>);
   mlir::Value genDim(mlir::Type, llvm::ArrayRef<mlir::Value>);
+  mlir::Value genDprod(mlir::Type, llvm::ArrayRef<mlir::Value>);
   template <Extremum, ExtremumBehavior>
   mlir::Value genExtremum(mlir::Type, llvm::ArrayRef<mlir::Value>);
   mlir::Value genFloor(mlir::Type, llvm::ArrayRef<mlir::Value>);
@@ -301,6 +302,7 @@ static constexpr IntrinsicHandler handlers[]{
     {"conjg", &I::genConjg},
     {"dim", &I::genDim},
     {"dble", &I::genConversion},
+    {"dprod", &I::genDprod},
     {"floor", &I::genFloor},
     {"iand", &I::genIAnd},
     {"ichar", &I::genIchar},
@@ -1115,6 +1117,17 @@ mlir::Value IntrinsicLibrary::genDim(mlir::Type resultType,
   return builder.create<mlir::SelectOp>(loc, cmp, diff, zero);
 }
 
+// DPROD
+mlir::Value IntrinsicLibrary::genDprod(mlir::Type resultType,
+                                       llvm::ArrayRef<mlir::Value> args) {
+  assert(args.size() == 2);
+  assert(fir::isa_real(resultType) &&
+         "Result must be double precision in DPROD");
+  auto a = builder.createConvert(loc, resultType, args[0]);
+  auto b = builder.createConvert(loc, resultType, args[1]);
+  return builder.create<fir::MulfOp>(loc, a, b);
+}
+
 // FLOOR
 mlir::Value IntrinsicLibrary::genFloor(mlir::Type resultType,
                                        llvm::ArrayRef<mlir::Value> args) {

flang/test/Lower/intrinsics.f90

@@ -86,6 +86,20 @@ subroutine dim_testi(i, j, k)
   k = dim(i, j)
 end subroutine
 
+! DPROD
+! CHECK-LABEL: dprod_test
+subroutine dprod_test (x, y, z)
+  real :: x,y
+  double precision :: z
+  z = dprod(x,y)
+  ! CHECK-DAG: %[[x:.*]] = fir.load %arg0
+  ! CHECK-DAG: %[[y:.*]] = fir.load %arg1
+  ! CHECK-DAG: %[[a:.*]] = fir.convert %[[x]] : (f32) -> f64 
+  ! CHECK-DAG: %[[b:.*]] = fir.convert %[[y]] : (f32) -> f64 
+  ! CHECK: %[[res:.*]] = fir.mulf %[[a]], %[[b]]
+  ! CHECK: fir.store %[[res]] to %arg2
+end subroutine
+
 ! CEILING
 ! CHECK-LABEL: ceiling_test1
 subroutine ceiling_test1(i, a)