|
| 1 | +; NOTE: Assertions have been autogenerated by utils/update_test_checks.py |
| 2 | +; RUN: opt -S -instsimplify < %s | FileCheck %s |
| 3 | + |
| 4 | +define i1 @f16_si_max1(half %f) { |
| 5 | +; CHECK-LABEL: @f16_si_max1( |
| 6 | +; CHECK-NEXT: [[I:%.*]] = fptosi half [[F:%.*]] to i32 |
| 7 | +; CHECK-NEXT: [[C:%.*]] = icmp sge i32 [[I]], 65504 |
| 8 | +; CHECK-NEXT: ret i1 [[C]] |
| 9 | +; |
| 10 | + %i = fptosi half %f to i32 |
| 11 | + %c = icmp sge i32 %i, 65504 |
| 12 | + ret i1 %c |
| 13 | +} |
| 14 | + |
| 15 | +define i1 @f16_si_max2(half %f) { |
| 16 | +; CHECK-LABEL: @f16_si_max2( |
| 17 | +; CHECK-NEXT: [[I:%.*]] = fptosi half [[F:%.*]] to i32 |
| 18 | +; CHECK-NEXT: [[C:%.*]] = icmp sgt i32 [[I]], 65504 |
| 19 | +; CHECK-NEXT: ret i1 [[C]] |
| 20 | +; |
| 21 | + %i = fptosi half %f to i32 |
| 22 | + %c = icmp sgt i32 %i, 65504 |
| 23 | + ret i1 %c |
| 24 | +} |
| 25 | + |
| 26 | +define i1 @f16_si16_max2(half %f) { |
| 27 | +; CHECK-LABEL: @f16_si16_max2( |
| 28 | +; CHECK-NEXT: [[I:%.*]] = fptosi half [[F:%.*]] to i16 |
| 29 | +; CHECK-NEXT: [[C:%.*]] = icmp sgt i16 [[I]], -32 |
| 30 | +; CHECK-NEXT: ret i1 [[C]] |
| 31 | +; |
| 32 | + %i = fptosi half %f to i16 |
| 33 | + %c = icmp sgt i16 %i, 65504 |
| 34 | + ret i1 %c |
| 35 | +} |
| 36 | + |
| 37 | +define i1 @f16_si_min1(half %f) { |
| 38 | +; CHECK-LABEL: @f16_si_min1( |
| 39 | +; CHECK-NEXT: [[I:%.*]] = fptosi half [[F:%.*]] to i32 |
| 40 | +; CHECK-NEXT: [[C:%.*]] = icmp sge i32 [[I]], -65504 |
| 41 | +; CHECK-NEXT: ret i1 [[C]] |
| 42 | +; |
| 43 | + %i = fptosi half %f to i32 |
| 44 | + %c = icmp sge i32 %i, -65504 |
| 45 | + ret i1 %c |
| 46 | +} |
| 47 | + |
| 48 | +define i1 @f16_si16_min1(half %f) { |
| 49 | +; CHECK-LABEL: @f16_si16_min1( |
| 50 | +; CHECK-NEXT: [[I:%.*]] = fptosi half [[F:%.*]] to i16 |
| 51 | +; CHECK-NEXT: [[C:%.*]] = icmp sge i16 [[I]], 32 |
| 52 | +; CHECK-NEXT: ret i1 [[C]] |
| 53 | +; |
| 54 | + %i = fptosi half %f to i16 |
| 55 | + %c = icmp sge i16 %i, -65504 |
| 56 | + ret i1 %c |
| 57 | +} |
| 58 | + |
| 59 | +define i1 @f16_si_min2(half %f) { |
| 60 | +; CHECK-LABEL: @f16_si_min2( |
| 61 | +; CHECK-NEXT: [[I:%.*]] = fptosi half [[F:%.*]] to i32 |
| 62 | +; CHECK-NEXT: [[C:%.*]] = icmp sgt i32 [[I]], -65504 |
| 63 | +; CHECK-NEXT: ret i1 [[C]] |
| 64 | +; |
| 65 | + %i = fptosi half %f to i32 |
| 66 | + %c = icmp sgt i32 %i, -65504 |
| 67 | + ret i1 %c |
| 68 | +} |
| 69 | + |
| 70 | +define i1 @f16_ui_max1(half %f) { |
| 71 | +; CHECK-LABEL: @f16_ui_max1( |
| 72 | +; CHECK-NEXT: [[I:%.*]] = fptoui half [[F:%.*]] to i32 |
| 73 | +; CHECK-NEXT: [[C:%.*]] = icmp sge i32 [[I]], 65504 |
| 74 | +; CHECK-NEXT: ret i1 [[C]] |
| 75 | +; |
| 76 | + %i = fptoui half %f to i32 |
| 77 | + %c = icmp sge i32 %i, 65504 |
| 78 | + ret i1 %c |
| 79 | +} |
| 80 | + |
| 81 | +define i1 @f16_ui_max2(half %f) { |
| 82 | +; CHECK-LABEL: @f16_ui_max2( |
| 83 | +; CHECK-NEXT: [[I:%.*]] = fptoui half [[F:%.*]] to i32 |
| 84 | +; CHECK-NEXT: [[C:%.*]] = icmp sgt i32 [[I]], 65504 |
| 85 | +; CHECK-NEXT: ret i1 [[C]] |
| 86 | +; |
| 87 | + %i = fptoui half %f to i32 |
| 88 | + %c = icmp sgt i32 %i, 65504 |
| 89 | + ret i1 %c |
| 90 | +} |
| 91 | + |
| 92 | +define i1 @f16_ui16_max2(half %f) { |
| 93 | +; CHECK-LABEL: @f16_ui16_max2( |
| 94 | +; CHECK-NEXT: [[I:%.*]] = fptoui half [[F:%.*]] to i16 |
| 95 | +; CHECK-NEXT: [[C:%.*]] = icmp sgt i16 [[I]], -32 |
| 96 | +; CHECK-NEXT: ret i1 [[C]] |
| 97 | +; |
| 98 | + %i = fptoui half %f to i16 |
| 99 | + %c = icmp sgt i16 %i, 65504 |
| 100 | + ret i1 %c |
| 101 | +} |
| 102 | + |
| 103 | +define i1 @f16_ui16_max3(half %f) { |
| 104 | +; CHECK-LABEL: @f16_ui16_max3( |
| 105 | +; CHECK-NEXT: [[I:%.*]] = fptoui half [[F:%.*]] to i16 |
| 106 | +; CHECK-NEXT: [[C:%.*]] = icmp ule i16 [[I]], -32 |
| 107 | +; CHECK-NEXT: ret i1 [[C]] |
| 108 | +; |
| 109 | + %i = fptoui half %f to i16 |
| 110 | + %c = icmp ule i16 %i, 65504 |
| 111 | + ret i1 %c |
| 112 | +} |
| 113 | + |
| 114 | +define i1 @f16_ui_min1(half %f) { |
| 115 | +; CHECK-LABEL: @f16_ui_min1( |
| 116 | +; CHECK-NEXT: [[I:%.*]] = fptoui half [[F:%.*]] to i32 |
| 117 | +; CHECK-NEXT: [[C:%.*]] = icmp sge i32 [[I]], 0 |
| 118 | +; CHECK-NEXT: ret i1 [[C]] |
| 119 | +; |
| 120 | + %i = fptoui half %f to i32 |
| 121 | + %c = icmp sge i32 %i, 0 |
| 122 | + ret i1 %c |
| 123 | +} |
| 124 | + |
| 125 | +define i1 @f16_ui16_min1(half %f) { |
| 126 | +; CHECK-LABEL: @f16_ui16_min1( |
| 127 | +; CHECK-NEXT: [[I:%.*]] = fptoui half [[F:%.*]] to i16 |
| 128 | +; CHECK-NEXT: [[C:%.*]] = icmp sge i16 [[I]], 0 |
| 129 | +; CHECK-NEXT: ret i1 [[C]] |
| 130 | +; |
| 131 | + %i = fptoui half %f to i16 |
| 132 | + %c = icmp sge i16 %i, 0 |
| 133 | + ret i1 %c |
| 134 | +} |
| 135 | + |
| 136 | +define i1 @f16_ui_min2(half %f) { |
| 137 | +; CHECK-LABEL: @f16_ui_min2( |
| 138 | +; CHECK-NEXT: [[I:%.*]] = fptoui half [[F:%.*]] to i32 |
| 139 | +; CHECK-NEXT: [[C:%.*]] = icmp sgt i32 [[I]], 0 |
| 140 | +; CHECK-NEXT: ret i1 [[C]] |
| 141 | +; |
| 142 | + %i = fptoui half %f to i32 |
| 143 | + %c = icmp sgt i32 %i, 0 |
| 144 | + ret i1 %c |
| 145 | +} |
| 146 | + |
| 147 | + |
| 148 | + |
| 149 | +define <2 x i1> @v2f16_si_max(<2 x half> %f) { |
| 150 | +; CHECK-LABEL: @v2f16_si_max( |
| 151 | +; CHECK-NEXT: [[I:%.*]] = fptosi <2 x half> [[F:%.*]] to <2 x i32> |
| 152 | +; CHECK-NEXT: [[C:%.*]] = icmp sge <2 x i32> [[I]], <i32 65504, i32 65504> |
| 153 | +; CHECK-NEXT: ret <2 x i1> [[C]] |
| 154 | +; |
| 155 | + %i = fptosi <2 x half> %f to <2 x i32> |
| 156 | + %c = icmp sge <2 x i32> %i, <i32 65504, i32 65504> |
| 157 | + ret <2 x i1> %c |
| 158 | +} |
| 159 | + |
| 160 | +define <2 x i1> @v2f16_si_max2(<2 x half> %f) { |
| 161 | +; CHECK-LABEL: @v2f16_si_max2( |
| 162 | +; CHECK-NEXT: [[I:%.*]] = fptosi <2 x half> [[F:%.*]] to <2 x i32> |
| 163 | +; CHECK-NEXT: [[C:%.*]] = icmp sgt <2 x i32> [[I]], <i32 65504, i32 65504> |
| 164 | +; CHECK-NEXT: ret <2 x i1> [[C]] |
| 165 | +; |
| 166 | + %i = fptosi <2 x half> %f to <2 x i32> |
| 167 | + %c = icmp sgt <2 x i32> %i, <i32 65504, i32 65504> |
| 168 | + ret <2 x i1> %c |
| 169 | +} |
| 170 | + |
| 171 | +define <2 x i1> @v2f16_si16_max2(<2 x half> %f) { |
| 172 | +; CHECK-LABEL: @v2f16_si16_max2( |
| 173 | +; CHECK-NEXT: [[I:%.*]] = fptosi <2 x half> [[F:%.*]] to <2 x i16> |
| 174 | +; CHECK-NEXT: [[C:%.*]] = icmp sgt <2 x i16> [[I]], <i16 -32, i16 -32> |
| 175 | +; CHECK-NEXT: ret <2 x i1> [[C]] |
| 176 | +; |
| 177 | + %i = fptosi <2 x half> %f to <2 x i16> |
| 178 | + %c = icmp sgt <2 x i16> %i, <i16 65504, i16 65504> |
| 179 | + ret <2 x i1> %c |
| 180 | +} |
| 181 | + |
| 182 | +define <2 x i1> @v2f16_si_min1(<2 x half> %f) { |
| 183 | +; CHECK-LABEL: @v2f16_si_min1( |
| 184 | +; CHECK-NEXT: [[I:%.*]] = fptosi <2 x half> [[F:%.*]] to <2 x i32> |
| 185 | +; CHECK-NEXT: [[C:%.*]] = icmp sge <2 x i32> [[I]], <i32 -65504, i32 -65504> |
| 186 | +; CHECK-NEXT: ret <2 x i1> [[C]] |
| 187 | +; |
| 188 | + %i = fptosi <2 x half> %f to <2 x i32> |
| 189 | + %c = icmp sge <2 x i32> %i, <i32 -65504, i32 -65504> |
| 190 | + ret <2 x i1> %c |
| 191 | +} |
| 192 | + |
| 193 | +define <2 x i1> @v2f16_si16_min1(<2 x half> %f) { |
| 194 | +; CHECK-LABEL: @v2f16_si16_min1( |
| 195 | +; CHECK-NEXT: [[I:%.*]] = fptosi <2 x half> [[F:%.*]] to <2 x i16> |
| 196 | +; CHECK-NEXT: [[C:%.*]] = icmp sge <2 x i16> [[I]], <i16 32, i16 32> |
| 197 | +; CHECK-NEXT: ret <2 x i1> [[C]] |
| 198 | +; |
| 199 | + %i = fptosi <2 x half> %f to <2 x i16> |
| 200 | + %c = icmp sge <2 x i16> %i, <i16 -65504, i16 -65504> |
| 201 | + ret <2 x i1> %c |
| 202 | +} |
| 203 | + |
| 204 | +define <2 x i1> @v2f16_si_min2(<2 x half> %f) { |
| 205 | +; CHECK-LABEL: @v2f16_si_min2( |
| 206 | +; CHECK-NEXT: [[I:%.*]] = fptosi <2 x half> [[F:%.*]] to <2 x i32> |
| 207 | +; CHECK-NEXT: [[C:%.*]] = icmp sgt <2 x i32> [[I]], <i32 -65504, i32 -65504> |
| 208 | +; CHECK-NEXT: ret <2 x i1> [[C]] |
| 209 | +; |
| 210 | + %i = fptosi <2 x half> %f to <2 x i32> |
| 211 | + %c = icmp sgt <2 x i32> %i, <i32 -65504, i32 -65504> |
| 212 | + ret <2 x i1> %c |
| 213 | +} |
| 214 | + |
| 215 | +define <2 x i1> @v2f16_ui_max1(<2 x half> %f) { |
| 216 | +; CHECK-LABEL: @v2f16_ui_max1( |
| 217 | +; CHECK-NEXT: [[I:%.*]] = fptoui <2 x half> [[F:%.*]] to <2 x i32> |
| 218 | +; CHECK-NEXT: [[C:%.*]] = icmp sge <2 x i32> [[I]], <i32 65504, i32 65504> |
| 219 | +; CHECK-NEXT: ret <2 x i1> [[C]] |
| 220 | +; |
| 221 | + %i = fptoui <2 x half> %f to <2 x i32> |
| 222 | + %c = icmp sge <2 x i32> %i, <i32 65504, i32 65504> |
| 223 | + ret <2 x i1> %c |
| 224 | +} |
| 225 | + |
| 226 | +define <2 x i1> @v2f16_ui_max2(<2 x half> %f) { |
| 227 | +; CHECK-LABEL: @v2f16_ui_max2( |
| 228 | +; CHECK-NEXT: [[I:%.*]] = fptoui <2 x half> [[F:%.*]] to <2 x i32> |
| 229 | +; CHECK-NEXT: [[C:%.*]] = icmp sgt <2 x i32> [[I]], <i32 65504, i32 65504> |
| 230 | +; CHECK-NEXT: ret <2 x i1> [[C]] |
| 231 | +; |
| 232 | + %i = fptoui <2 x half> %f to <2 x i32> |
| 233 | + %c = icmp sgt <2 x i32> %i, <i32 65504, i32 65504> |
| 234 | + ret <2 x i1> %c |
| 235 | +} |
| 236 | + |
| 237 | +define <2 x i1> @v2f16_ui16_max2(<2 x half> %f) { |
| 238 | +; CHECK-LABEL: @v2f16_ui16_max2( |
| 239 | +; CHECK-NEXT: [[I:%.*]] = fptoui <2 x half> [[F:%.*]] to <2 x i16> |
| 240 | +; CHECK-NEXT: [[C:%.*]] = icmp sgt <2 x i16> [[I]], <i16 -32, i16 -32> |
| 241 | +; CHECK-NEXT: ret <2 x i1> [[C]] |
| 242 | +; |
| 243 | + %i = fptoui <2 x half> %f to <2 x i16> |
| 244 | + %c = icmp sgt <2 x i16> %i, <i16 65504, i16 65504> |
| 245 | + ret <2 x i1> %c |
| 246 | +} |
| 247 | + |
| 248 | +define <2 x i1> @v2f16_ui16_max3(<2 x half> %f) { |
| 249 | +; CHECK-LABEL: @v2f16_ui16_max3( |
| 250 | +; CHECK-NEXT: [[I:%.*]] = fptoui <2 x half> [[F:%.*]] to <2 x i16> |
| 251 | +; CHECK-NEXT: [[C:%.*]] = icmp ule <2 x i16> [[I]], <i16 -32, i16 -32> |
| 252 | +; CHECK-NEXT: ret <2 x i1> [[C]] |
| 253 | +; |
| 254 | + %i = fptoui <2 x half> %f to <2 x i16> |
| 255 | + %c = icmp ule <2 x i16> %i, <i16 65504, i16 65504> |
| 256 | + ret <2 x i1> %c |
| 257 | +} |
| 258 | + |
| 259 | +define <2 x i1> @v2f16_ui_min1(<2 x half> %f) { |
| 260 | +; CHECK-LABEL: @v2f16_ui_min1( |
| 261 | +; CHECK-NEXT: [[I:%.*]] = fptoui <2 x half> [[F:%.*]] to <2 x i32> |
| 262 | +; CHECK-NEXT: [[C:%.*]] = icmp sge <2 x i32> [[I]], zeroinitializer |
| 263 | +; CHECK-NEXT: ret <2 x i1> [[C]] |
| 264 | +; |
| 265 | + %i = fptoui <2 x half> %f to <2 x i32> |
| 266 | + %c = icmp sge <2 x i32> %i, <i32 0, i32 0> |
| 267 | + ret <2 x i1> %c |
| 268 | +} |
| 269 | + |
| 270 | +define <2 x i1> @v2f16_ui16_min1(<2 x half> %f) { |
| 271 | +; CHECK-LABEL: @v2f16_ui16_min1( |
| 272 | +; CHECK-NEXT: [[I:%.*]] = fptoui <2 x half> [[F:%.*]] to <2 x i16> |
| 273 | +; CHECK-NEXT: [[C:%.*]] = icmp sge <2 x i16> [[I]], zeroinitializer |
| 274 | +; CHECK-NEXT: ret <2 x i1> [[C]] |
| 275 | +; |
| 276 | + %i = fptoui <2 x half> %f to <2 x i16> |
| 277 | + %c = icmp sge <2 x i16> %i, <i16 0, i16 0> |
| 278 | + ret <2 x i1> %c |
| 279 | +} |
| 280 | + |
| 281 | +define <2 x i1> @v2f16_ui_min2(<2 x half> %f) { |
| 282 | +; CHECK-LABEL: @v2f16_ui_min2( |
| 283 | +; CHECK-NEXT: [[I:%.*]] = fptoui <2 x half> [[F:%.*]] to <2 x i32> |
| 284 | +; CHECK-NEXT: [[C:%.*]] = icmp sgt <2 x i32> [[I]], zeroinitializer |
| 285 | +; CHECK-NEXT: ret <2 x i1> [[C]] |
| 286 | +; |
| 287 | + %i = fptoui <2 x half> %f to <2 x i32> |
| 288 | + %c = icmp sgt <2 x i32> %i, <i32 0, i32 0> |
| 289 | + ret <2 x i1> %c |
| 290 | +} |
| 291 | + |
| 292 | +declare i32 @llvm.fptosi.sat.i32.f16(half) |
| 293 | +declare i32 @llvm.fptoui.sat.i32.f16(half) |
| 294 | +declare <2 x i32> @llvm.fptosi.sat.v2i32.v2f16(<2 x half>) |
| 295 | +declare <2 x i32> @llvm.fptoui.sat.v2i32.v2f16(<2 x half>) |
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