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1 | 1 | /*
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2 |
| - * Copyright (C) 2021 Intel Corporation |
| 2 | + * Copyright (C) 2021-2024 Intel Corporation |
3 | 3 | *
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4 | 4 | * SPDX-License-Identifier: MIT
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5 | 5 | *
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@@ -49,17 +49,17 @@ TEST(L3Range, whenTooBigSizeThenMaskCalculationIsAborted) {
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49 | 49 | EXPECT_THROW(L3Range::getMaskFromSize(l3RangeMax * 2), std::exception);
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50 | 50 | }
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51 | 51 |
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52 |
| -TEST(L3Range, WhenGettingMaskFromSizeThenCorrectSizeIsReturned) { |
| 52 | +TEST(L3Range, WhenGettingMaskFromSizeThenCorrectMaskIsSet) { |
53 | 53 | L3Range range;
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54 | 54 |
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55 | 55 | range.setMask(L3Range::getMaskFromSize(l3RangeMinimumAlignment));
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56 |
| - EXPECT_EQ(l3RangeMinimumAlignment, range.getSizeInBytes()); |
| 56 | + EXPECT_EQ(0u, range.getMask()); |
57 | 57 |
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58 | 58 | range.setMask(L3Range::getMaskFromSize(l3RangeMinimumAlignment * 4));
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59 |
| - EXPECT_EQ(l3RangeMinimumAlignment * 4, range.getSizeInBytes()); |
| 59 | + EXPECT_EQ(2u, range.getMask()); |
60 | 60 |
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61 | 61 | range.setMask(L3Range::getMaskFromSize(l3RangeMax));
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62 |
| - EXPECT_EQ(l3RangeMax, range.getSizeInBytes()); |
| 62 | + EXPECT_EQ(32u - L3Range::minAlignmentBitOffset, range.getMask()); |
63 | 63 | }
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64 | 64 |
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65 | 65 | TEST(L3Range, whenMaskGetsChangedThenReturnsProperlyMaskedAddress) {
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@@ -154,7 +154,7 @@ TEST(CoverRange, whenNonAlignedThenAbort) {
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154 | 154 |
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155 | 155 | L3Range fromAdjacentRange(const L3Range &lhs, uint64_t size) {
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156 | 156 | L3Range ret;
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157 |
| - ret.setAddress(lhs.getMaskedAddress() + lhs.getSizeInBytes()); |
| 157 | + ret.setAddress(lhs.getMaskedAddress() + maxNBitValue(L3Range::minAlignmentBitOffset + lhs.getMask()) + 1); |
158 | 158 | ret.setMask(L3Range::getMaskFromSize(size));
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159 | 159 | return ret;
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160 | 160 | }
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