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Add unit test helper function to set pipe control hdc flush
Separate unit test helper definitions bdw_and_later / xe_hp_and_later Related-To: NEO-6466 Signed-off-by: Mateusz Jablonski <[email protected]>
1 parent fc22420 commit e5a1817

26 files changed

+142
-97
lines changed

level_zero/core/test/unit_tests/sources/cmdlist/test_cmdlist_1.cpp

Lines changed: 3 additions & 2 deletions
Original file line numberDiff line numberDiff line change
@@ -7,6 +7,7 @@
77

88
#include "shared/source/gmm_helper/gmm_helper.h"
99
#include "shared/test/common/cmd_parse/gen_cmd_parse.h"
10+
#include "shared/test/common/helpers/unit_test_helper.h"
1011
#include "shared/test/common/mocks/mock_memory_manager.h"
1112
#include "shared/test/common/test_macros/test.h"
1213
#include "shared/test/unit_test/page_fault_manager/mock_cpu_page_fault_manager.h"
@@ -1514,7 +1515,7 @@ HWTEST2_F(CommandListCreate, givenCommandListWhenAppendingBarrierThenPipeControl
15141515
EXPECT_NE(cmdList.end(), itor);
15151516

15161517
auto pipeControlCmd = reinterpret_cast<typename FamilyType::PIPE_CONTROL *>(*itor);
1517-
EXPECT_TRUE(pipeControlCmd->getHdcPipelineFlush());
1518+
EXPECT_TRUE(UnitTestHelper<FamilyType>::getPipeControlHdcPipelineFlush(*pipeControlCmd));
15181519
}
15191520

15201521
HWTEST2_F(CommandListCreate, givenCommandListWhenAppendingBarrierThenPipeControlIsProgrammedWithHdcAndUntypedFlushSet, IsAtLeastXeHpgCore) {
@@ -1534,7 +1535,7 @@ HWTEST2_F(CommandListCreate, givenCommandListWhenAppendingBarrierThenPipeControl
15341535
EXPECT_NE(cmdList.end(), itor);
15351536

15361537
auto pipeControlCmd = reinterpret_cast<typename FamilyType::PIPE_CONTROL *>(*itor);
1537-
EXPECT_TRUE(pipeControlCmd->getHdcPipelineFlush());
1538+
EXPECT_TRUE(UnitTestHelper<FamilyType>::getPipeControlHdcPipelineFlush(*pipeControlCmd));
15381539
EXPECT_TRUE(pipeControlCmd->getUnTypedDataPortCacheFlush());
15391540
}
15401541

opencl/test/unit_test/command_stream/command_stream_receiver_flush_task_tests_xehp_and_later.cpp

Lines changed: 5 additions & 5 deletions
Original file line numberDiff line numberDiff line change
@@ -1,5 +1,5 @@
11
/*
2-
* Copyright (C) 2021 Intel Corporation
2+
* Copyright (C) 2021-2022 Intel Corporation
33
*
44
* SPDX-License-Identifier: MIT
55
*
@@ -92,7 +92,7 @@ HWCMDTEST_F(IGFX_XE_HP_CORE, CommandStreamReceiverFlushTaskXeHPAndLaterTests, gi
9292
auto pipeControlCmd = reinterpret_cast<typename FamilyType::PIPE_CONTROL *>(*pipeControlItor);
9393
EXPECT_TRUE(pipeControlCmd->getTextureCacheInvalidationEnable());
9494
EXPECT_EQ(MemorySynchronizationCommands<FamilyType>::getDcFlushEnable(true, *defaultHwInfo), pipeControlCmd->getDcFlushEnable());
95-
EXPECT_TRUE(pipeControlCmd->getHdcPipelineFlush());
95+
EXPECT_TRUE(UnitTestHelper<FamilyType>::getPipeControlHdcPipelineFlush(*pipeControlCmd));
9696
}
9797

9898
HWCMDTEST_F(IGFX_XE_HP_CORE, CommandStreamReceiverFlushTaskXeHPAndLaterTests, givenProgramPipeControlPriorToNonPipelinedStateCommandDebugKeyAndStateBaseAddressWhenItIsRequiredThenThereIsPipeControlPriorToIt) {
@@ -111,14 +111,14 @@ HWCMDTEST_F(IGFX_XE_HP_CORE, CommandStreamReceiverFlushTaskXeHPAndLaterTests, gi
111111
auto pipeControlItor = find<typename FamilyType::PIPE_CONTROL *>(cmdList.begin(), stateBaseAddressItor);
112112
EXPECT_NE(stateBaseAddressItor, pipeControlItor);
113113
auto pipeControlCmd = reinterpret_cast<typename FamilyType::PIPE_CONTROL *>(*pipeControlItor);
114-
EXPECT_TRUE(pipeControlCmd->getHdcPipelineFlush());
114+
EXPECT_TRUE(UnitTestHelper<FamilyType>::getPipeControlHdcPipelineFlush(*pipeControlCmd));
115115
EXPECT_TRUE(pipeControlCmd->getAmfsFlushEnable());
116116
EXPECT_TRUE(pipeControlCmd->getCommandStreamerStallEnable());
117117
EXPECT_TRUE(pipeControlCmd->getInstructionCacheInvalidateEnable());
118118
EXPECT_TRUE(pipeControlCmd->getTextureCacheInvalidationEnable());
119119
EXPECT_TRUE(pipeControlCmd->getConstantCacheInvalidationEnable());
120120
EXPECT_TRUE(pipeControlCmd->getStateCacheInvalidationEnable());
121-
EXPECT_TRUE(pipeControlCmd->getHdcPipelineFlush());
121+
EXPECT_TRUE(UnitTestHelper<FamilyType>::getPipeControlHdcPipelineFlush(*pipeControlCmd));
122122
}
123123

124124
HWCMDTEST_F(IGFX_XE_HP_CORE, CommandStreamReceiverFlushTaskXeHPAndLaterTests, givenProgramPipeControlPriorToNonPipelinedStateCommandDebugKeyAndStateSipWhenItIsRequiredThenThereIsPipeControlPriorToIt) {
@@ -144,7 +144,7 @@ HWCMDTEST_F(IGFX_XE_HP_CORE, CommandStreamReceiverFlushTaskXeHPAndLaterTests, gi
144144
auto pipeControlIterator = find<PIPE_CONTROL *>(cmdList.begin(), cmdList.end());
145145
auto pipeControlCmd = genCmdCast<PIPE_CONTROL *>(*pipeControlIterator);
146146

147-
EXPECT_TRUE(pipeControlCmd->getHdcPipelineFlush());
147+
EXPECT_TRUE(UnitTestHelper<FamilyType>::getPipeControlHdcPipelineFlush(*pipeControlCmd));
148148
EXPECT_TRUE(pipeControlCmd->getAmfsFlushEnable());
149149
EXPECT_TRUE(pipeControlCmd->getCommandStreamerStallEnable());
150150
EXPECT_TRUE(pipeControlCmd->getInstructionCacheInvalidateEnable());

opencl/test/unit_test/command_stream/command_stream_receiver_hw_tests_dg2_and_later.cpp

Lines changed: 2 additions & 2 deletions
Original file line numberDiff line numberDiff line change
@@ -1,5 +1,5 @@
11
/*
2-
* Copyright (C) 2021 Intel Corporation
2+
* Copyright (C) 2021-2022 Intel Corporation
33
*
44
* SPDX-License-Identifier: MIT
55
*
@@ -118,7 +118,7 @@ HWTEST2_F(CommandStreamReceiverFlushTasDg2AndLaterTests, givenProgramPipeControl
118118
--_3dStateBtdIterator;
119119
auto pipeControlCmd = genCmdCast<PIPE_CONTROL *>(*_3dStateBtdIterator);
120120

121-
EXPECT_TRUE(pipeControlCmd->getHdcPipelineFlush());
121+
EXPECT_TRUE(UnitTestHelper<FamilyType>::getPipeControlHdcPipelineFlush(*pipeControlCmd));
122122
EXPECT_TRUE(pipeControlCmd->getAmfsFlushEnable());
123123
EXPECT_TRUE(pipeControlCmd->getCommandStreamerStallEnable());
124124
EXPECT_TRUE(pipeControlCmd->getInstructionCacheInvalidateEnable());

opencl/test/unit_test/helpers/hw_helper_tests_dg2_and_later.cpp

Lines changed: 5 additions & 5 deletions
Original file line numberDiff line numberDiff line change
@@ -1,5 +1,5 @@
11
/*
2-
* Copyright (C) 2021 Intel Corporation
2+
* Copyright (C) 2021-2022 Intel Corporation
33
*
44
* SPDX-License-Identifier: MIT
55
*
@@ -44,7 +44,7 @@ HWTEST2_F(PipeControlHelperTestsDg2AndLater, WhenAddingPipeControlWAThenCorrectC
4444

4545
PIPE_CONTROL expectedPipeControl = FamilyType::cmdInitPipeControl;
4646
expectedPipeControl.setCommandStreamerStallEnable(true);
47-
expectedPipeControl.setHdcPipelineFlush(true);
47+
UnitTestHelper<FamilyType>::setPipeControlHdcPipelineFlush(expectedPipeControl, true);
4848
expectedPipeControl.setUnTypedDataPortCacheFlush(true);
4949
auto it = cmdList.begin();
5050
auto pPipeControl = genCmdCast<PIPE_CONTROL *>(*it);
@@ -107,7 +107,7 @@ HWTEST2_F(PipeControlHelperTestsDg2AndLater, givenRequestedCacheFlushesWhenProgr
107107
MemorySynchronizationCommands<FamilyType>::addPipeControl(stream, args);
108108

109109
auto pipeControl = reinterpret_cast<PIPE_CONTROL *>(buffer);
110-
EXPECT_TRUE(pipeControl->getHdcPipelineFlush());
110+
EXPECT_TRUE(UnitTestHelper<FamilyType>::getPipeControlHdcPipelineFlush(*pipeControl));
111111
EXPECT_TRUE(pipeControl->getUnTypedDataPortCacheFlush());
112112
EXPECT_TRUE(pipeControl->getCompressionControlSurfaceCcsFlush());
113113
}
@@ -124,7 +124,7 @@ HWTEST2_F(PipeControlHelperTestsDg2AndLater, givenDebugVariableSetWhenProgrammin
124124
MemorySynchronizationCommands<FamilyType>::addPipeControl(stream, args);
125125

126126
auto pipeControl = reinterpret_cast<PIPE_CONTROL *>(buffer);
127-
EXPECT_TRUE(pipeControl->getHdcPipelineFlush());
127+
EXPECT_TRUE(UnitTestHelper<FamilyType>::getPipeControlHdcPipelineFlush(*pipeControl));
128128
EXPECT_TRUE(pipeControl->getUnTypedDataPortCacheFlush());
129129
EXPECT_TRUE(pipeControl->getCompressionControlSurfaceCcsFlush());
130130
}
@@ -144,7 +144,7 @@ HWTEST2_F(PipeControlHelperTestsDg2AndLater, givenDebugDisableCacheFlushWhenProg
144144
MemorySynchronizationCommands<FamilyType>::addPipeControl(stream, args);
145145

146146
auto pipeControl = reinterpret_cast<PIPE_CONTROL *>(buffer);
147-
EXPECT_FALSE(pipeControl->getHdcPipelineFlush());
147+
EXPECT_FALSE(UnitTestHelper<FamilyType>::getPipeControlHdcPipelineFlush(*pipeControl));
148148
EXPECT_FALSE(pipeControl->getUnTypedDataPortCacheFlush());
149149
EXPECT_FALSE(pipeControl->getCompressionControlSurfaceCcsFlush());
150150
}

opencl/test/unit_test/helpers/hw_helper_tests_xehp_and_later.cpp

Lines changed: 5 additions & 5 deletions
Original file line numberDiff line numberDiff line change
@@ -1,5 +1,5 @@
11
/*
2-
* Copyright (C) 2021 Intel Corporation
2+
* Copyright (C) 2021-2022 Intel Corporation
33
*
44
* SPDX-License-Identifier: MIT
55
*
@@ -248,7 +248,7 @@ HWCMDTEST_F(IGFX_XE_HP_CORE, PipeControlHelperTestsXeHPAndLater, WhenAddingPipeC
248248

249249
PIPE_CONTROL expectedPipeControl = FamilyType::cmdInitPipeControl;
250250
expectedPipeControl.setCommandStreamerStallEnable(true);
251-
expectedPipeControl.setHdcPipelineFlush(true);
251+
UnitTestHelper<FamilyType>::setPipeControlHdcPipelineFlush(expectedPipeControl, true);
252252
auto it = cmdList.begin();
253253
auto pPipeControl = genCmdCast<PIPE_CONTROL *>(*it);
254254
ASSERT_NE(nullptr, pPipeControl);
@@ -312,7 +312,7 @@ HWCMDTEST_F(IGFX_XE_HP_CORE, PipeControlHelperTestsXeHPAndLater, givenRequestedC
312312
MemorySynchronizationCommands<FamilyType>::addPipeControl(stream, args);
313313

314314
auto pipeControl = reinterpret_cast<PIPE_CONTROL *>(buffer);
315-
EXPECT_TRUE(pipeControl->getHdcPipelineFlush());
315+
EXPECT_TRUE(UnitTestHelper<FamilyType>::getPipeControlHdcPipelineFlush(*pipeControl));
316316
EXPECT_TRUE(pipeControl->getCompressionControlSurfaceCcsFlush());
317317
}
318318

@@ -328,7 +328,7 @@ HWCMDTEST_F(IGFX_XE_HP_CORE, PipeControlHelperTestsXeHPAndLater, givenDebugVaria
328328
MemorySynchronizationCommands<FamilyType>::addPipeControl(stream, args);
329329

330330
auto pipeControl = reinterpret_cast<PIPE_CONTROL *>(buffer);
331-
EXPECT_TRUE(pipeControl->getHdcPipelineFlush());
331+
EXPECT_TRUE(UnitTestHelper<FamilyType>::getPipeControlHdcPipelineFlush(*pipeControl));
332332
EXPECT_TRUE(pipeControl->getCompressionControlSurfaceCcsFlush());
333333
}
334334

@@ -346,7 +346,7 @@ HWCMDTEST_F(IGFX_XE_HP_CORE, PipeControlHelperTestsXeHPAndLater, givenDebugDisab
346346
MemorySynchronizationCommands<FamilyType>::addPipeControl(stream, args);
347347

348348
auto pipeControl = reinterpret_cast<PIPE_CONTROL *>(buffer);
349-
EXPECT_FALSE(pipeControl->getHdcPipelineFlush());
349+
EXPECT_FALSE(UnitTestHelper<FamilyType>::getPipeControlHdcPipelineFlush(*pipeControl));
350350
EXPECT_FALSE(pipeControl->getCompressionControlSurfaceCcsFlush());
351351
}
352352

shared/source/gen11/hw_cmds_base.h

Lines changed: 1 addition & 0 deletions
Original file line numberDiff line numberDiff line change
@@ -21,6 +21,7 @@ struct GEN11 {
2121
#include "shared/source/generated/gen11/hw_cmds_generated_gen11.inl"
2222

2323
static constexpr bool supportsSampler = true;
24+
static constexpr bool isUsingGenericMediaStateClear = true;
2425
struct DataPortBindlessSurfaceExtendedMessageDescriptor {
2526
union {
2627
struct {

shared/source/gen12lp/hw_cmds_base.h

Lines changed: 1 addition & 0 deletions
Original file line numberDiff line numberDiff line change
@@ -23,6 +23,7 @@ struct GEN12LP {
2323
#include "shared/source/generated/gen12lp/hw_cmds_generated_gen12lp.inl"
2424

2525
static constexpr bool supportsSampler = true;
26+
static constexpr bool isUsingGenericMediaStateClear = true;
2627
static constexpr uint32_t stateComputeModeForceNonCoherentMask = (0b11u << 3);
2728

2829
struct DataPortBindlessSurfaceExtendedMessageDescriptor {

shared/source/gen8/hw_cmds_base.h

Lines changed: 1 addition & 0 deletions
Original file line numberDiff line numberDiff line change
@@ -23,6 +23,7 @@ struct GEN8 {
2323
#include "shared/source/generated/gen8/hw_cmds_generated_gen8.inl"
2424

2525
static constexpr bool supportsSampler = true;
26+
static constexpr bool isUsingGenericMediaStateClear = true;
2627
struct DataPortBindlessSurfaceExtendedMessageDescriptor {
2728
union {
2829
struct {

shared/source/gen9/hw_cmds_base.h

Lines changed: 1 addition & 0 deletions
Original file line numberDiff line numberDiff line change
@@ -23,6 +23,7 @@ struct GEN9 {
2323
#include "shared/source/generated/gen9/hw_cmds_generated_gen9.inl"
2424

2525
static constexpr bool supportsSampler = true;
26+
static constexpr bool isUsingGenericMediaStateClear = true;
2627
struct DataPortBindlessSurfaceExtendedMessageDescriptor {
2728
union {
2829
struct {

shared/source/helpers/hw_helper_base.inl

Lines changed: 3 additions & 1 deletion
Original file line numberDiff line numberDiff line change
@@ -313,11 +313,13 @@ void MemorySynchronizationCommands<GfxFamily>::setPipeControl(typename GfxFamily
313313
pipeControl.setStateCacheInvalidationEnable(args.stateCacheInvalidationEnable);
314314
pipeControl.setTextureCacheInvalidationEnable(args.textureCacheInvalidationEnable);
315315
pipeControl.setVfCacheInvalidationEnable(args.vfCacheInvalidationEnable);
316-
pipeControl.setGenericMediaStateClear(args.genericMediaStateClear);
317316
pipeControl.setTlbInvalidate(args.tlbInvalidation);
318317
pipeControl.setNotifyEnable(args.notifyEnable);
319318
pipeControl.setDcFlushEnable(args.dcFlushEnable);
320319

320+
if constexpr (GfxFamily::isUsingGenericMediaStateClear) {
321+
pipeControl.setGenericMediaStateClear(args.genericMediaStateClear);
322+
}
321323
setPipeControlExtraProperties(pipeControl, args);
322324

323325
if (DebugManager.flags.FlushAllCaches.get()) {

shared/source/helpers/hw_helper_dg2_and_later.inl

Lines changed: 3 additions & 3 deletions
Original file line numberDiff line numberDiff line change
@@ -1,5 +1,5 @@
11
/*
2-
* Copyright (C) 2021 Intel Corporation
2+
* Copyright (C) 2021-2022 Intel Corporation
33
*
44
* SPDX-License-Identifier: MIT
55
*
@@ -45,8 +45,8 @@ inline void MemorySynchronizationCommands<GfxFamily>::setCacheFlushExtraProperti
4545
args.unTypedDataPortCacheFlush = true;
4646
}
4747

48-
template <>
49-
void MemorySynchronizationCommands<Family>::setPipeControlWAFlags(PIPE_CONTROL &pipeControl) {
48+
template <typename GfxFamily>
49+
void MemorySynchronizationCommands<GfxFamily>::setPipeControlWAFlags(PIPE_CONTROL &pipeControl) {
5050
pipeControl.setCommandStreamerStallEnable(true);
5151
pipeControl.setHdcPipelineFlush(true);
5252
pipeControl.setUnTypedDataPortCacheFlush(true);

shared/source/xe_hp_core/hw_cmds_base.h

Lines changed: 1 addition & 0 deletions
Original file line numberDiff line numberDiff line change
@@ -30,6 +30,7 @@ struct XeHpCore {
3030
static constexpr bool isUsingL3Control = true;
3131
static constexpr bool isUsingMediaSamplerDopClockGate = true;
3232
static constexpr bool supportsSampler = true;
33+
static constexpr bool isUsingGenericMediaStateClear = true;
3334

3435
struct DataPortBindlessSurfaceExtendedMessageDescriptor {
3536
union {

shared/source/xe_hpc_core/hw_cmds_base.h

Lines changed: 1 addition & 0 deletions
Original file line numberDiff line numberDiff line change
@@ -36,6 +36,7 @@ struct XE_HPC_CORE {
3636
static constexpr bool isUsingL3Control = false;
3737
static constexpr bool isUsingMediaSamplerDopClockGate = false;
3838
static constexpr bool supportsSampler = false;
39+
static constexpr bool isUsingGenericMediaStateClear = true;
3940

4041
static bool isXlA0(const HardwareInfo &hwInfo) {
4142
auto revId = hwInfo.platform.usRevId & pvcSteppingBits;

shared/source/xe_hpg_core/hw_cmds_base.h

Lines changed: 1 addition & 0 deletions
Original file line numberDiff line numberDiff line change
@@ -30,6 +30,7 @@ struct XE_HPG_CORE {
3030
static constexpr bool isUsingL3Control = true;
3131
static constexpr bool isUsingMediaSamplerDopClockGate = false;
3232
static constexpr bool supportsSampler = true;
33+
static constexpr bool isUsingGenericMediaStateClear = true;
3334

3435
struct DataPortBindlessSurfaceExtendedMessageDescriptor {
3536
union {

shared/test/common/gen11/unit_test_helper_gen11.cpp

Lines changed: 2 additions & 1 deletion
Original file line numberDiff line numberDiff line change
@@ -1,5 +1,5 @@
11
/*
2-
* Copyright (C) 2021 Intel Corporation
2+
* Copyright (C) 2021-2022 Intel Corporation
33
*
44
* SPDX-License-Identifier: MIT
55
*
@@ -8,6 +8,7 @@
88
#include "shared/source/gen11/hw_info.h"
99
#include "shared/test/common/helpers/unit_test_helper.h"
1010
#include "shared/test/common/helpers/unit_test_helper.inl"
11+
#include "shared/test/common/helpers/unit_test_helper_bdw_and_later.inl"
1112

1213
namespace NEO {
1314

shared/test/common/gen12lp/unit_test_helper_gen12lp.cpp

Lines changed: 2 additions & 1 deletion
Original file line numberDiff line numberDiff line change
@@ -1,5 +1,5 @@
11
/*
2-
* Copyright (C) 2021 Intel Corporation
2+
* Copyright (C) 2021-2022 Intel Corporation
33
*
44
* SPDX-License-Identifier: MIT
55
*
@@ -8,6 +8,7 @@
88
#include "shared/source/gen12lp/hw_info.h"
99
#include "shared/test/common/helpers/unit_test_helper.h"
1010
#include "shared/test/common/helpers/unit_test_helper.inl"
11+
#include "shared/test/common/helpers/unit_test_helper_bdw_and_later.inl"
1112
#include "shared/test/common/libult/gen12lp/special_ult_helper_gen12lp.h"
1213

1314
namespace NEO {

shared/test/common/gen8/unit_test_helper_gen8.cpp

Lines changed: 2 additions & 1 deletion
Original file line numberDiff line numberDiff line change
@@ -1,5 +1,5 @@
11
/*
2-
* Copyright (C) 2021 Intel Corporation
2+
* Copyright (C) 2021-2022 Intel Corporation
33
*
44
* SPDX-License-Identifier: MIT
55
*
@@ -8,6 +8,7 @@
88
#include "shared/source/gen8/hw_info.h"
99
#include "shared/test/common/helpers/unit_test_helper.h"
1010
#include "shared/test/common/helpers/unit_test_helper.inl"
11+
#include "shared/test/common/helpers/unit_test_helper_bdw_and_later.inl"
1112

1213
namespace NEO {
1314

shared/test/common/gen9/unit_test_helper_gen9.cpp

Lines changed: 2 additions & 1 deletion
Original file line numberDiff line numberDiff line change
@@ -1,5 +1,5 @@
11
/*
2-
* Copyright (C) 2021 Intel Corporation
2+
* Copyright (C) 2021-2022 Intel Corporation
33
*
44
* SPDX-License-Identifier: MIT
55
*
@@ -8,6 +8,7 @@
88
#include "shared/source/gen9/hw_info.h"
99
#include "shared/test/common/helpers/unit_test_helper.h"
1010
#include "shared/test/common/helpers/unit_test_helper.inl"
11+
#include "shared/test/common/helpers/unit_test_helper_bdw_and_later.inl"
1112

1213
namespace NEO {
1314
using Family = SKLFamily;

shared/test/common/helpers/unit_test_helper.h

Lines changed: 3 additions & 1 deletion
Original file line numberDiff line numberDiff line change
@@ -1,5 +1,5 @@
11
/*
2-
* Copyright (C) 2018-2021 Intel Corporation
2+
* Copyright (C) 2018-2022 Intel Corporation
33
*
44
* SPDX-License-Identifier: MIT
55
*
@@ -67,6 +67,8 @@ struct UnitTestHelper {
6767
static const bool additionalMiFlushDwRequired;
6868

6969
static uint64_t getPipeControlPostSyncAddress(const typename GfxFamily::PIPE_CONTROL &pipeControl);
70+
static bool getPipeControlHdcPipelineFlush(const typename GfxFamily::PIPE_CONTROL &pipeControl);
71+
static void setPipeControlHdcPipelineFlush(typename GfxFamily::PIPE_CONTROL &pipeControl, bool hdcPipelineFlush);
7072
};
7173

7274
} // namespace NEO

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