replace the sysDesc in fusion pass

Author: zhczhong

include/gc/Transforms/Passes.td

@@ -49,43 +49,35 @@ def LinalgToXeGPU : Pass<"linalg-to-xegpu", "func::FuncOp"> {
 }
 #endif
 
-def IterativeTilingAndFusion
-    : Pass<"iterative-tiling-and-fusion", "func::FuncOp"> {
+def IterativeTilingAndFusion : Pass<"iterative-tiling-and-fusion",
+                                        "func::FuncOp"> {
   let summary = "Iterative tiling and fusion for any tilable operation";
   let description = [{
-    The pass tries to fuse any MLIR operation which can be tiled.Moreover,
-    this pass aims to
-    support: 1. Matmul fusion with element -
-                 wise / reduce / broadcast ops.2. Pre - op and post -
-                 op fusion.3. Multi - consumer and multi -
-                 producer support.4. Multiple level of nest loops and candidates
-                     .5. Flexible option to control the boundary of iterative
-                         process.6. Cost -
-                 model to determine whether to fuse or not.
+    The pass tries to fuse any MLIR operation which can be tiled. Moreover, this pass aims to support:
+      1. Matmul fusion with element-wise/reduce/broadcast ops.
+      2. Pre-op and post-op fusion.
+      3. Multi-consumer and multi-producer support.
+      4. Multiple level of nest loops and candidates.
+      5. Flexible option to control the boundary of iterative process.
+      6. Cost-model to determine whether to fuse or not.
 
-                 It intends to control the granularity of fusion by `fusion -
-                 level`,
-    E.g.* `0`: disable any fusion.* `1`:
-            [Default] enable both producer and consumer fusion,
-    covering any tilable operation including tensor.pack / tensor.fill /
-            linalg.reduce etc but excluding branches forked by multiple
-                uses.* `2`: `LEVEL 1` +
-        extend to any topology including branches.
+    It intends to control the granularity of fusion by `fusion-level`, E.g.
+    * `0`: disable any fusion.
+    * `1`:[Default] enable both producer and consumer fusion, covering any tilable operation including tensor.pack/tensor.fill/linalg.reduce etc but excluding branches forked by multiple uses.
+    * `2`: `LEVEL 1` + extend to any topology including branches.
   }];
-  let dependentDialects = [
-    "func::FuncDialect", "linalg::LinalgDialect", "scf::SCFDialect",
-    "tensor::TensorDialect"
-  ];
+  let dependentDialects = ["func::FuncDialect", "linalg::LinalgDialect", "scf::SCFDialect",
+                           "tensor::TensorDialect"];
 
   let options = [
     Option<"fusionLevel", "fusion-level", "int64_t",
-           /*default=*/"1", "Control the granularity of fusion.">,
+           /*default=*/"1",
+           "Control the granularity of fusion.">,
     Option<"useCostModel", "use-cost-model", "bool",
            /*default=*/"false",
            "Decide if enable cost model to control iterative fusion.">,
     ListOption<"defaultTileSize", "default-tile-size", "std::string",
-               "Set default TileSize for the certain type of op, saying "
-               "matmul:{32,32}">,
+           "Set default TileSize for the certain type of op, saying matmul:{32,32}">,
   ];
 }
 

lib/gc/Transforms/IterativeTilingAndFusion.cpp

@@ -6,6 +6,7 @@
 //
 //===----------------------------------------------------------------------===//
 
+#include "gc/Analysis/TargetDescriptionAnalysis.h"
 #include "gc/Transforms/Passes.h"
 #include "mlir/Analysis/TopologicalSortUtils.h"
 #include "mlir/Dialect/DLTI/Traits.h"
@@ -579,62 +580,6 @@ static LogicalResult isSelfTiledOp(Operation *targetOp) {
   return success(walkResult.wasInterrupted());
 }
 
-struct SystemDesc {
-  // get runtime OMP_NUM_THREADS
-  uint32_t getNumThreads() {
-    std::optional<Attribute> numThreads = layout.getDevicePropertyValue(
-        Builder(ctx).getStringAttr("CPU" /* device ID*/),
-        Builder(ctx).getStringAttr("num_threads"));
-    if (numThreads && isa<IntegerAttr>(*numThreads)) {
-      return dyn_cast<IntegerAttr>(*numThreads).getInt();
-    }
-    return 1;
-  }
-  // get cache size by cacheLevel
-  size_t getCacheSize(uint8_t cacheLevel) {
-    if (cacheLevel == 1) {
-      std::optional<Attribute> cacheSize = layout.getDevicePropertyValue(
-          Builder(ctx).getStringAttr("CPU" /* device ID*/),
-          Builder(ctx).getStringAttr("L1_cache_size_in_bytes"));
-      if (cacheSize && isa<IntegerAttr>(*cacheSize)) {
-        return dyn_cast<IntegerAttr>(*cacheSize).getInt();
-      }
-    } else if (cacheLevel == 2) {
-      std::optional<Attribute> cacheSize = layout.getDevicePropertyValue(
-          Builder(ctx).getStringAttr("CPU" /* device ID*/),
-          Builder(ctx).getStringAttr("L2_cache_size_in_bytes"));
-      if (cacheSize && isa<IntegerAttr>(*cacheSize)) {
-        return dyn_cast<IntegerAttr>(*cacheSize).getInt();
-      }
-    } else if (cacheLevel == 3) {
-      std::optional<Attribute> cacheSize = layout.getDevicePropertyValue(
-          Builder(ctx).getStringAttr("CPU" /* device ID*/),
-          Builder(ctx).getStringAttr("L3_cache_size_in_bytes"));
-      if (cacheSize && isa<IntegerAttr>(*cacheSize)) {
-        return dyn_cast<IntegerAttr>(*cacheSize).getInt();
-      }
-    }
-    return 0;
-  }
-
-  // get the maximum vector length in bits
-  size_t getMaxVectorLength() {
-    std::optional<Attribute> maxVectorLength = layout.getDevicePropertyValue(
-        Builder(ctx).getStringAttr("CPU" /* device ID*/),
-        Builder(ctx).getStringAttr("max_vector_width"));
-    if (maxVectorLength && isa<IntegerAttr>(*maxVectorLength)) {
-      return dyn_cast<IntegerAttr>(*maxVectorLength).getInt();
-    }
-    return 512;
-  }
-
-  SystemDesc(ModuleOp m) : layout(m), ctx(m->getContext()) {}
-
-private:
-  DataLayout layout;
-  MLIRContext *ctx;
-};
-
 using OpTileSizeMap = std::unordered_map<std::string, SmallVector<int64_t>>;
 
 template <typename OpTy>
@@ -806,7 +751,8 @@ struct IterativeTilingAndFusion
     // Get funcOp
     func::FuncOp func = getOperation();
     // Get system descriptor
-    SystemDesc sysDesc(func->getParentOfType<ModuleOp>());
+    CPUTargetDescriptionAnalysis sysDesc =
+        getAnalysis<CPUTargetDescriptionAnalysis>();
     // Flexible options to control which candidate slice would be selected from
     // the view of both validity and performance.
     CandidateSliceOptions sliceOptions;